| 9 |
|
% J: immediate 0..15 |
| 10 |
|
% k: immediate 0..7 |
| 11 |
|
% K: immediate 0..63 |
| 12 |
+ |
% p: immediate 0..3 (CINV and CPUSH: cache field) |
| 13 |
|
% s: source mode |
| 14 |
|
% S: source reg |
| 15 |
|
% d: dest mode |
| 25 |
|
% |
| 26 |
|
% Arp: --> -(Ar) |
| 27 |
|
% ArP: --> (Ar)+ |
| 28 |
+ |
% Al : --> (xxx).L |
| 29 |
|
% |
| 30 |
|
% Fields on a line: |
| 31 |
|
% 16 chars bitpattern : |
| 32 |
< |
% CPU level / privildge level : |
| 32 |
> |
% CPU level / privilege level : |
| 33 |
|
% CPU level 0: 68000 |
| 34 |
|
% 1: 68010 |
| 35 |
|
% 2: 68020 |
| 36 |
+ |
% 3: 68020/68881 |
| 37 |
+ |
% 4: 68040 |
| 38 |
|
% privilege level 0: not privileged |
| 39 |
|
% 1: unprivileged only on 68000 (check regs.s) |
| 40 |
|
% 2: privileged (check regs.s) |
| 100 |
|
0011 DDDd ddss sSSS:00:-----:-----:12: MOVEA.W s,d[Areg] |
| 101 |
|
0011 DDDd ddss sSSS:00:-NZ00:-----:12: MOVE.W s,d[!Areg] |
| 102 |
|
|
| 103 |
< |
0100 0000 zzdd dDDD:00:XxZxC:-----:30: NEGX.z d[!Areg] |
| 103 |
> |
0100 0000 zzdd dDDD:00:XxZxC:X-Z--:30: NEGX.z d[!Areg] |
| 104 |
|
0100 0000 11dd dDDD:01:?????:?????:10: MVSR2.W d[!Areg] |
| 105 |
|
0100 0010 zzdd dDDD:00:-0100:-----:20: CLR.z d[!Areg] |
| 106 |
|
0100 0010 11dd dDDD:10:?????:?????:10: MVSR2.B d[!Areg] |
| 146 |
|
0100 1110 11ss sSSS:00://///://///:80: JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd] |
| 147 |
|
0100 rrr1 11ss sSSS:00:-----:-----:02: LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar |
| 148 |
|
|
| 149 |
< |
0101 jjj0 zzdd dDDD:00:-----:-----:13: ADDA.z #j,d[Areg] |
| 149 |
> |
% This variant of ADDQ is word and long sized only |
| 150 |
> |
0101 jjj0 01dd dDDD:00:-----:-----:13: ADDA.W #j,d[Areg] |
| 151 |
> |
0101 jjj0 10dd dDDD:00:-----:-----:13: ADDA.L #j,d[Areg] |
| 152 |
|
0101 jjj0 zzdd dDDD:00:XNZVC:-----:13: ADD.z #j,d[!Areg] |
| 153 |
< |
0101 jjj1 zzdd dDDD:00:-----:-----:13: SUBA.z #j,d[Areg] |
| 153 |
> |
|
| 154 |
> |
% This variant of SUBQ is word and long sized only |
| 155 |
> |
0101 jjj1 01dd dDDD:00:-----:-----:13: SUBA.W #j,d[Areg] |
| 156 |
> |
0101 jjj1 10dd dDDD:00:-----:-----:13: SUBA.L #j,d[Areg] |
| 157 |
|
0101 jjj1 zzdd dDDD:00:XNZVC:-----:13: SUB.z #j,d[!Areg] |
| 158 |
+ |
|
| 159 |
|
0101 cccc 1100 1rrr:00:-----:+++++:31: DBcc.W Dr,#1 |
| 160 |
|
0101 cccc 11dd dDDD:00:-----:+++++:20: Scc.B d[!Areg] |
| 161 |
|
0101 cccc 1111 1010:20:?????:?????:10: TRAPcc #1 |
| 249 |
|
1111 0011 00ss sSSS:32:?????:?????:20: FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16] |
| 250 |
|
1111 0011 01ss sSSS:32:?????:?????:10: FRESTORE s[!Dreg,Areg,Apdi,Immd] |
| 251 |
|
|
| 252 |
< |
1111 0000 00ss sSSS:40:?????:?????:11: MMUOP #1,s |
| 252 |
> |
% 68040 instructions |
| 253 |
> |
1111 0100 pp00 1rrr:42:-----:-----:02: CINVL #p,Ar |
| 254 |
> |
1111 0100 pp01 0rrr:42:-----:-----:02: CINVP #p,Ar |
| 255 |
> |
1111 0100 pp01 1rrr:42:-----:-----:00: CINVA #p |
| 256 |
> |
1111 0100 pp10 1rrr:42:-----:-----:02: CPUSHL #p,Ar |
| 257 |
> |
1111 0100 pp11 0rrr:42:-----:-----:02: CPUSHP #p,Ar |
| 258 |
> |
1111 0100 pp11 1rrr:42:-----:-----:00: CPUSHA #p |
| 259 |
> |
1111 0110 0010 0rrr:40:-----:-----:12: MOVE16 ArP,ARP |
| 260 |
> |
1111 0110 00ss sSSS:40:-----:-----:12: MOVE16 s[Dreg-Aipi],Al |
| 261 |
> |
1111 0110 00dd dDDD:40:-----:-----:12: MOVE16 Al,d[Areg-Aipi] |
| 262 |
> |
1111 0110 00ss sSSS:40:-----:-----:12: MOVE16 s[Aind],Al |
| 263 |
> |
1111 0110 00dd dDDD:40:-----:-----:12: MOVE16 Al,d[Aipi-Aind] |
