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root/cebix/BasiliskII/src/uae_cpu/table68k
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Comparing BasiliskII/src/uae_cpu/table68k (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.3 by gbeauche, 2000-09-22T17:22:09Z

# Line 27 | Line 27
27   %
28   % Fields on a line:
29   % 16 chars bitpattern :
30 < % CPU level / privildge level :
30 > % CPU level / privilege level :
31   %   CPU level 0: 68000
32   %             1: 68010
33   %             2: 68020
34 + %             3: 68020/68881
35 + %             4: 68040
36   %   privilege level 0: not privileged
37   %                   1: unprivileged only on 68000 (check regs.s)
38   %                   2: privileged                 (check regs.s)
# Line 142 | Line 144
144   0100 1110 11ss sSSS:00://///://///:80: JMP.L   s[!Dreg,Areg,Aipi,Apdi,Immd]
145   0100 rrr1 11ss sSSS:00:-----:-----:02: LEA.L   s[!Dreg,Areg,Aipi,Apdi,Immd],Ar
146  
147 < 0101 jjj0 zzdd dDDD:00:-----:-----:13: ADDA.z  #j,d[Areg]      
147 > % This variant of ADDQ is word and long sized only
148 > 0101 jjj0 01dd dDDD:00:-----:-----:13: ADDA.W  #j,d[Areg]      
149 > 0101 jjj0 10dd dDDD:00:-----:-----:13: ADDA.L  #j,d[Areg]      
150   0101 jjj0 zzdd dDDD:00:XNZVC:-----:13: ADD.z   #j,d[!Areg]
151 < 0101 jjj1 zzdd dDDD:00:-----:-----:13: SUBA.z  #j,d[Areg]      
151 >
152 > % This variant of SUBQ is word and long sized only
153 > 0101 jjj1 01dd dDDD:00:-----:-----:13: SUBA.W  #j,d[Areg]      
154 > 0101 jjj1 10dd dDDD:00:-----:-----:13: SUBA.L  #j,d[Areg]      
155   0101 jjj1 zzdd dDDD:00:XNZVC:-----:13: SUB.z   #j,d[!Areg]
156 +
157   0101 cccc 1100 1rrr:00:-----:+++++:31: DBcc.W  Dr,#1
158   0101 cccc 11dd dDDD:00:-----:+++++:20: Scc.B   d[!Areg]
159   0101 cccc 1111 1010:20:?????:?????:10: TRAPcc  #1
# Line 239 | Line 247
247   1111 0011 00ss sSSS:32:?????:?????:20: FSAVE    s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]
248   1111 0011 01ss sSSS:32:?????:?????:10: FRESTORE s[!Dreg,Areg,Apdi,Immd]
249  
250 < 1111 0000 00ss sSSS:40:?????:?????:11: MMUOP    #1,s
250 > % 68040 instructions
251 > 1111 0100 ii00 1rrr:42:-----:-----:02: CINVL    #i,Ar
252 > 1111 0100 ii01 0rrr:42:-----:-----:02: CINVP    #i,Ar
253 > 1111 0100 ii01 1rrr:42:-----:-----:00: CINVA    #i
254 > 1111 0100 ii10 1rrr:42:-----:-----:02: CPUSHL   #i,Ar
255 > 1111 0100 ii11 0rrr:42:-----:-----:02: CPUSHP   #i,Ar
256 > 1111 0100 ii11 1rrr:42:-----:-----:00: CPUSHA   #i
257 > 1111 0110 0010 0rrr:40:-----:-----:12: MOVE16   ArP,ARP

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