Revision 1.7 - (view) (annotate) - [select for diffs]
2007-06-29T16:32:05Z (17 years, 4 months ago) by gbeauche
Branch: MAIN
CVS Tags: HEAD
Changes since 1.6: +3 -0 lines
Diff to previous 1.6 , to selected 1.4

More human readable instruction names (from e-uae).

Building on GCC 2 causes errors:
../uae_cpu/gencpu.c: In function `void gen_opcode(long unsigned int)':
../uae_cpu/gencpu.c:874: conversion from `unsigned int' to `enum wordsizes'
../uae_cpu/gencpu.c:875: conversion from `unsigned int' to `enum amodes'
due to mismatching of types in struct instr and types in function prototypes.
However, this only started happening recently and I don't know why :-(

Revision 1.5 - (view) (annotate) - [select for diffs]
2002-10-02T15:55:09Z (22 years, 1 month ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-12
Changes since 1.4: +1 -1 lines
Diff to previous 1.4

- Remove dead code in readcpu.cpp concerning CONST_JUMP control flow.
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.

- Merge with Basilisk II/JIT cpu core, interpretive part for now
- Clean use of USE_PREFETCH_BUFFER macro and dependent bits

Revision 1.3 - (view) (annotate) - [select for diffs]
2001-03-19T13:11:40Z (23 years, 8 months ago) by gbeauche
Branch: MAIN
CVS Tags: release-0_9-1, snapshot-15012002, snapshot-29052001
Changes since 1.2: +1 -1 lines
Diff to previous 1.2 , to selected 1.4

Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)

Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
  only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'

- added some 68040 instructions: CINV, CPUSH, MOVE16 (Ax)+,(Ay)+, MOVEC regs,
  and FPU state frames; enough to boot MacOS
- CPU type can be selected in GTK prefs editor

Revision 1.1.1.1 - (view) (annotate) - [select for diffs] (vendor branch)
1999-10-03T14:16:26Z (25 years, 1 month ago) by cebix
Branch: cebix
CVS Tags: release-0_7-2, snapshot-21101999, start
Changes since 1.1: +0 -0 lines
Diff to previous 1.1 , to next main 1.7 , to selected 1.4

Imported sources

Initial revision