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root/cebix/BasiliskII/src/uae_cpu/readcpu.h
Revision 1.7 - (view) (annotate) - [select for diffs]
2007-06-29T16:32:05Z (17 years, 4 months ago) by gbeauche
Branch: MAIN
CVS Tags: HEAD
Changes since 1.6: +3 -0 lines
Diff to previous 1.6
More human readable instruction names (from e-uae).

Revision 1.6 - (view) (annotate) - [select for diffs]
2003-04-01T05:26:07Z (21 years, 7 months ago) by nigel
Branch: MAIN
CVS Tags: nigel-build-13, nigel-build-15, nigel-build-16, nigel-build-17, nigel-build-19
Changes since 1.5: +0 -7 lines
Diff to previous 1.5
Building on GCC 2 causes errors:
../uae_cpu/gencpu.c: In function `void gen_opcode(long unsigned int)':
../uae_cpu/gencpu.c:874: conversion from `unsigned int' to `enum wordsizes'
../uae_cpu/gencpu.c:875: conversion from `unsigned int' to `enum amodes'
due to mismatching of types in struct instr and types in function prototypes.
However, this only started happening recently and I don't know why :-(

Revision 1.5 - (view) (annotate) - [select for diffs]
2002-10-02T15:55:09Z (22 years, 1 month ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-12
Changes since 1.4: +1 -1 lines
Diff to previous 1.4
- Remove dead code in readcpu.cpp concerning CONST_JUMP control flow.
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.

Revision 1.4 - (view) (annotate) - [select for diffs]
2002-09-01T15:17:13Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.3: +23 -3 lines
Diff to previous 1.3
- Merge with Basilisk II/JIT cpu core, interpretive part for now
- Clean use of USE_PREFETCH_BUFFER macro and dependent bits

Revision 1.3 - (view) (annotate) - [select for diffs]
2001-03-19T13:11:40Z (23 years, 7 months ago) by gbeauche
Branch: MAIN
CVS Tags: release-0_9-1, snapshot-15012002, snapshot-29052001
Changes since 1.2: +1 -1 lines
Diff to previous 1.2
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)

Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
  only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'

Revision 1.2 - (view) (annotate) - [select for diffs]
1999-10-28T15:33:25Z (25 years ago) by cebix
Branch: MAIN
CVS Tags: release-0_8-1, snapshot-02111999, snapshot-13072000, snapshot-17022001, snapshot-22121999
Changes since 1.1: +1 -0 lines
Diff to previous 1.1
- added some 68040 instructions: CINV, CPUSH, MOVE16 (Ax)+,(Ay)+, MOVEC regs,
  and FPU state frames; enough to boot MacOS
- CPU type can be selected in GTK prefs editor

Revision 1.1 - (view) (annotate) - [select for diffs]
1999-10-03T14:16:26Z (25 years, 1 month ago) by cebix
Branch: MAIN
Branch point for: cebix
Initial revision

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