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root/cebix/BasiliskII/src/uae_cpu/readcpu.cpp
Revision 1.11 - (view) (annotate) - [select for diffs]
2012-03-30T01:25:46Z (12 years, 7 months ago) by asvitkine
Branch: MAIN
CVS Tags: HEAD
Changes since 1.10: +14 -0 lines
Diff to previous 1.10
Add GPLv2 notices to files from UAE Amiga Emulator, as retrieved from the
COPYING file of uae-0.8.29, retrieved from http://www.amigaemulator.org/
via uae-0.8.29.tar.bz2 (MD5 = 54abbabb5e8580b679c52de019141d61).

Revision 1.10 - (view) (annotate) - [select for diffs]
2007-06-29T16:32:05Z (17 years, 4 months ago) by gbeauche
Branch: MAIN
Changes since 1.9: +109 -0 lines
Diff to previous 1.9
More human readable instruction names (from e-uae).

Revision 1.9 - (view) (annotate) - [select for diffs]
2005-06-06T19:22:56Z (19 years, 5 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-17, nigel-build-19
Changes since 1.8: +28 -51 lines
Diff to previous 1.8
Really make translation through constant jumps functional. This can be
disabled with the new prefs item "jitinline". Some rapid Speedometer 4
benchmarks showed only a 4% improvement.

Revision 1.8 - (view) (annotate) - [select for diffs]
2002-11-02T17:23:20Z (22 years ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-12, nigel-build-13, nigel-build-15, nigel-build-16
Changes since 1.7: +6 -1 lines
Diff to previous 1.7
Fix buffer overflow reported by Aranym people

Revision 1.7 - (view) (annotate) - [select for diffs]
2002-10-03T15:05:01Z (22 years, 1 month ago) by gbeauche
Branch: MAIN
Changes since 1.6: +5 -0 lines
Diff to previous 1.6
- Turn on runtime detection of loop and jump alignment as Aranym people
  reported they got some improvement with it and larger loops. Small
  loops are an issue for now until unrolling is implemented for DBcc.
- Const jumps are identified in readcpu. I don't want to duplicate code
  uselessly. Rather, it's the JIT job to know whether we are doing block
  inlining and un-marking those instructions as end-of-block.

Revision 1.6 - (view) (annotate) - [select for diffs]
2002-10-02T15:55:09Z (22 years, 1 month ago) by gbeauche
Branch: MAIN
Changes since 1.5: +0 -14 lines
Diff to previous 1.5
- Remove dead code in readcpu.cpp concerning CONST_JUMP control flow.
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.

Revision 1.5 - (view) (annotate) - [select for diffs]
2002-09-01T15:17:13Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.4: +103 -4 lines
Diff to previous 1.4
- Merge with Basilisk II/JIT cpu core, interpretive part for now
- Clean use of USE_PREFETCH_BUFFER macro and dependent bits

Revision 1.4 - (view) (annotate) - [select for diffs]
2001-08-19T16:21:01Z (23 years, 2 months ago) by gbeauche
Branch: MAIN
CVS Tags: snapshot-15012002
Changes since 1.3: +12 -3 lines
Diff to previous 1.3
- merge 680x0 emulation core with uae 0.8.17

Revision 1.3 - (view) (annotate) - [select for diffs]
2001-03-19T13:11:40Z (23 years, 7 months ago) by gbeauche
Branch: MAIN
CVS Tags: release-0_9-1, snapshot-29052001
Changes since 1.2: +12 -0 lines
Diff to previous 1.2
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)

Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
  only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'

Revision 1.2 - (view) (annotate) - [select for diffs]
1999-10-28T15:33:24Z (25 years ago) by cebix
Branch: MAIN
CVS Tags: release-0_8-1, snapshot-02111999, snapshot-13072000, snapshot-17022001, snapshot-22121999
Changes since 1.1: +9 -0 lines
Diff to previous 1.1
- added some 68040 instructions: CINV, CPUSH, MOVE16 (Ax)+,(Ay)+, MOVEC regs,
  and FPU state frames; enough to boot MacOS
- CPU type can be selected in GTK prefs editor

Revision 1.1 - (view) (annotate) - [select for diffs]
1999-10-03T14:16:26Z (25 years, 1 month ago) by cebix
Branch: MAIN
Branch point for: cebix
Initial revision

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