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root/cebix/BasiliskII/src/uae_cpu/newcpu.h
Revision: 1.17
Committed: 2012-03-30T01:25:46Z (12 years, 8 months ago) by asvitkine
Content type: text/plain
Branch: MAIN
CVS Tags: HEAD
Changes since 1.16: +21 -7 lines
Log Message:
Add GPLv2 notices to files from UAE Amiga Emulator, as retrieved from the
COPYING file of uae-0.8.29, retrieved from http://www.amigaemulator.org/
via uae-0.8.29.tar.bz2 (MD5 = 54abbabb5e8580b679c52de019141d61).

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation
5 *
6 * Copyright 1995 Bernd Schmidt
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #ifndef NEWCPU_H
24 #define NEWCPU_H
25
26 #ifndef FLIGHT_RECORDER
27 #define FLIGHT_RECORDER 0
28 #endif
29
30 #include "m68k.h"
31 #include "readcpu.h"
32 #include "spcflags.h"
33
34 extern int areg_byteinc[];
35 extern int imm8_table[];
36
37 extern int movem_index1[256];
38 extern int movem_index2[256];
39 extern int movem_next[256];
40
41 extern int broken_in;
42
43 #ifdef X86_ASSEMBLY
44 /* This hack seems to force all register saves (pushl %reg) to be moved to the
45 begining of the function, thus making it possible to cpuopti to remove them
46 since m68k_run_1 will save those registers before calling the instruction
47 handler */
48 # define cpuop_tag(tag) __asm__ __volatile__ ( "#cpuop_" tag )
49 #else
50 # define cpuop_tag(tag) ;
51 #endif
52
53 #define cpuop_begin() do { cpuop_tag("begin"); } while (0)
54 #define cpuop_end() do { cpuop_tag("end"); } while (0)
55
56 typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
57
58 struct cputbl {
59 cpuop_func *handler;
60 uae_u16 specific;
61 uae_u16 opcode;
62 };
63
64 extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
65
66 #if USE_JIT
67 typedef void compop_func (uae_u32) REGPARAM;
68
69 struct comptbl {
70 compop_func *handler;
71 uae_u32 specific;
72 uae_u32 opcode;
73 };
74 #endif
75
76 extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
77
78 typedef char flagtype;
79
80 struct regstruct {
81 uae_u32 regs[16];
82
83 uae_u32 pc;
84 uae_u8 * pc_p;
85 uae_u8 * pc_oldp;
86
87 spcflags_t spcflags;
88 int intmask;
89
90 uae_u32 vbr, sfc, dfc;
91 uaecptr usp, isp, msp;
92 uae_u16 sr;
93 flagtype t1;
94 flagtype t0;
95 flagtype s;
96 flagtype m;
97 flagtype x;
98 flagtype stopped;
99
100 #if USE_PREFETCH_BUFFER
101 /* Fellow sources say this is 4 longwords. That's impossible. It needs
102 * to be at least a longword. The HRM has some cryptic comment about two
103 * instructions being on the same longword boundary.
104 * The way this is implemented now seems like a good compromise.
105 */
106 uae_u32 prefetch;
107 #endif
108 };
109
110 extern regstruct regs, lastint_regs;
111
112 #define m68k_dreg(r,num) ((r).regs[(num)])
113 #define m68k_areg(r,num) (((r).regs + 8)[(num)])
114
115 #define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
116 #define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
117 #define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
118
119 #ifdef HAVE_GET_WORD_UNSWAPPED
120 #define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
121 #else
122 #define GET_OPCODE (get_iword (0))
123 #endif
124
125 #if USE_PREFETCH_BUFFER
126 static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
127 {
128 if (o > 3 || o < 0)
129 return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
130
131 return do_get_mem_byte((uae_u8 *)(((uae_u8 *)&regs.prefetch) + o + 1));
132 }
133 static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
134 {
135 if (o > 3 || o < 0)
136 return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
137
138 return do_get_mem_word((uae_u16 *)(((uae_u8 *)&regs.prefetch) + o));
139 }
140 static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
141 {
142 if (o > 3 || o < 0)
143 return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
144 if (o == 0)
145 return do_get_mem_long(&regs.prefetch);
146 return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
147 }
148 #endif
149
150 #define m68k_incpc(o) (regs.pc_p += (o))
151
152 static __inline__ void fill_prefetch_0 (void)
153 {
154 #if USE_PREFETCH_BUFFER
155 uae_u32 r;
156 #ifdef UNALIGNED_PROFITABLE
157 r = *(uae_u32 *)regs.pc_p;
158 regs.prefetch = r;
159 #else
160 r = do_get_mem_long ((uae_u32 *)regs.pc_p);
161 do_put_mem_long (&regs.prefetch, r);
162 #endif
163 #endif
164 }
165
166 #if 0
167 static __inline__ void fill_prefetch_2 (void)
168 {
169 uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
170 uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
171 r |= r2;
172 do_put_mem_long (&regs.prefetch, r);
173 }
174 #else
175 #define fill_prefetch_2 fill_prefetch_0
176 #endif
177
178 /* These are only used by the 68020/68881 code, and therefore don't
179 * need to handle prefetch. */
180 static __inline__ uae_u32 next_ibyte (void)
181 {
182 uae_u32 r = get_ibyte (0);
183 m68k_incpc (2);
184 return r;
185 }
186
187 static __inline__ uae_u32 next_iword (void)
188 {
189 uae_u32 r = get_iword (0);
190 m68k_incpc (2);
191 return r;
192 }
193
194 static __inline__ uae_u32 next_ilong (void)
195 {
196 uae_u32 r = get_ilong (0);
197 m68k_incpc (4);
198 return r;
199 }
200
201 static __inline__ void m68k_setpc (uaecptr newpc)
202 {
203 #if REAL_ADDRESSING || DIRECT_ADDRESSING
204 regs.pc_p = get_real_address(newpc);
205 #else
206 regs.pc_p = regs.pc_oldp = get_real_address(newpc);
207 regs.pc = newpc;
208 #endif
209 }
210
211 static __inline__ uaecptr m68k_getpc (void)
212 {
213 #if REAL_ADDRESSING || DIRECT_ADDRESSING
214 return get_virtual_address(regs.pc_p);
215 #else
216 return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
217 #endif
218 }
219
220 #define m68k_setpc_fast m68k_setpc
221 #define m68k_setpc_bcc m68k_setpc
222 #define m68k_setpc_rte m68k_setpc
223
224 static __inline__ void m68k_do_rts(void)
225 {
226 m68k_setpc(get_long(m68k_areg(regs, 7)));
227 m68k_areg(regs, 7) += 4;
228 }
229
230 static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
231 {
232 m68k_areg(regs, 7) -= 4;
233 put_long(m68k_areg(regs, 7), oldpc);
234 m68k_incpc(offset);
235 }
236
237 static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
238 {
239 m68k_areg(regs, 7) -= 4;
240 put_long(m68k_areg(regs, 7), oldpc);
241 m68k_setpc(dest);
242 }
243
244 static __inline__ void m68k_setstopped (int stop)
245 {
246 regs.stopped = stop;
247 /* A traced STOP instruction drops through immediately without
248 actually stopping. */
249 if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
250 SPCFLAGS_SET( SPCFLAG_STOP );
251 }
252
253 extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
254 extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
255
256 extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);
257
258 extern void MakeSR (void);
259 extern void MakeFromSR (void);
260 extern void Exception (int, uaecptr);
261 extern void dump_counts (void);
262 extern int m68k_move2c (int, uae_u32 *);
263 extern int m68k_movec2 (int, uae_u32 *);
264 extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
265 extern void m68k_mull (uae_u32, uae_u32, uae_u16);
266 extern void m68k_emulop (uae_u32);
267 extern void m68k_emulop_return (void);
268 extern void init_m68k (void);
269 extern void exit_m68k (void);
270 extern void m68k_dumpstate (uaecptr *);
271 extern void m68k_disasm (uaecptr, uaecptr *, int);
272 extern void m68k_reset (void);
273 extern void m68k_enter_debugger(void);
274 extern int m68k_do_specialties(void);
275
276 extern void mmu_op (uae_u32, uae_u16);
277
278 /* Opcode of faulting instruction */
279 extern uae_u16 last_op_for_exception_3;
280 /* PC at fault time */
281 extern uaecptr last_addr_for_exception_3;
282 /* Address that generated the exception */
283 extern uaecptr last_fault_for_exception_3;
284
285 #define CPU_OP_NAME(a) op ## a
286
287 /* 68020 + 68881 */
288 extern struct cputbl op_smalltbl_0_ff[];
289 /* 68020 */
290 extern struct cputbl op_smalltbl_1_ff[];
291 /* 68010 */
292 extern struct cputbl op_smalltbl_2_ff[];
293 /* 68000 */
294 extern struct cputbl op_smalltbl_3_ff[];
295 /* 68000 slow but compatible. */
296 extern struct cputbl op_smalltbl_4_ff[];
297
298 #if FLIGHT_RECORDER
299 extern void m68k_record_step(uaecptr) REGPARAM;
300 #endif
301 extern void m68k_do_execute(void);
302 extern void m68k_execute(void);
303 #if USE_JIT
304 extern void m68k_compile_execute(void);
305 #endif
306 #ifdef USE_CPU_EMUL_SERVICES
307 extern int32 emulated_ticks;
308 extern void cpu_do_check_ticks(void);
309
310 static inline void cpu_check_ticks(void)
311 {
312 if (--emulated_ticks <= 0)
313 cpu_do_check_ticks();
314 }
315 #else
316 #define cpu_check_ticks()
317 #define cpu_do_check_ticks()
318 #endif
319
320 #endif /* NEWCPU_H */