src/uae_cpu/newcpu.h

/*
 * UAE - The Un*x Amiga Emulator
 *
 * MC68000 emulation
 *
 * Copyright 1995 Bernd Schmidt
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef NEWCPU_H
#define NEWCPU_H

#ifndef FLIGHT_RECORDER
#define FLIGHT_RECORDER 0
#endif

#include "m68k.h"
#include "readcpu.h"
#include "spcflags.h"
 
extern int areg_byteinc[];
extern int imm8_table[];

extern int movem_index1[256];
extern int movem_index2[256];
extern int movem_next[256];

extern int broken_in;

#ifdef X86_ASSEMBLY
/* This hack seems to force all register saves (pushl %reg) to be moved to the
   begining of the function, thus making it possible to cpuopti to remove them
   since m68k_run_1 will save those registers before calling the instruction
   handler */
# define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
#else
# define cpuop_tag(tag)         ;
#endif

#define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
#define cpuop_end()                     do { cpuop_tag("end"); } while (0)

typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
 
struct cputbl {
    cpuop_func *handler;
    uae_u16 specific;
    uae_u16 opcode;
};

extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");

#if USE_JIT
typedef void compop_func (uae_u32) REGPARAM;

struct comptbl {
    compop_func *handler;
        uae_u32         specific;
        uae_u32         opcode;
};
#endif

extern void REGPARAM2 op_illg (uae_u32) REGPARAM;

typedef char flagtype;

struct regstruct {
    uae_u32             regs[16];

    uae_u32             pc;
    uae_u8 *    pc_p;
    uae_u8 *    pc_oldp;

        spcflags_t      spcflags;
    int                 intmask;

    uae_u32             vbr, sfc, dfc;
    uaecptr             usp, isp, msp;
    uae_u16             sr;
    flagtype    t1;
    flagtype    t0;
    flagtype    s;
    flagtype    m;
    flagtype    x;
    flagtype    stopped;

#if USE_PREFETCH_BUFFER
    /* Fellow sources say this is 4 longwords. That's impossible. It needs
     * to be at least a longword. The HRM has some cryptic comment about two
     * instructions being on the same longword boundary.
     * The way this is implemented now seems like a good compromise.
     */
    uae_u32 prefetch;
#endif
};

extern regstruct regs, lastint_regs;

#define m68k_dreg(r,num) ((r).regs[(num)])
#define m68k_areg(r,num) (((r).regs + 8)[(num)])

#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))

#ifdef HAVE_GET_WORD_UNSWAPPED
#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
#else
#define GET_OPCODE (get_iword (0))
#endif

#if USE_PREFETCH_BUFFER
static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));

    return do_get_mem_byte((uae_u8 *)(((uae_u8 *)&regs.prefetch) + o + 1));
}
static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_word((uae_u16 *)(regs.pc_p + o));

    return do_get_mem_word((uae_u16 *)(((uae_u8 *)&regs.prefetch) + o));
}
static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
    if (o == 0)
        return do_get_mem_long(&regs.prefetch);
    return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
}
#endif

#define m68k_incpc(o) (regs.pc_p += (o))

static __inline__ void fill_prefetch_0 (void)
{
#if USE_PREFETCH_BUFFER
    uae_u32 r;
#ifdef UNALIGNED_PROFITABLE
    r = *(uae_u32 *)regs.pc_p;
    regs.prefetch = r;
#else
    r = do_get_mem_long ((uae_u32 *)regs.pc_p);
    do_put_mem_long (&regs.prefetch, r);
#endif
#endif
}

#if 0
static __inline__ void fill_prefetch_2 (void)
{
    uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
    uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
    r |= r2;
    do_put_mem_long (&regs.prefetch, r);
}
#else
#define fill_prefetch_2 fill_prefetch_0
#endif

/* These are only used by the 68020/68881 code, and therefore don't
 * need to handle prefetch.  */
static __inline__ uae_u32 next_ibyte (void)
{
    uae_u32 r = get_ibyte (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_iword (void)
{
    uae_u32 r = get_iword (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_ilong (void)
{
    uae_u32 r = get_ilong (0);
    m68k_incpc (4);
    return r;
}

static __inline__ void m68k_setpc (uaecptr newpc)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        regs.pc_p = get_real_address(newpc);
#else
    regs.pc_p = regs.pc_oldp = get_real_address(newpc);
    regs.pc = newpc;
#endif
}

static __inline__ uaecptr m68k_getpc (void)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        return get_virtual_address(regs.pc_p);
#else
    return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
#endif
}

#define m68k_setpc_fast m68k_setpc
#define m68k_setpc_bcc  m68k_setpc
#define m68k_setpc_rte  m68k_setpc

static __inline__ void m68k_do_rts(void)
{
            m68k_setpc(get_long(m68k_areg(regs, 7)));
                m68k_areg(regs, 7) += 4;
}
 
static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_incpc(offset);
}
 
static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_setpc(dest);
}

static __inline__ void m68k_setstopped (int stop)
{
    regs.stopped = stop;
    /* A traced STOP instruction drops through immediately without
       actually stopping.  */
    if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
    SPCFLAGS_SET( SPCFLAG_STOP );
}

extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);

extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);

extern void MakeSR (void);
extern void MakeFromSR (void);
extern void Exception (int, uaecptr);
extern void dump_counts (void);
extern int m68k_move2c (int, uae_u32 *);
extern int m68k_movec2 (int, uae_u32 *);
extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
extern void m68k_mull (uae_u32, uae_u32, uae_u16);
extern void m68k_emulop (uae_u32);
extern void m68k_emulop_return (void);
extern void init_m68k (void);
extern void exit_m68k (void);
extern void m68k_dumpstate (uaecptr *);
extern void m68k_disasm (uaecptr, uaecptr *, int);
extern void m68k_reset (void);
extern void m68k_enter_debugger(void);
extern int m68k_do_specialties(void);

extern void mmu_op (uae_u32, uae_u16);

/* Opcode of faulting instruction */
extern uae_u16 last_op_for_exception_3;
/* PC at fault time */
extern uaecptr last_addr_for_exception_3;
/* Address that generated the exception */
extern uaecptr last_fault_for_exception_3;

#define CPU_OP_NAME(a) op ## a

/* 68020 + 68881 */
extern struct cputbl op_smalltbl_0_ff[];
/* 68020 */
extern struct cputbl op_smalltbl_1_ff[];
/* 68010 */
extern struct cputbl op_smalltbl_2_ff[];
/* 68000 */
extern struct cputbl op_smalltbl_3_ff[];
/* 68000 slow but compatible.  */
extern struct cputbl op_smalltbl_4_ff[];

#if FLIGHT_RECORDER
extern void m68k_record_step(uaecptr) REGPARAM;
#endif
extern void m68k_do_execute(void);
extern void m68k_execute(void);
#if USE_JIT
extern void m68k_compile_execute(void);
#endif
#ifdef USE_CPU_EMUL_SERVICES
extern int32 emulated_ticks;
extern void cpu_do_check_ticks(void);

static inline void cpu_check_ticks(void)
{
        if (--emulated_ticks <= 0)
                cpu_do_check_ticks();
}
#else
#define cpu_check_ticks()
#define cpu_do_check_ticks()
#endif
 
#endif /* NEWCPU_H */
Revision:	1.17
Committed:	2012-03-30T01:25:46Z (12 years, 5 months ago) by asvitkine
Content type:	text/plain
Branch:	MAIN
CVS Tags:	HEAD
Changes since 1.16:	+21 -7 lines
Log Message:	Add GPLv2 notices to files from UAE Amiga Emulator, as retrieved from the COPYING file of uae-0.8.29, retrieved from http://www.amigaemulator.org/ via uae-0.8.29.tar.bz2 (MD5 = 54abbabb5e8580b679c52de019141d61).
#	User	Rev	Content
1	asvitkine	1.17	/*
2			* UAE - The Un*x Amiga Emulator
3			*
4			* MC68000 emulation
5			*
6			* Copyright 1995 Bernd Schmidt
7			*
8			* This program is free software; you can redistribute it and/or modify
9			* it under the terms of the GNU General Public License as published by
10			* the Free Software Foundation; either version 2 of the License, or
11			* (at your option) any later version.
12			*
13			* This program is distributed in the hope that it will be useful,
14			* but WITHOUT ANY WARRANTY; without even the implied warranty of
15			* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16			* GNU General Public License for more details.
17			*
18			* You should have received a copy of the GNU General Public License
19			* along with this program; if not, write to the Free Software
20			* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21			*/
22	cebix	1.1
23	gbeauche	1.4	#ifndef NEWCPU_H
24			#define NEWCPU_H
25
26	gbeauche	1.10	#ifndef FLIGHT_RECORDER
27			#define FLIGHT_RECORDER 0
28			#endif
29
30	gbeauche	1.8	#include "m68k.h"
31			#include "readcpu.h"
32			#include "spcflags.h"
33
34	cebix	1.1	extern int areg_byteinc[];
35			extern int imm8_table[];
36
37			extern int movem_index1[256];
38			extern int movem_index2[256];
39			extern int movem_next[256];
40
41			extern int broken_in;
42
43	gbeauche	1.8	#ifdef X86_ASSEMBLY
44			/* This hack seems to force all register saves (pushl %reg) to be moved to the
45			begining of the function, thus making it possible to cpuopti to remove them
46			since m68k_run_1 will save those registers before calling the instruction
47			handler */
48			# define cpuop_tag(tag) __asm__ __volatile__ ( "#cpuop_" tag )
49			#else
50			# define cpuop_tag(tag) ;
51			#endif
52
53			#define cpuop_begin() do { cpuop_tag("begin"); } while (0)
54	gbeauche	1.12	#define cpuop_end() do { cpuop_tag("end"); } while (0)
55	cebix	1.1
56	gbeauche	1.12	typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
57	gbeauche	1.8
58	cebix	1.1	struct cputbl {
59			cpuop_func *handler;
60	gbeauche	1.8	uae_u16 specific;
61	cebix	1.1	uae_u16 opcode;
62			};
63
64	gbeauche	1.10	extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
65
66			#if USE_JIT
67			typedef void compop_func (uae_u32) REGPARAM;
68
69			struct comptbl {
70			compop_func *handler;
71			uae_u32 specific;
72			uae_u32 opcode;
73			};
74			#endif
75
76	gbeauche	1.12	extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
77	cebix	1.1
78			typedef char flagtype;
79
80	gbeauche	1.8	struct regstruct {
81			uae_u32 regs[16];
82	cebix	1.1
83	gbeauche	1.8	uae_u32 pc;
84			uae_u8 * pc_p;
85			uae_u8 * pc_oldp;
86
87			spcflags_t spcflags;
88			int intmask;
89
90			uae_u32 vbr, sfc, dfc;
91			uaecptr usp, isp, msp;
92			uae_u16 sr;
93			flagtype t1;
94			flagtype t0;
95			flagtype s;
96			flagtype m;
97			flagtype x;
98			flagtype stopped;
99	cebix	1.1
100	gbeauche	1.8	#if USE_PREFETCH_BUFFER
101	cebix	1.1	/* Fellow sources say this is 4 longwords. That's impossible. It needs
102			* to be at least a longword. The HRM has some cryptic comment about two
103			* instructions being on the same longword boundary.
104			* The way this is implemented now seems like a good compromise.
105			*/
106			uae_u32 prefetch;
107	gbeauche	1.8	#endif
108			};
109
110			extern regstruct regs, lastint_regs;
111	cebix	1.1
112			#define m68k_dreg(r,num) ((r).regs[(num)])
113			#define m68k_areg(r,num) (((r).regs + 8)[(num)])
114
115			#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
116			#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
117			#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
118
119			#ifdef HAVE_GET_WORD_UNSWAPPED
120			#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
121			#else
122			#define GET_OPCODE (get_iword (0))
123			#endif
124
125	gbeauche	1.8	#if USE_PREFETCH_BUFFER
126	cebix	1.1	static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
127			{
128			if (o > 3 \|\| o < 0)
129			return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
130
131			return do_get_mem_byte((uae_u8 )(((uae_u8 )&regs.prefetch) + o + 1));
132			}
133			static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
134			{
135			if (o > 3 \|\| o < 0)
136			return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
137
138			return do_get_mem_word((uae_u16 )(((uae_u8 )&regs.prefetch) + o));
139			}
140			static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
141			{
142			if (o > 3 \|\| o < 0)
143			return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
144			if (o == 0)
145			return do_get_mem_long(&regs.prefetch);
146			return (do_get_mem_word (((uae_u16 )&regs.prefetch) + 1) << 16) \| do_get_mem_word ((uae_u16 )(regs.pc_p + 4));
147			}
148	gbeauche	1.8	#endif
149	cebix	1.1
150			#define m68k_incpc(o) (regs.pc_p += (o))
151
152			static __inline__ void fill_prefetch_0 (void)
153			{
154	gbeauche	1.4	#if USE_PREFETCH_BUFFER
155	cebix	1.1	uae_u32 r;
156			#ifdef UNALIGNED_PROFITABLE
157			r = (uae_u32 )regs.pc_p;
158			regs.prefetch = r;
159			#else
160			r = do_get_mem_long ((uae_u32 *)regs.pc_p);
161			do_put_mem_long (&regs.prefetch, r);
162			#endif
163	gbeauche	1.4	#endif
164	cebix	1.1	}
165
166			#if 0
167			static __inline__ void fill_prefetch_2 (void)
168			{
169			uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
170			uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
171			r \|= r2;
172			do_put_mem_long (&regs.prefetch, r);
173			}
174			#else
175			#define fill_prefetch_2 fill_prefetch_0
176			#endif
177
178			/* These are only used by the 68020/68881 code, and therefore don't
179			* need to handle prefetch. */
180			static __inline__ uae_u32 next_ibyte (void)
181			{
182			uae_u32 r = get_ibyte (0);
183			m68k_incpc (2);
184			return r;
185			}
186
187			static __inline__ uae_u32 next_iword (void)
188			{
189			uae_u32 r = get_iword (0);
190			m68k_incpc (2);
191			return r;
192			}
193
194			static __inline__ uae_u32 next_ilong (void)
195			{
196			uae_u32 r = get_ilong (0);
197			m68k_incpc (4);
198			return r;
199			}
200
201			static __inline__ void m68k_setpc (uaecptr newpc)
202			{
203	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
204			regs.pc_p = get_real_address(newpc);
205			#else
206	cebix	1.1	regs.pc_p = regs.pc_oldp = get_real_address(newpc);
207			regs.pc = newpc;
208	gbeauche	1.4	#endif
209	cebix	1.1	}
210
211			static __inline__ uaecptr m68k_getpc (void)
212			{
213	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
214			return get_virtual_address(regs.pc_p);
215			#else
216	cebix	1.1	return regs.pc + ((char )regs.pc_p - (char )regs.pc_oldp);
217	gbeauche	1.4	#endif
218	cebix	1.1	}
219
220			#define m68k_setpc_fast m68k_setpc
221			#define m68k_setpc_bcc m68k_setpc
222			#define m68k_setpc_rte m68k_setpc
223
224	gbeauche	1.5	static __inline__ void m68k_do_rts(void)
225			{
226			m68k_setpc(get_long(m68k_areg(regs, 7)));
227			m68k_areg(regs, 7) += 4;
228			}
229
230			static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
231			{
232			m68k_areg(regs, 7) -= 4;
233			put_long(m68k_areg(regs, 7), oldpc);
234			m68k_incpc(offset);
235			}
236
237			static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
238			{
239			m68k_areg(regs, 7) -= 4;
240			put_long(m68k_areg(regs, 7), oldpc);
241			m68k_setpc(dest);
242			}
243
244	cebix	1.1	static __inline__ void m68k_setstopped (int stop)
245			{
246			regs.stopped = stop;
247	gbeauche	1.7	/* A traced STOP instruction drops through immediately without
248			actually stopping. */
249			if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
250	gbeauche	1.8	SPCFLAGS_SET( SPCFLAG_STOP );
251	cebix	1.1	}
252
253			extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
254			extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
255
256			extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);
257
258			extern void MakeSR (void);
259			extern void MakeFromSR (void);
260			extern void Exception (int, uaecptr);
261			extern void dump_counts (void);
262	gbeauche	1.6	extern int m68k_move2c (int, uae_u32 *);
263			extern int m68k_movec2 (int, uae_u32 *);
264	cebix	1.1	extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
265			extern void m68k_mull (uae_u32, uae_u32, uae_u16);
266	gbeauche	1.8	extern void m68k_emulop (uae_u32);
267			extern void m68k_emulop_return (void);
268	cebix	1.1	extern void init_m68k (void);
269	gbeauche	1.3	extern void exit_m68k (void);
270	cebix	1.1	extern void m68k_dumpstate (uaecptr *);
271			extern void m68k_disasm (uaecptr, uaecptr *, int);
272			extern void m68k_reset (void);
273			extern void m68k_enter_debugger(void);
274	gbeauche	1.8	extern int m68k_do_specialties(void);
275	cebix	1.1
276			extern void mmu_op (uae_u32, uae_u16);
277
278			/* Opcode of faulting instruction */
279			extern uae_u16 last_op_for_exception_3;
280			/* PC at fault time */
281			extern uaecptr last_addr_for_exception_3;
282			/* Address that generated the exception */
283			extern uaecptr last_fault_for_exception_3;
284
285			#define CPU_OP_NAME(a) op ## a
286
287			/* 68020 + 68881 */
288	gbeauche	1.8	extern struct cputbl op_smalltbl_0_ff[];
289	cebix	1.1	/* 68020 */
290	gbeauche	1.8	extern struct cputbl op_smalltbl_1_ff[];
291	cebix	1.1	/* 68010 */
292	gbeauche	1.8	extern struct cputbl op_smalltbl_2_ff[];
293	cebix	1.1	/* 68000 */
294	gbeauche	1.8	extern struct cputbl op_smalltbl_3_ff[];
295	cebix	1.1	/* 68000 slow but compatible. */
296	gbeauche	1.8	extern struct cputbl op_smalltbl_4_ff[];
297	cebix	1.1
298	gbeauche	1.10	#if FLIGHT_RECORDER
299	gbeauche	1.14	extern void m68k_record_step(uaecptr) REGPARAM;
300	gbeauche	1.10	#endif
301	gbeauche	1.8	extern void m68k_do_execute(void);
302			extern void m68k_execute(void);
303	gbeauche	1.10	#if USE_JIT
304			extern void m68k_compile_execute(void);
305	gbeauche	1.11	#endif
306	gbeauche	1.15	#ifdef USE_CPU_EMUL_SERVICES
307			extern int32 emulated_ticks;
308			extern void cpu_do_check_ticks(void);
309
310			static inline void cpu_check_ticks(void)
311			{
312			if (--emulated_ticks <= 0)
313			cpu_do_check_ticks();
314			}
315			#else
316			#define cpu_check_ticks()
317			#define cpu_do_check_ticks()
318			#endif
319	gbeauche	1.8
320	gbeauche	1.4	#endif /* NEWCPU_H */