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root/cebix/BasiliskII/src/uae_cpu/newcpu.h

Comparing BasiliskII/src/uae_cpu/newcpu.h (file contents):
Revision 1.7 by gbeauche, 2002-03-23T13:57:38Z vs.
Revision 1.9 by gbeauche, 2002-09-13T12:50:56Z

#	Line 9 | Line 9
9		#ifndef NEWCPU_H
10		#define NEWCPU_H
11
12	<	#define SPCFLAG_STOP 2
13	<	#define SPCFLAG_DISK 4
14	<	#define SPCFLAG_INT  8
15	<	#define SPCFLAG_BRK  16
16	<	#define SPCFLAG_EXTRA_CYCLES 32
17	<	#define SPCFLAG_TRACE 64
18	<	#define SPCFLAG_DOTRACE 128
19	<	#define SPCFLAG_DOINT 256
20	<	#define SPCFLAG_BLTNASTY 512
21	<	#define SPCFLAG_EXEC 1024
22	<	#define SPCFLAG_MODE_CHANGE 8192
23	<
12	>	#include "m68k.h"
13	>	#include "readcpu.h"
14	>	#include "spcflags.h"
15	>
16		extern int areg_byteinc[];
17		extern int imm8_table[];
18
#	Line 28 | Line 20 | extern int movem_index1[256];
20		extern int movem_index2[256];
21		extern int movem_next[256];
22
31	–	extern int fpp_movem_index1[256];
32	–	extern int fpp_movem_index2[256];
33	–	extern int fpp_movem_next[256];
34	–
23		extern int broken_in;
24
25	<	typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
25	>	/* Control flow information */
26	>	#define CFLOW_NORMAL            0
27	>	#define CFLOW_BRANCH            1
28	>	#define CFLOW_JUMP                      2
29	>	#define CFLOW_TRAP                      CFLOW_JUMP
30	>	#define CFLOW_RETURN            3
31	>	#define CFLOW_SPCFLAGS          32      /* some spcflags are set */
32	>	#define CFLOW_EXEC_RETURN       64      /* must exit from the execution loop */
33	>
34	>	#define cpuop_rettype           void
35	>	#define cpuop_return(v)         do { (v); return; } while (0)
36	>
37	>	#ifdef X86_ASSEMBLY
38	>	/* This hack seems to force all register saves (pushl %reg) to be moved to the
39	>	begining of the function, thus making it possible to cpuopti to remove them
40	>	since m68k_run_1 will save those registers before calling the instruction
41	>	handler */
42	>	# define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
43	>	#else
44	>	# define cpuop_tag(tag)         ;
45	>	#endif
46	>
47	>	#define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
48	>	#define cpuop_end(cflow)        do { cpuop_tag("end"); cpuop_return(cflow); } while (0)
49
50	+	typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM;
51	+
52		struct cputbl {
53		cpuop_func *handler;
54	<	int specific;
54	>	uae_u16 specific;
55		uae_u16 opcode;
56		};
57
58	<	extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
58	>	extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM;
59
60		typedef char flagtype;
61
62	<	extern struct regstruct
63	<	{
51	<	uae_u32 regs[16];
52	<	uaecptr  usp,isp,msp;
53	<	uae_u16 sr;
54	<	flagtype t1;
55	<	flagtype t0;
56	<	flagtype s;
57	<	flagtype m;
58	<	flagtype x;
59	<	flagtype stopped;
60	<	int intmask;
61	<
62	<	uae_u32 pc;
63	<	uae_u8 *pc_p;
64	<	uae_u8 *pc_oldp;
65	<
66	<	uae_u32 vbr,sfc,dfc;
62	>	struct regstruct {
63	>	uae_u32             regs[16];
64
65	<	double fp[8];
66	<	uae_u32 fpcr,fpsr,fpiar;
67	<
68	<	uae_u32 spcflags;
69	<	uae_u32 kick_mask;
65	>	uae_u32             pc;
66	>	uae_u8 *    pc_p;
67	>	uae_u8 *    pc_oldp;
68	>
69	>	spcflags_t      spcflags;
70	>	int                 intmask;
71	>
72	>	uae_u32             vbr, sfc, dfc;
73	>	uaecptr             usp, isp, msp;
74	>	uae_u16             sr;
75	>	flagtype    t1;
76	>	flagtype    t0;
77	>	flagtype    s;
78	>	flagtype    m;
79	>	flagtype    x;
80	>	flagtype    stopped;
81
82	+	#if USE_PREFETCH_BUFFER
83		/* Fellow sources say this is 4 longwords. That's impossible. It needs
84		* to be at least a longword. The HRM has some cryptic comment about two
85		* instructions being on the same longword boundary.
86		* The way this is implemented now seems like a good compromise.
87		*/
88		uae_u32 prefetch;
89	<	} regs, lastint_regs;
89	>	#endif
90	>	};
91	>
92	>	extern regstruct regs, lastint_regs;
93
94		#define m68k_dreg(r,num) ((r).regs[(num)])
95		#define m68k_areg(r,num) (((r).regs + 8)[(num)])
#	Line 92 | Line 104 | extern struct regstruct
104		#define GET_OPCODE (get_iword (0))
105		#endif
106
107	+	#if USE_PREFETCH_BUFFER
108		static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
109		{
110		if (o > 3 || o < 0)
#	Line 114 | Line 127 | static __inline__ uae_u32 get_ilong_pref
127		return do_get_mem_long(&regs.prefetch);
128		return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
129		}
130	+	#endif
131
132		#define m68k_incpc(o) (regs.pc_p += (o))
133
#	Line 166 | Line 180 | static __inline__ uae_u32 next_ilong (vo
180		return r;
181		}
182
169	–	#if !defined USE_COMPILER
183		static __inline__ void m68k_setpc (uaecptr newpc)
184		{
185		#if REAL_ADDRESSING || DIRECT_ADDRESSING
#	Line 176 | Line 189 | static __inline__ void m68k_setpc (uaecp
189		regs.pc = newpc;
190		#endif
191		}
179	–	#else
180	–	extern void m68k_setpc (uaecptr newpc);
181	–	#endif
192
193		static __inline__ uaecptr m68k_getpc (void)
194		{
#	Line 189 | Line 199 | static __inline__ uaecptr m68k_getpc (vo
199		#endif
200		}
201
192	–	#ifdef USE_COMPILER
193	–	extern void m68k_setpc_fast (uaecptr newpc);
194	–	extern void m68k_setpc_bcc (uaecptr newpc);
195	–	extern void m68k_setpc_rte (uaecptr newpc);
196	–	#else
202		#define m68k_setpc_fast m68k_setpc
203		#define m68k_setpc_bcc  m68k_setpc
204		#define m68k_setpc_rte  m68k_setpc
200	–	#endif
205
206		static __inline__ void m68k_do_rts(void)
207		{
#	Line 225 | Line 229 | static __inline__ void m68k_setstopped (
229		/* A traced STOP instruction drops through immediately without
230		actually stopping.  */
231		if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
232	<	regs.spcflags |= SPCFLAG_STOP;
232	>	SPCFLAGS_SET( SPCFLAG_STOP );
233		}
234
235		extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
#	Line 241 | Line 245 | extern int m68k_move2c (int, uae_u32 *);
245		extern int m68k_movec2 (int, uae_u32 *);
246		extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
247		extern void m68k_mull (uae_u32, uae_u32, uae_u16);
248	+	extern void m68k_emulop (uae_u32);
249	+	extern void m68k_emulop_return (void);
250		extern void init_m68k (void);
251		extern void exit_m68k (void);
246	–	extern void m68k_go (int);
252		extern void m68k_dumpstate (uaecptr *);
253		extern void m68k_disasm (uaecptr, uaecptr *, int);
254		extern void m68k_reset (void);
255		extern void m68k_enter_debugger(void);
256	+	extern int m68k_do_specialties(void);
257
258		extern void mmu_op (uae_u32, uae_u16);
259
254	–	extern void fpp_opp (uae_u32, uae_u16);
255	–	extern void fdbcc_opp (uae_u32, uae_u16);
256	–	extern void fscc_opp (uae_u32, uae_u16);
257	–	extern void ftrapcc_opp (uae_u32,uaecptr);
258	–	extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
259	–	extern void fsave_opp (uae_u32);
260	–	extern void frestore_opp (uae_u32);
261	–
262	–	extern void fpu_set_integral_fpu (bool is_integral);
263	–	extern void fpu_init (void);
264	–	extern void fpu_exit (void);
265	–	extern void fpu_reset (void);
266	–
260		/* Opcode of faulting instruction */
261		extern uae_u16 last_op_for_exception_3;
262		/* PC at fault time */
#	Line 274 | Line 267 | extern uaecptr last_fault_for_exception_
267		#define CPU_OP_NAME(a) op ## a
268
269		/* 68020 + 68881 */
270	<	extern struct cputbl op_smalltbl_0[];
270	>	extern struct cputbl op_smalltbl_0_ff[];
271		/* 68020 */
272	<	extern struct cputbl op_smalltbl_1[];
272	>	extern struct cputbl op_smalltbl_1_ff[];
273		/* 68010 */
274	<	extern struct cputbl op_smalltbl_2[];
274	>	extern struct cputbl op_smalltbl_2_ff[];
275		/* 68000 */
276	<	extern struct cputbl op_smalltbl_3[];
276	>	extern struct cputbl op_smalltbl_3_ff[];
277		/* 68000 slow but compatible.  */
278	<	extern struct cputbl op_smalltbl_4[];
286	<
287	<	extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
278	>	extern struct cputbl op_smalltbl_4_ff[];
279
280	+	extern void m68k_do_execute(void);
281	+	extern void m68k_execute(void);
282	+
283		#endif /* NEWCPU_H */

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