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root/cebix/BasiliskII/src/uae_cpu/newcpu.h
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Comparing BasiliskII/src/uae_cpu/newcpu.h (file contents):
Revision 1.4 by gbeauche, 2000-09-22T17:21:45Z vs.
Revision 1.17 by asvitkine, 2012-03-30T01:25:46Z

# Line 1 | Line 1
1 < /*
2 <  * UAE - The Un*x Amiga Emulator
3 <  *
4 <  * MC68000 emulation
5 <  *
6 <  * Copyright 1995 Bernd Schmidt
7 <  */
1 > /*
2 > * UAE - The Un*x Amiga Emulator
3 > *
4 > * MC68000 emulation
5 > *
6 > * Copyright 1995 Bernd Schmidt
7 > *
8 > * This program is free software; you can redistribute it and/or modify
9 > * it under the terms of the GNU General Public License as published by
10 > * the Free Software Foundation; either version 2 of the License, or
11 > * (at your option) any later version.
12 > *
13 > * This program is distributed in the hope that it will be useful,
14 > * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 > * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 > * GNU General Public License for more details.
17 > *
18 > * You should have received a copy of the GNU General Public License
19 > * along with this program; if not, write to the Free Software
20 > * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 > */
22  
23   #ifndef NEWCPU_H
24   #define NEWCPU_H
25  
26 < #define SPCFLAG_STOP 2
27 < #define SPCFLAG_DISK 4
14 < #define SPCFLAG_INT  8
15 < #define SPCFLAG_BRK  16
16 < #define SPCFLAG_EXTRA_CYCLES 32
17 < #define SPCFLAG_TRACE 64
18 < #define SPCFLAG_DOTRACE 128
19 < #define SPCFLAG_DOINT 256
20 < #define SPCFLAG_BLTNASTY 512
21 < #define SPCFLAG_EXEC 1024
22 < #define SPCFLAG_MODE_CHANGE 8192
23 <
24 < #ifndef SET_CFLG
25 <
26 < #define SET_CFLG(x) (CFLG = (x))
27 < #define SET_NFLG(x) (NFLG = (x))
28 < #define SET_VFLG(x) (VFLG = (x))
29 < #define SET_ZFLG(x) (ZFLG = (x))
30 < #define SET_XFLG(x) (XFLG = (x))
31 <
32 < #define GET_CFLG CFLG
33 < #define GET_NFLG NFLG
34 < #define GET_VFLG VFLG
35 < #define GET_ZFLG ZFLG
36 < #define GET_XFLG XFLG
37 <
38 < #define CLEAR_CZNV do { \
39 < SET_CFLG (0); \
40 < SET_ZFLG (0); \
41 < SET_NFLG (0); \
42 < SET_VFLG (0); \
43 < } while (0)
44 <
45 < #define COPY_CARRY (SET_XFLG (GET_CFLG))
26 > #ifndef FLIGHT_RECORDER
27 > #define FLIGHT_RECORDER 0
28   #endif
29  
30 + #include "m68k.h"
31 + #include "readcpu.h"
32 + #include "spcflags.h"
33 +
34   extern int areg_byteinc[];
35   extern int imm8_table[];
36  
# Line 52 | Line 38 | extern int movem_index1[256];
38   extern int movem_index2[256];
39   extern int movem_next[256];
40  
55 extern int fpp_movem_index1[256];
56 extern int fpp_movem_index2[256];
57 extern int fpp_movem_next[256];
58
41   extern int broken_in;
42  
43 < typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
43 > #ifdef X86_ASSEMBLY
44 > /* This hack seems to force all register saves (pushl %reg) to be moved to the
45 >   begining of the function, thus making it possible to cpuopti to remove them
46 >   since m68k_run_1 will save those registers before calling the instruction
47 >   handler */
48 > # define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
49 > #else
50 > # define cpuop_tag(tag)         ;
51 > #endif
52 >
53 > #define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
54 > #define cpuop_end()                     do { cpuop_tag("end"); } while (0)
55  
56 + typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
57 +
58   struct cputbl {
59      cpuop_func *handler;
60 <    int specific;
60 >    uae_u16 specific;
61      uae_u16 opcode;
62   };
63  
64 < extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
64 > extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
65  
66 < typedef char flagtype;
66 > #if USE_JIT
67 > typedef void compop_func (uae_u32) REGPARAM;
68  
69 < extern struct regstruct
70 < {
71 <    uae_u32 regs[16];
72 <    uaecptr  usp,isp,msp;
73 <    uae_u16 sr;
74 <    flagtype t1;
79 <    flagtype t0;
80 <    flagtype s;
81 <    flagtype m;
82 <    flagtype x;
83 <    flagtype stopped;
84 <    int intmask;
85 <
86 <    uae_u32 pc;
87 <    uae_u8 *pc_p;
88 <    uae_u8 *pc_oldp;
69 > struct comptbl {
70 >    compop_func *handler;
71 >        uae_u32         specific;
72 >        uae_u32         opcode;
73 > };
74 > #endif
75  
76 <    uae_u32 vbr,sfc,dfc;
76 > extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
77 >
78 > typedef char flagtype;
79  
80 <    double fp[8];
81 <    uae_u32 fpcr,fpsr,fpiar;
80 > struct regstruct {
81 >    uae_u32             regs[16];
82  
83 <    uae_u32 spcflags;
84 <    uae_u32 kick_mask;
83 >    uae_u32             pc;
84 >    uae_u8 *    pc_p;
85 >    uae_u8 *    pc_oldp;
86 >
87 >        spcflags_t      spcflags;
88 >    int                 intmask;
89 >
90 >    uae_u32             vbr, sfc, dfc;
91 >    uaecptr             usp, isp, msp;
92 >    uae_u16             sr;
93 >    flagtype    t1;
94 >    flagtype    t0;
95 >    flagtype    s;
96 >    flagtype    m;
97 >    flagtype    x;
98 >    flagtype    stopped;
99  
100 + #if USE_PREFETCH_BUFFER
101      /* Fellow sources say this is 4 longwords. That's impossible. It needs
102       * to be at least a longword. The HRM has some cryptic comment about two
103       * instructions being on the same longword boundary.
104       * The way this is implemented now seems like a good compromise.
105       */
106      uae_u32 prefetch;
107 < } regs, lastint_regs;
107 > #endif
108 > };
109 >
110 > extern regstruct regs, lastint_regs;
111  
112   #define m68k_dreg(r,num) ((r).regs[(num)])
113   #define m68k_areg(r,num) (((r).regs + 8)[(num)])
# Line 116 | Line 122 | extern struct regstruct
122   #define GET_OPCODE (get_iword (0))
123   #endif
124  
125 + #if USE_PREFETCH_BUFFER
126   static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
127   {
128      if (o > 3 || o < 0)
# Line 138 | Line 145 | static __inline__ uae_u32 get_ilong_pref
145          return do_get_mem_long(&regs.prefetch);
146      return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
147   }
148 + #endif
149  
150   #define m68k_incpc(o) (regs.pc_p += (o))
151  
# Line 190 | Line 198 | static __inline__ uae_u32 next_ilong (vo
198      return r;
199   }
200  
193 #if !defined USE_COMPILER
201   static __inline__ void m68k_setpc (uaecptr newpc)
202   {
203   #if REAL_ADDRESSING || DIRECT_ADDRESSING
# Line 200 | Line 207 | static __inline__ void m68k_setpc (uaecp
207      regs.pc = newpc;
208   #endif
209   }
203 #else
204 extern void m68k_setpc (uaecptr newpc);
205 #endif
210  
211   static __inline__ uaecptr m68k_getpc (void)
212   {
# Line 213 | Line 217 | static __inline__ uaecptr m68k_getpc (vo
217   #endif
218   }
219  
216 #ifdef USE_COMPILER
217 extern void m68k_setpc_fast (uaecptr newpc);
218 extern void m68k_setpc_bcc (uaecptr newpc);
219 extern void m68k_setpc_rte (uaecptr newpc);
220 #else
220   #define m68k_setpc_fast m68k_setpc
221   #define m68k_setpc_bcc  m68k_setpc
222   #define m68k_setpc_rte  m68k_setpc
223 < #endif
223 >
224 > static __inline__ void m68k_do_rts(void)
225 > {
226 >            m68k_setpc(get_long(m68k_areg(regs, 7)));
227 >                m68k_areg(regs, 7) += 4;
228 > }
229 >
230 > static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
231 > {
232 >            m68k_areg(regs, 7) -= 4;
233 >                put_long(m68k_areg(regs, 7), oldpc);
234 >                    m68k_incpc(offset);
235 > }
236 >
237 > static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
238 > {
239 >            m68k_areg(regs, 7) -= 4;
240 >                put_long(m68k_areg(regs, 7), oldpc);
241 >                    m68k_setpc(dest);
242 > }
243  
244   static __inline__ void m68k_setstopped (int stop)
245   {
246      regs.stopped = stop;
247 <    if (stop)
248 <        regs.spcflags |= SPCFLAG_STOP;
247 >    /* A traced STOP instruction drops through immediately without
248 >       actually stopping.  */
249 >    if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
250 >    SPCFLAGS_SET( SPCFLAG_STOP );
251   }
252  
253   extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
# Line 239 | Line 259 | extern void MakeSR (void);
259   extern void MakeFromSR (void);
260   extern void Exception (int, uaecptr);
261   extern void dump_counts (void);
262 < extern void m68k_move2c (int, uae_u32 *);
263 < extern void m68k_movec2 (int, uae_u32 *);
262 > extern int m68k_move2c (int, uae_u32 *);
263 > extern int m68k_movec2 (int, uae_u32 *);
264   extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
265   extern void m68k_mull (uae_u32, uae_u32, uae_u16);
266 + extern void m68k_emulop (uae_u32);
267 + extern void m68k_emulop_return (void);
268   extern void init_m68k (void);
269   extern void exit_m68k (void);
248 extern void m68k_go (int);
270   extern void m68k_dumpstate (uaecptr *);
271   extern void m68k_disasm (uaecptr, uaecptr *, int);
272   extern void m68k_reset (void);
273   extern void m68k_enter_debugger(void);
274 + extern int m68k_do_specialties(void);
275  
276   extern void mmu_op (uae_u32, uae_u16);
277  
256 extern void fpp_opp (uae_u32, uae_u16);
257 extern void fdbcc_opp (uae_u32, uae_u16);
258 extern void fscc_opp (uae_u32, uae_u16);
259 extern void ftrapcc_opp (uae_u32,uaecptr);
260 extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
261 extern void fsave_opp (uae_u32);
262 extern void frestore_opp (uae_u32);
263
264 extern void fpu_set_integral_fpu (bool is_integral);
265 extern void fpu_init (void);
266 extern void fpu_exit (void);
267 extern void fpu_reset (void);
268
278   /* Opcode of faulting instruction */
279   extern uae_u16 last_op_for_exception_3;
280   /* PC at fault time */
# Line 276 | Line 285 | extern uaecptr last_fault_for_exception_
285   #define CPU_OP_NAME(a) op ## a
286  
287   /* 68020 + 68881 */
288 < extern struct cputbl op_smalltbl_0[];
288 > extern struct cputbl op_smalltbl_0_ff[];
289   /* 68020 */
290 < extern struct cputbl op_smalltbl_1[];
290 > extern struct cputbl op_smalltbl_1_ff[];
291   /* 68010 */
292 < extern struct cputbl op_smalltbl_2[];
292 > extern struct cputbl op_smalltbl_2_ff[];
293   /* 68000 */
294 < extern struct cputbl op_smalltbl_3[];
294 > extern struct cputbl op_smalltbl_3_ff[];
295   /* 68000 slow but compatible.  */
296 < extern struct cputbl op_smalltbl_4[];
296 > extern struct cputbl op_smalltbl_4_ff[];
297  
298 < extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
298 > #if FLIGHT_RECORDER
299 > extern void m68k_record_step(uaecptr) REGPARAM;
300 > #endif
301 > extern void m68k_do_execute(void);
302 > extern void m68k_execute(void);
303 > #if USE_JIT
304 > extern void m68k_compile_execute(void);
305 > #endif
306 > #ifdef USE_CPU_EMUL_SERVICES
307 > extern int32 emulated_ticks;
308 > extern void cpu_do_check_ticks(void);
309  
310 + static inline void cpu_check_ticks(void)
311 + {
312 +        if (--emulated_ticks <= 0)
313 +                cpu_do_check_ticks();
314 + }
315 + #else
316 + #define cpu_check_ticks()
317 + #define cpu_do_check_ticks()
318 + #endif
319 +
320   #endif /* NEWCPU_H */

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