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root/cebix/BasiliskII/src/uae_cpu/newcpu.h

Comparing BasiliskII/src/uae_cpu/newcpu.h (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.8 by gbeauche, 2002-09-01T15:17:13Z

#	Line 6 | Line 6
6		* Copyright 1995 Bernd Schmidt
7		*/
8
9	<	#define SPCFLAG_STOP 2
10	<	#define SPCFLAG_DISK 4
11	<	#define SPCFLAG_INT  8
12	<	#define SPCFLAG_BRK  16
13	<	#define SPCFLAG_EXTRA_CYCLES 32
14	<	#define SPCFLAG_TRACE 64
15	<	#define SPCFLAG_DOTRACE 128
16	<	#define SPCFLAG_DOINT 256
17	<	#define SPCFLAG_BLTNASTY 512
18	<	#define SPCFLAG_EXEC 1024
19	<	#define SPCFLAG_MODE_CHANGE 8192
20	<
21	<	#ifndef SET_CFLG
22	<
23	<	#define SET_CFLG(x) (CFLG = (x))
24	<	#define SET_NFLG(x) (NFLG = (x))
25	<	#define SET_VFLG(x) (VFLG = (x))
26	<	#define SET_ZFLG(x) (ZFLG = (x))
27	<	#define SET_XFLG(x) (XFLG = (x))
28	<
29	<	#define GET_CFLG CFLG
30	<	#define GET_NFLG NFLG
31	<	#define GET_VFLG VFLG
32	<	#define GET_ZFLG ZFLG
33	<	#define GET_XFLG XFLG
34	<
35	<	#define CLEAR_CZNV do { \
36	<	SET_CFLG (0); \
37	<	SET_ZFLG (0); \
38	<	SET_NFLG (0); \
39	<	SET_VFLG (0); \
40	<	} while (0)
41	<
42	<	#define COPY_CARRY (SET_XFLG (GET_CFLG))
43	<	#endif
9	>	#ifndef NEWCPU_H
10	>	#define NEWCPU_H
11
12	+	#include "m68k.h"
13	+	#include "readcpu.h"
14	+	#include "spcflags.h"
15	+
16		extern int areg_byteinc[];
17		extern int imm8_table[];
18
#	Line 55 | Line 26 | extern int fpp_movem_next[256];
26
27		extern int broken_in;
28
29	<	typedef unsigned long REGPARAM2 cpuop_func (uae_u32) REGPARAM;
29	>	/* Control flow information */
30	>	#define CFLOW_NORMAL            0
31	>	#define CFLOW_BRANCH            1
32	>	#define CFLOW_JUMP                      2
33	>	#define CFLOW_TRAP                      CFLOW_JUMP
34	>	#define CFLOW_RETURN            3
35	>	#define CFLOW_SPCFLAGS          32      /* some spcflags are set */
36	>	#define CFLOW_EXEC_RETURN       64      /* must exit from the execution loop */
37	>
38	>	#define cpuop_rettype           void
39	>	#define cpuop_return(v)         do { (v); return; } while (0)
40	>
41	>	#ifdef X86_ASSEMBLY
42	>	/* This hack seems to force all register saves (pushl %reg) to be moved to the
43	>	begining of the function, thus making it possible to cpuopti to remove them
44	>	since m68k_run_1 will save those registers before calling the instruction
45	>	handler */
46	>	# define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
47	>	#else
48	>	# define cpuop_tag(tag)         ;
49	>	#endif
50	>
51	>	#define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
52	>	#define cpuop_end(cflow)        do { cpuop_tag("end"); cpuop_return(cflow); } while (0)
53
54	+	typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM;
55	+
56		struct cputbl {
57		cpuop_func *handler;
58	<	int specific;
58	>	uae_u16 specific;
59		uae_u16 opcode;
60		};
61
62	<	extern unsigned long REGPARAM2 op_illg (uae_u32) REGPARAM;
62	>	extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM;
63
64		typedef char flagtype;
65
66	<	extern struct regstruct
67	<	{
72	<	uae_u32 regs[16];
73	<	uaecptr  usp,isp,msp;
74	<	uae_u16 sr;
75	<	flagtype t1;
76	<	flagtype t0;
77	<	flagtype s;
78	<	flagtype m;
79	<	flagtype x;
80	<	flagtype stopped;
81	<	int intmask;
82	<
83	<	uae_u32 pc;
84	<	uae_u8 *pc_p;
85	<	uae_u8 *pc_oldp;
86	<
87	<	uae_u32 vbr,sfc,dfc;
66	>	struct regstruct {
67	>	uae_u32             regs[16];
68
69	<	double fp[8];
70	<	uae_u32 fpcr,fpsr,fpiar;
69	>	uae_u32             pc;
70	>	uae_u8 *    pc_p;
71	>	uae_u8 *    pc_oldp;
72	>
73	>	spcflags_t      spcflags;
74	>	int                 intmask;
75	>
76	>	uae_u32             vbr, sfc, dfc;
77	>	uaecptr             usp, isp, msp;
78	>	uae_u16             sr;
79	>	flagtype    t1;
80	>	flagtype    t0;
81	>	flagtype    s;
82	>	flagtype    m;
83	>	flagtype    x;
84	>	flagtype    stopped;
85
86	<	uae_u32 spcflags;
87	<	uae_u32 kick_mask;
86	>	double              fp[8];
87	>	uae_u32             fpcr,fpsr,fpiar;
88
89	+	#if USE_PREFETCH_BUFFER
90		/* Fellow sources say this is 4 longwords. That's impossible. It needs
91		* to be at least a longword. The HRM has some cryptic comment about two
92		* instructions being on the same longword boundary.
93		* The way this is implemented now seems like a good compromise.
94		*/
95		uae_u32 prefetch;
96	<	} regs, lastint_regs;
96	>	#endif
97	>	};
98	>
99	>	extern regstruct regs, lastint_regs;
100
101		#define m68k_dreg(r,num) ((r).regs[(num)])
102		#define m68k_areg(r,num) (((r).regs + 8)[(num)])
#	Line 113 | Line 111 | extern struct regstruct
111		#define GET_OPCODE (get_iword (0))
112		#endif
113
114	+	#if USE_PREFETCH_BUFFER
115		static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
116		{
117		if (o > 3 || o < 0)
#	Line 135 | Line 134 | static __inline__ uae_u32 get_ilong_pref
134		return do_get_mem_long(&regs.prefetch);
135		return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
136		}
137	+	#endif
138
139		#define m68k_incpc(o) (regs.pc_p += (o))
140
141		static __inline__ void fill_prefetch_0 (void)
142		{
143	+	#if USE_PREFETCH_BUFFER
144		uae_u32 r;
145		#ifdef UNALIGNED_PROFITABLE
146		r = *(uae_u32 *)regs.pc_p;
#	Line 148 | Line 149 | static __inline__ void fill_prefetch_0 (
149		r = do_get_mem_long ((uae_u32 *)regs.pc_p);
150		do_put_mem_long (&regs.prefetch, r);
151		#endif
152	+	#endif
153		}
154
155		#if 0
#	Line 185 | Line 187 | static __inline__ uae_u32 next_ilong (vo
187		return r;
188		}
189
188	–	#if !defined USE_COMPILER
190		static __inline__ void m68k_setpc (uaecptr newpc)
191		{
192	+	#if REAL_ADDRESSING || DIRECT_ADDRESSING
193	+	regs.pc_p = get_real_address(newpc);
194	+	#else
195		regs.pc_p = regs.pc_oldp = get_real_address(newpc);
196		regs.pc = newpc;
193	–	}
194	–	#else
195	–	extern void m68k_setpc (uaecptr newpc);
197		#endif
198	+	}
199
200		static __inline__ uaecptr m68k_getpc (void)
201		{
202	+	#if REAL_ADDRESSING || DIRECT_ADDRESSING
203	+	return get_virtual_address(regs.pc_p);
204	+	#else
205		return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
206	+	#endif
207		}
208
203	–	static __inline__ uaecptr m68k_getpc_p (uae_u8 *p)
204	–	{
205	–	return regs.pc + ((char *)p - (char *)regs.pc_oldp);
206	–	}
207	–
208	–	#ifdef USE_COMPILER
209	–	extern void m68k_setpc_fast (uaecptr newpc);
210	–	extern void m68k_setpc_bcc (uaecptr newpc);
211	–	extern void m68k_setpc_rte (uaecptr newpc);
212	–	#else
209		#define m68k_setpc_fast m68k_setpc
210		#define m68k_setpc_bcc  m68k_setpc
211		#define m68k_setpc_rte  m68k_setpc
212	<	#endif
212	>
213	>	static __inline__ void m68k_do_rts(void)
214	>	{
215	>	m68k_setpc(get_long(m68k_areg(regs, 7)));
216	>	m68k_areg(regs, 7) += 4;
217	>	}
218	>
219	>	static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
220	>	{
221	>	m68k_areg(regs, 7) -= 4;
222	>	put_long(m68k_areg(regs, 7), oldpc);
223	>	m68k_incpc(offset);
224	>	}
225	>
226	>	static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
227	>	{
228	>	m68k_areg(regs, 7) -= 4;
229	>	put_long(m68k_areg(regs, 7), oldpc);
230	>	m68k_setpc(dest);
231	>	}
232
233		static __inline__ void m68k_setstopped (int stop)
234		{
235		regs.stopped = stop;
236	<	if (stop)
237	<	regs.spcflags |= SPCFLAG_STOP;
236	>	/* A traced STOP instruction drops through immediately without
237	>	actually stopping.  */
238	>	if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
239	>	SPCFLAGS_SET( SPCFLAG_STOP );
240		}
241
242		extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
#	Line 231 | Line 248 | extern void MakeSR (void);
248		extern void MakeFromSR (void);
249		extern void Exception (int, uaecptr);
250		extern void dump_counts (void);
251	<	extern void m68k_move2c (int, uae_u32 *);
252	<	extern void m68k_movec2 (int, uae_u32 *);
251	>	extern int m68k_move2c (int, uae_u32 *);
252	>	extern int m68k_movec2 (int, uae_u32 *);
253		extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
254		extern void m68k_mull (uae_u32, uae_u32, uae_u16);
255	+	extern void m68k_emulop (uae_u32);
256	+	extern void m68k_emulop_return (void);
257		extern void init_m68k (void);
258	<	extern void m68k_go (int);
258	>	extern void exit_m68k (void);
259		extern void m68k_dumpstate (uaecptr *);
260		extern void m68k_disasm (uaecptr, uaecptr *, int);
261		extern void m68k_reset (void);
262		extern void m68k_enter_debugger(void);
263	+	extern int m68k_do_specialties(void);
264
265		extern void mmu_op (uae_u32, uae_u16);
266
#	Line 252 | Line 272 | extern void fbcc_opp (uae_u32, uaecptr,
272		extern void fsave_opp (uae_u32);
273		extern void frestore_opp (uae_u32);
274
275	+	extern void fpu_set_integral_fpu (bool is_integral);
276	+	extern void fpu_init (void);
277	+	extern void fpu_exit (void);
278	+	extern void fpu_reset (void);
279	+
280		/* Opcode of faulting instruction */
281		extern uae_u16 last_op_for_exception_3;
282		/* PC at fault time */
#	Line 262 | Line 287 | extern uaecptr last_fault_for_exception_
287		#define CPU_OP_NAME(a) op ## a
288
289		/* 68020 + 68881 */
290	<	extern struct cputbl op_smalltbl_0[];
290	>	extern struct cputbl op_smalltbl_0_ff[];
291		/* 68020 */
292	<	extern struct cputbl op_smalltbl_1[];
292	>	extern struct cputbl op_smalltbl_1_ff[];
293		/* 68010 */
294	<	extern struct cputbl op_smalltbl_2[];
294	>	extern struct cputbl op_smalltbl_2_ff[];
295		/* 68000 */
296	<	extern struct cputbl op_smalltbl_3[];
296	>	extern struct cputbl op_smalltbl_3_ff[];
297		/* 68000 slow but compatible.  */
298	<	extern struct cputbl op_smalltbl_4[];
274	<
275	<	extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
298	>	extern struct cputbl op_smalltbl_4_ff[];
299
300	+	extern void m68k_do_execute(void);
301	+	extern void m68k_execute(void);
302	+
303	+	#endif /* NEWCPU_H */

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