src/uae_cpu/newcpu.h

 /*
  * UAE - The Un*x Amiga Emulator
  *
  * MC68000 emulation
  *
  * Copyright 1995 Bernd Schmidt
  */

#ifndef NEWCPU_H
#define NEWCPU_H

#define SPCFLAG_STOP 2
#define SPCFLAG_DISK 4
#define SPCFLAG_INT  8
#define SPCFLAG_BRK  16
#define SPCFLAG_EXTRA_CYCLES 32
#define SPCFLAG_TRACE 64
#define SPCFLAG_DOTRACE 128
#define SPCFLAG_DOINT 256
#define SPCFLAG_BLTNASTY 512
#define SPCFLAG_EXEC 1024
#define SPCFLAG_MODE_CHANGE 8192

extern int areg_byteinc[];
extern int imm8_table[];

extern int movem_index1[256];
extern int movem_index2[256];
extern int movem_next[256];

extern int fpp_movem_index1[256];
extern int fpp_movem_index2[256];
extern int fpp_movem_next[256];

extern int broken_in;

typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;

struct cputbl {
    cpuop_func *handler;
    int specific;
    uae_u16 opcode;
};

extern void REGPARAM2 op_illg (uae_u32) REGPARAM;

typedef char flagtype;

extern struct regstruct
{
    uae_u32 regs[16];
    uaecptr  usp,isp,msp;
    uae_u16 sr;
    flagtype t1;
    flagtype t0;
    flagtype s;
    flagtype m;
    flagtype x;
    flagtype stopped;
    int intmask;

    uae_u32 pc;
    uae_u8 *pc_p;
    uae_u8 *pc_oldp;

    uae_u32 vbr,sfc,dfc;

    double fp[8];
    uae_u32 fpcr,fpsr,fpiar;

    uae_u32 spcflags;
    uae_u32 kick_mask;

    /* Fellow sources say this is 4 longwords. That's impossible. It needs
     * to be at least a longword. The HRM has some cryptic comment about two
     * instructions being on the same longword boundary.
     * The way this is implemented now seems like a good compromise.
     */
    uae_u32 prefetch;
} regs, lastint_regs;

#define m68k_dreg(r,num) ((r).regs[(num)])
#define m68k_areg(r,num) (((r).regs + 8)[(num)])

#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))

#ifdef HAVE_GET_WORD_UNSWAPPED
#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
#else
#define GET_OPCODE (get_iword (0))
#endif

static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));

    return do_get_mem_byte((uae_u8 *)(((uae_u8 *)&regs.prefetch) + o + 1));
}
static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_word((uae_u16 *)(regs.pc_p + o));

    return do_get_mem_word((uae_u16 *)(((uae_u8 *)&regs.prefetch) + o));
}
static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
    if (o == 0)
        return do_get_mem_long(&regs.prefetch);
    return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
}

#define m68k_incpc(o) (regs.pc_p += (o))

static __inline__ void fill_prefetch_0 (void)
{
#if USE_PREFETCH_BUFFER
    uae_u32 r;
#ifdef UNALIGNED_PROFITABLE
    r = *(uae_u32 *)regs.pc_p;
    regs.prefetch = r;
#else
    r = do_get_mem_long ((uae_u32 *)regs.pc_p);
    do_put_mem_long (&regs.prefetch, r);
#endif
#endif
}

#if 0
static __inline__ void fill_prefetch_2 (void)
{
    uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
    uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
    r |= r2;
    do_put_mem_long (&regs.prefetch, r);
}
#else
#define fill_prefetch_2 fill_prefetch_0
#endif

/* These are only used by the 68020/68881 code, and therefore don't
 * need to handle prefetch.  */
static __inline__ uae_u32 next_ibyte (void)
{
    uae_u32 r = get_ibyte (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_iword (void)
{
    uae_u32 r = get_iword (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_ilong (void)
{
    uae_u32 r = get_ilong (0);
    m68k_incpc (4);
    return r;
}

#if !defined USE_COMPILER
static __inline__ void m68k_setpc (uaecptr newpc)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        regs.pc_p = get_real_address(newpc);
#else
    regs.pc_p = regs.pc_oldp = get_real_address(newpc);
    regs.pc = newpc;
#endif
}
#else
extern void m68k_setpc (uaecptr newpc);
#endif

static __inline__ uaecptr m68k_getpc (void)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        return get_virtual_address(regs.pc_p);
#else
    return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
#endif
}

#ifdef USE_COMPILER
extern void m68k_setpc_fast (uaecptr newpc);
extern void m68k_setpc_bcc (uaecptr newpc);
extern void m68k_setpc_rte (uaecptr newpc);
#else
#define m68k_setpc_fast m68k_setpc
#define m68k_setpc_bcc  m68k_setpc
#define m68k_setpc_rte  m68k_setpc
#endif

static __inline__ void m68k_do_rts(void)
{
            m68k_setpc(get_long(m68k_areg(regs, 7)));
                m68k_areg(regs, 7) += 4;
}
 
static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_incpc(offset);
}
 
static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_setpc(dest);
}

static __inline__ void m68k_setstopped (int stop)
{
    regs.stopped = stop;
    /* A traced STOP instruction drops through immediately without
       actually stopping.  */
    if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
        regs.spcflags |= SPCFLAG_STOP;
}

extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);

extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);

extern void MakeSR (void);
extern void MakeFromSR (void);
extern void Exception (int, uaecptr);
extern void dump_counts (void);
extern int m68k_move2c (int, uae_u32 *);
extern int m68k_movec2 (int, uae_u32 *);
extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
extern void m68k_mull (uae_u32, uae_u32, uae_u16);
extern void init_m68k (void);
extern void exit_m68k (void);
extern void m68k_go (int);
extern void m68k_dumpstate (uaecptr *);
extern void m68k_disasm (uaecptr, uaecptr *, int);
extern void m68k_reset (void);
extern void m68k_enter_debugger(void);

extern void mmu_op (uae_u32, uae_u16);

extern void fpp_opp (uae_u32, uae_u16);
extern void fdbcc_opp (uae_u32, uae_u16);
extern void fscc_opp (uae_u32, uae_u16);
extern void ftrapcc_opp (uae_u32,uaecptr);
extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
extern void fsave_opp (uae_u32);
extern void frestore_opp (uae_u32);

extern void fpu_set_integral_fpu (bool is_integral);
extern void fpu_init (void);
extern void fpu_exit (void);
extern void fpu_reset (void);

/* Opcode of faulting instruction */
extern uae_u16 last_op_for_exception_3;
/* PC at fault time */
extern uaecptr last_addr_for_exception_3;
/* Address that generated the exception */
extern uaecptr last_fault_for_exception_3;

#define CPU_OP_NAME(a) op ## a

/* 68020 + 68881 */
extern struct cputbl op_smalltbl_0[];
/* 68020 */
extern struct cputbl op_smalltbl_1[];
/* 68010 */
extern struct cputbl op_smalltbl_2[];
/* 68000 */
extern struct cputbl op_smalltbl_3[];
/* 68000 slow but compatible.  */
extern struct cputbl op_smalltbl_4[];

extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");

#endif /* NEWCPU_H */
Revision:	1.7
Committed:	2002-03-23T13:57:38Z (22 years, 7 months ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
Changes since 1.6:	+3 -1 lines
Log Message:	- When X86_ASSEMBLY is set, aka when cpuopti is used, do call the instruction handler by hand and make sure to save %ebp too - Really merge cpu core with uae-0.8.21: - Trace mode fixes (Bernd Roesch & Bernd Schmidt) - Reintegrate PTEST and PFLUSH instructions back as no-ops
#	User	Rev	Content
1	cebix	1.1	/*
2			* UAE - The Un*x Amiga Emulator
3			*
4			* MC68000 emulation
5			*
6			* Copyright 1995 Bernd Schmidt
7			*/
8
9	gbeauche	1.4	#ifndef NEWCPU_H
10			#define NEWCPU_H
11
12	cebix	1.1	#define SPCFLAG_STOP 2
13			#define SPCFLAG_DISK 4
14			#define SPCFLAG_INT 8
15			#define SPCFLAG_BRK 16
16			#define SPCFLAG_EXTRA_CYCLES 32
17			#define SPCFLAG_TRACE 64
18			#define SPCFLAG_DOTRACE 128
19			#define SPCFLAG_DOINT 256
20			#define SPCFLAG_BLTNASTY 512
21			#define SPCFLAG_EXEC 1024
22			#define SPCFLAG_MODE_CHANGE 8192
23
24			extern int areg_byteinc[];
25			extern int imm8_table[];
26
27			extern int movem_index1[256];
28			extern int movem_index2[256];
29			extern int movem_next[256];
30
31			extern int fpp_movem_index1[256];
32			extern int fpp_movem_index2[256];
33			extern int fpp_movem_next[256];
34
35			extern int broken_in;
36
37	cebix	1.2	typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
38	cebix	1.1
39			struct cputbl {
40			cpuop_func *handler;
41			int specific;
42			uae_u16 opcode;
43			};
44
45	cebix	1.2	extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
46	cebix	1.1
47			typedef char flagtype;
48
49			extern struct regstruct
50			{
51			uae_u32 regs[16];
52			uaecptr usp,isp,msp;
53			uae_u16 sr;
54			flagtype t1;
55			flagtype t0;
56			flagtype s;
57			flagtype m;
58			flagtype x;
59			flagtype stopped;
60			int intmask;
61
62			uae_u32 pc;
63			uae_u8 *pc_p;
64			uae_u8 *pc_oldp;
65
66			uae_u32 vbr,sfc,dfc;
67
68			double fp[8];
69			uae_u32 fpcr,fpsr,fpiar;
70
71			uae_u32 spcflags;
72			uae_u32 kick_mask;
73
74			/* Fellow sources say this is 4 longwords. That's impossible. It needs
75			* to be at least a longword. The HRM has some cryptic comment about two
76			* instructions being on the same longword boundary.
77			* The way this is implemented now seems like a good compromise.
78			*/
79			uae_u32 prefetch;
80			} regs, lastint_regs;
81
82			#define m68k_dreg(r,num) ((r).regs[(num)])
83			#define m68k_areg(r,num) (((r).regs + 8)[(num)])
84
85			#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
86			#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
87			#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
88
89			#ifdef HAVE_GET_WORD_UNSWAPPED
90			#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
91			#else
92			#define GET_OPCODE (get_iword (0))
93			#endif
94
95			static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
96			{
97			if (o > 3 \|\| o < 0)
98			return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
99
100			return do_get_mem_byte((uae_u8 )(((uae_u8 )&regs.prefetch) + o + 1));
101			}
102			static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
103			{
104			if (o > 3 \|\| o < 0)
105			return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
106
107			return do_get_mem_word((uae_u16 )(((uae_u8 )&regs.prefetch) + o));
108			}
109			static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
110			{
111			if (o > 3 \|\| o < 0)
112			return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
113			if (o == 0)
114			return do_get_mem_long(&regs.prefetch);
115			return (do_get_mem_word (((uae_u16 )&regs.prefetch) + 1) << 16) \| do_get_mem_word ((uae_u16 )(regs.pc_p + 4));
116			}
117
118			#define m68k_incpc(o) (regs.pc_p += (o))
119
120			static __inline__ void fill_prefetch_0 (void)
121			{
122	gbeauche	1.4	#if USE_PREFETCH_BUFFER
123	cebix	1.1	uae_u32 r;
124			#ifdef UNALIGNED_PROFITABLE
125			r = (uae_u32 )regs.pc_p;
126			regs.prefetch = r;
127			#else
128			r = do_get_mem_long ((uae_u32 *)regs.pc_p);
129			do_put_mem_long (&regs.prefetch, r);
130			#endif
131	gbeauche	1.4	#endif
132	cebix	1.1	}
133
134			#if 0
135			static __inline__ void fill_prefetch_2 (void)
136			{
137			uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
138			uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
139			r \|= r2;
140			do_put_mem_long (&regs.prefetch, r);
141			}
142			#else
143			#define fill_prefetch_2 fill_prefetch_0
144			#endif
145
146			/* These are only used by the 68020/68881 code, and therefore don't
147			* need to handle prefetch. */
148			static __inline__ uae_u32 next_ibyte (void)
149			{
150			uae_u32 r = get_ibyte (0);
151			m68k_incpc (2);
152			return r;
153			}
154
155			static __inline__ uae_u32 next_iword (void)
156			{
157			uae_u32 r = get_iword (0);
158			m68k_incpc (2);
159			return r;
160			}
161
162			static __inline__ uae_u32 next_ilong (void)
163			{
164			uae_u32 r = get_ilong (0);
165			m68k_incpc (4);
166			return r;
167			}
168
169			#if !defined USE_COMPILER
170			static __inline__ void m68k_setpc (uaecptr newpc)
171			{
172	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
173			regs.pc_p = get_real_address(newpc);
174			#else
175	cebix	1.1	regs.pc_p = regs.pc_oldp = get_real_address(newpc);
176			regs.pc = newpc;
177	gbeauche	1.4	#endif
178	cebix	1.1	}
179			#else
180			extern void m68k_setpc (uaecptr newpc);
181			#endif
182
183			static __inline__ uaecptr m68k_getpc (void)
184			{
185	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
186			return get_virtual_address(regs.pc_p);
187			#else
188	cebix	1.1	return regs.pc + ((char )regs.pc_p - (char )regs.pc_oldp);
189	gbeauche	1.4	#endif
190	cebix	1.1	}
191
192			#ifdef USE_COMPILER
193			extern void m68k_setpc_fast (uaecptr newpc);
194			extern void m68k_setpc_bcc (uaecptr newpc);
195			extern void m68k_setpc_rte (uaecptr newpc);
196			#else
197			#define m68k_setpc_fast m68k_setpc
198			#define m68k_setpc_bcc m68k_setpc
199			#define m68k_setpc_rte m68k_setpc
200			#endif
201
202	gbeauche	1.5	static __inline__ void m68k_do_rts(void)
203			{
204			m68k_setpc(get_long(m68k_areg(regs, 7)));
205			m68k_areg(regs, 7) += 4;
206			}
207
208			static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
209			{
210			m68k_areg(regs, 7) -= 4;
211			put_long(m68k_areg(regs, 7), oldpc);
212			m68k_incpc(offset);
213			}
214
215			static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
216			{
217			m68k_areg(regs, 7) -= 4;
218			put_long(m68k_areg(regs, 7), oldpc);
219			m68k_setpc(dest);
220			}
221
222	cebix	1.1	static __inline__ void m68k_setstopped (int stop)
223			{
224			regs.stopped = stop;
225	gbeauche	1.7	/* A traced STOP instruction drops through immediately without
226			actually stopping. */
227			if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
228	cebix	1.1	regs.spcflags \|= SPCFLAG_STOP;
229			}
230
231			extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
232			extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
233
234			extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);
235
236			extern void MakeSR (void);
237			extern void MakeFromSR (void);
238			extern void Exception (int, uaecptr);
239			extern void dump_counts (void);
240	gbeauche	1.6	extern int m68k_move2c (int, uae_u32 *);
241			extern int m68k_movec2 (int, uae_u32 *);
242	cebix	1.1	extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
243			extern void m68k_mull (uae_u32, uae_u32, uae_u16);
244			extern void init_m68k (void);
245	gbeauche	1.3	extern void exit_m68k (void);
246	cebix	1.1	extern void m68k_go (int);
247			extern void m68k_dumpstate (uaecptr *);
248			extern void m68k_disasm (uaecptr, uaecptr *, int);
249			extern void m68k_reset (void);
250			extern void m68k_enter_debugger(void);
251
252			extern void mmu_op (uae_u32, uae_u16);
253
254			extern void fpp_opp (uae_u32, uae_u16);
255			extern void fdbcc_opp (uae_u32, uae_u16);
256			extern void fscc_opp (uae_u32, uae_u16);
257			extern void ftrapcc_opp (uae_u32,uaecptr);
258			extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
259			extern void fsave_opp (uae_u32);
260			extern void frestore_opp (uae_u32);
261	gbeauche	1.3
262			extern void fpu_set_integral_fpu (bool is_integral);
263			extern void fpu_init (void);
264			extern void fpu_exit (void);
265			extern void fpu_reset (void);
266	cebix	1.1
267			/* Opcode of faulting instruction */
268			extern uae_u16 last_op_for_exception_3;
269			/* PC at fault time */
270			extern uaecptr last_addr_for_exception_3;
271			/* Address that generated the exception */
272			extern uaecptr last_fault_for_exception_3;
273
274			#define CPU_OP_NAME(a) op ## a
275
276			/* 68020 + 68881 */
277			extern struct cputbl op_smalltbl_0[];
278			/* 68020 */
279			extern struct cputbl op_smalltbl_1[];
280			/* 68010 */
281			extern struct cputbl op_smalltbl_2[];
282			/* 68000 */
283			extern struct cputbl op_smalltbl_3[];
284			/* 68000 slow but compatible. */
285			extern struct cputbl op_smalltbl_4[];
286
287			extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
288
289	gbeauche	1.4	#endif /* NEWCPU_H */