src/uae_cpu/newcpu.h

 /*
  * UAE - The Un*x Amiga Emulator
  *
  * MC68000 emulation
  *
  * Copyright 1995 Bernd Schmidt
  */

#ifndef NEWCPU_H
#define NEWCPU_H

#ifndef FLIGHT_RECORDER
#define FLIGHT_RECORDER 0
#endif

#include "m68k.h"
#include "readcpu.h"
#include "spcflags.h"
 
extern int areg_byteinc[];
extern int imm8_table[];

extern int movem_index1[256];
extern int movem_index2[256];
extern int movem_next[256];

extern int broken_in;

/* Control flow information */
#define CFLOW_NORMAL            0
#define CFLOW_BRANCH            1
#define CFLOW_JUMP                      2
#define CFLOW_RETURN            3
#define CFLOW_TRAP                      4
#define CFLOW_SPCFLAGS          32      /* some spcflags are set */
#define CFLOW_EXEC_RETURN       64      /* must exit from the execution loop */

#define cpuop_rettype           void
#define cpuop_return(v)         do { (v); return; } while (0)

#ifdef X86_ASSEMBLY
/* This hack seems to force all register saves (pushl %reg) to be moved to the
   begining of the function, thus making it possible to cpuopti to remove them
   since m68k_run_1 will save those registers before calling the instruction
   handler */
# define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
#else
# define cpuop_tag(tag)         ;
#endif

#define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
#define cpuop_end(cflow)        do { cpuop_tag("end"); cpuop_return(cflow); } while (0)

typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM;
 
struct cputbl {
    cpuop_func *handler;
    uae_u16 specific;
    uae_u16 opcode;
};

extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");

#if USE_JIT
typedef void compop_func (uae_u32) REGPARAM;

struct comptbl {
    compop_func *handler;
        uae_u32         specific;
        uae_u32         opcode;
};
#endif

extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM;

typedef char flagtype;

struct regstruct {
    uae_u32             regs[16];

    uae_u32             pc;
    uae_u8 *    pc_p;
    uae_u8 *    pc_oldp;

        spcflags_t      spcflags;
    int                 intmask;

    uae_u32             vbr, sfc, dfc;
    uaecptr             usp, isp, msp;
    uae_u16             sr;
    flagtype    t1;
    flagtype    t0;
    flagtype    s;
    flagtype    m;
    flagtype    x;
    flagtype    stopped;

#if USE_PREFETCH_BUFFER
    /* Fellow sources say this is 4 longwords. That's impossible. It needs
     * to be at least a longword. The HRM has some cryptic comment about two
     * instructions being on the same longword boundary.
     * The way this is implemented now seems like a good compromise.
     */
    uae_u32 prefetch;
#endif
};

extern regstruct regs, lastint_regs;

#define m68k_dreg(r,num) ((r).regs[(num)])
#define m68k_areg(r,num) (((r).regs + 8)[(num)])

#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))

#ifdef HAVE_GET_WORD_UNSWAPPED
#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
#else
#define GET_OPCODE (get_iword (0))
#endif

#if USE_PREFETCH_BUFFER
static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));

    return do_get_mem_byte((uae_u8 *)(((uae_u8 *)&regs.prefetch) + o + 1));
}
static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_word((uae_u16 *)(regs.pc_p + o));

    return do_get_mem_word((uae_u16 *)(((uae_u8 *)&regs.prefetch) + o));
}
static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
{
    if (o > 3 || o < 0)
        return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
    if (o == 0)
        return do_get_mem_long(&regs.prefetch);
    return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
}
#endif

#define m68k_incpc(o) (regs.pc_p += (o))

static __inline__ void fill_prefetch_0 (void)
{
#if USE_PREFETCH_BUFFER
    uae_u32 r;
#ifdef UNALIGNED_PROFITABLE
    r = *(uae_u32 *)regs.pc_p;
    regs.prefetch = r;
#else
    r = do_get_mem_long ((uae_u32 *)regs.pc_p);
    do_put_mem_long (&regs.prefetch, r);
#endif
#endif
}

#if 0
static __inline__ void fill_prefetch_2 (void)
{
    uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
    uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
    r |= r2;
    do_put_mem_long (&regs.prefetch, r);
}
#else
#define fill_prefetch_2 fill_prefetch_0
#endif

/* These are only used by the 68020/68881 code, and therefore don't
 * need to handle prefetch.  */
static __inline__ uae_u32 next_ibyte (void)
{
    uae_u32 r = get_ibyte (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_iword (void)
{
    uae_u32 r = get_iword (0);
    m68k_incpc (2);
    return r;
}

static __inline__ uae_u32 next_ilong (void)
{
    uae_u32 r = get_ilong (0);
    m68k_incpc (4);
    return r;
}

static __inline__ void m68k_setpc (uaecptr newpc)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        regs.pc_p = get_real_address(newpc);
#else
    regs.pc_p = regs.pc_oldp = get_real_address(newpc);
    regs.pc = newpc;
#endif
}

static __inline__ uaecptr m68k_getpc (void)
{
#if REAL_ADDRESSING || DIRECT_ADDRESSING
        return get_virtual_address(regs.pc_p);
#else
    return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
#endif
}

#define m68k_setpc_fast m68k_setpc
#define m68k_setpc_bcc  m68k_setpc
#define m68k_setpc_rte  m68k_setpc

static __inline__ void m68k_do_rts(void)
{
            m68k_setpc(get_long(m68k_areg(regs, 7)));
                m68k_areg(regs, 7) += 4;
}
 
static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_incpc(offset);
}
 
static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
{
            m68k_areg(regs, 7) -= 4;
                put_long(m68k_areg(regs, 7), oldpc);
                    m68k_setpc(dest);
}

static __inline__ void m68k_setstopped (int stop)
{
    regs.stopped = stop;
    /* A traced STOP instruction drops through immediately without
       actually stopping.  */
    if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
    SPCFLAGS_SET( SPCFLAG_STOP );
}

extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);

extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);

extern void MakeSR (void);
extern void MakeFromSR (void);
extern void Exception (int, uaecptr);
extern void dump_counts (void);
extern int m68k_move2c (int, uae_u32 *);
extern int m68k_movec2 (int, uae_u32 *);
extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
extern void m68k_mull (uae_u32, uae_u32, uae_u16);
extern void m68k_emulop (uae_u32);
extern void m68k_emulop_return (void);
extern void init_m68k (void);
extern void exit_m68k (void);
extern void m68k_dumpstate (uaecptr *);
extern void m68k_disasm (uaecptr, uaecptr *, int);
extern void m68k_reset (void);
extern void m68k_enter_debugger(void);
extern int m68k_do_specialties(void);

extern void mmu_op (uae_u32, uae_u16);

/* Opcode of faulting instruction */
extern uae_u16 last_op_for_exception_3;
/* PC at fault time */
extern uaecptr last_addr_for_exception_3;
/* Address that generated the exception */
extern uaecptr last_fault_for_exception_3;

#define CPU_OP_NAME(a) op ## a

/* 68020 + 68881 */
extern struct cputbl op_smalltbl_0_ff[];
/* 68020 */
extern struct cputbl op_smalltbl_1_ff[];
/* 68010 */
extern struct cputbl op_smalltbl_2_ff[];
/* 68000 */
extern struct cputbl op_smalltbl_3_ff[];
/* 68000 slow but compatible.  */
extern struct cputbl op_smalltbl_4_ff[];

#if FLIGHT_RECORDER
extern void m68k_record_step(uaecptr);
#endif
extern void m68k_do_execute(void);
extern void m68k_execute(void);
#if USE_JIT
#ifdef X86_ASSEMBLY
/* This is generated code */
extern void (*m68k_compile_execute)(void);
#else
extern void m68k_do_compile_execute(void);
extern void m68k_compile_execute(void);
#endif
#endif
 
#endif /* NEWCPU_H */
Revision:	1.11
Committed:	2002-10-01T09:39:55Z (22 years, 1 month ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
Changes since 1.10:	+5 -0 lines
Log Message:	- Optimize use of quit_program variable. This is a real boolean for B2. - Remove unused/dead code concerning surroundings of (debugging). - m68k_compile_execute() is generated and optimized code now.
#	User	Rev	Content
1	cebix	1.1	/*
2			* UAE - The Un*x Amiga Emulator
3			*
4			* MC68000 emulation
5			*
6			* Copyright 1995 Bernd Schmidt
7			*/
8
9	gbeauche	1.4	#ifndef NEWCPU_H
10			#define NEWCPU_H
11
12	gbeauche	1.10	#ifndef FLIGHT_RECORDER
13			#define FLIGHT_RECORDER 0
14			#endif
15
16	gbeauche	1.8	#include "m68k.h"
17			#include "readcpu.h"
18			#include "spcflags.h"
19
20	cebix	1.1	extern int areg_byteinc[];
21			extern int imm8_table[];
22
23			extern int movem_index1[256];
24			extern int movem_index2[256];
25			extern int movem_next[256];
26
27			extern int broken_in;
28
29	gbeauche	1.8	/* Control flow information */
30			#define CFLOW_NORMAL 0
31			#define CFLOW_BRANCH 1
32			#define CFLOW_JUMP 2
33			#define CFLOW_RETURN 3
34	gbeauche	1.10	#define CFLOW_TRAP 4
35	gbeauche	1.8	#define CFLOW_SPCFLAGS 32 /* some spcflags are set */
36			#define CFLOW_EXEC_RETURN 64 /* must exit from the execution loop */
37
38			#define cpuop_rettype void
39			#define cpuop_return(v) do { (v); return; } while (0)
40
41			#ifdef X86_ASSEMBLY
42			/* This hack seems to force all register saves (pushl %reg) to be moved to the
43			begining of the function, thus making it possible to cpuopti to remove them
44			since m68k_run_1 will save those registers before calling the instruction
45			handler */
46			# define cpuop_tag(tag) __asm__ __volatile__ ( "#cpuop_" tag )
47			#else
48			# define cpuop_tag(tag) ;
49			#endif
50
51			#define cpuop_begin() do { cpuop_tag("begin"); } while (0)
52			#define cpuop_end(cflow) do { cpuop_tag("end"); cpuop_return(cflow); } while (0)
53	cebix	1.1
54	gbeauche	1.8	typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM;
55
56	cebix	1.1	struct cputbl {
57			cpuop_func *handler;
58	gbeauche	1.8	uae_u16 specific;
59	cebix	1.1	uae_u16 opcode;
60			};
61
62	gbeauche	1.10	extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
63
64			#if USE_JIT
65			typedef void compop_func (uae_u32) REGPARAM;
66
67			struct comptbl {
68			compop_func *handler;
69			uae_u32 specific;
70			uae_u32 opcode;
71			};
72			#endif
73
74	gbeauche	1.8	extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM;
75	cebix	1.1
76			typedef char flagtype;
77
78	gbeauche	1.8	struct regstruct {
79			uae_u32 regs[16];
80	cebix	1.1
81	gbeauche	1.8	uae_u32 pc;
82			uae_u8 * pc_p;
83			uae_u8 * pc_oldp;
84
85			spcflags_t spcflags;
86			int intmask;
87
88			uae_u32 vbr, sfc, dfc;
89			uaecptr usp, isp, msp;
90			uae_u16 sr;
91			flagtype t1;
92			flagtype t0;
93			flagtype s;
94			flagtype m;
95			flagtype x;
96			flagtype stopped;
97	cebix	1.1
98	gbeauche	1.8	#if USE_PREFETCH_BUFFER
99	cebix	1.1	/* Fellow sources say this is 4 longwords. That's impossible. It needs
100			* to be at least a longword. The HRM has some cryptic comment about two
101			* instructions being on the same longword boundary.
102			* The way this is implemented now seems like a good compromise.
103			*/
104			uae_u32 prefetch;
105	gbeauche	1.8	#endif
106			};
107
108			extern regstruct regs, lastint_regs;
109	cebix	1.1
110			#define m68k_dreg(r,num) ((r).regs[(num)])
111			#define m68k_areg(r,num) (((r).regs + 8)[(num)])
112
113			#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
114			#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
115			#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
116
117			#ifdef HAVE_GET_WORD_UNSWAPPED
118			#define GET_OPCODE (do_get_mem_word_unswapped (regs.pc_p))
119			#else
120			#define GET_OPCODE (get_iword (0))
121			#endif
122
123	gbeauche	1.8	#if USE_PREFETCH_BUFFER
124	cebix	1.1	static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
125			{
126			if (o > 3 \|\| o < 0)
127			return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
128
129			return do_get_mem_byte((uae_u8 )(((uae_u8 )&regs.prefetch) + o + 1));
130			}
131			static __inline__ uae_u32 get_iword_prefetch (uae_s32 o)
132			{
133			if (o > 3 \|\| o < 0)
134			return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
135
136			return do_get_mem_word((uae_u16 )(((uae_u8 )&regs.prefetch) + o));
137			}
138			static __inline__ uae_u32 get_ilong_prefetch (uae_s32 o)
139			{
140			if (o > 3 \|\| o < 0)
141			return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
142			if (o == 0)
143			return do_get_mem_long(&regs.prefetch);
144			return (do_get_mem_word (((uae_u16 )&regs.prefetch) + 1) << 16) \| do_get_mem_word ((uae_u16 )(regs.pc_p + 4));
145			}
146	gbeauche	1.8	#endif
147	cebix	1.1
148			#define m68k_incpc(o) (regs.pc_p += (o))
149
150			static __inline__ void fill_prefetch_0 (void)
151			{
152	gbeauche	1.4	#if USE_PREFETCH_BUFFER
153	cebix	1.1	uae_u32 r;
154			#ifdef UNALIGNED_PROFITABLE
155			r = (uae_u32 )regs.pc_p;
156			regs.prefetch = r;
157			#else
158			r = do_get_mem_long ((uae_u32 *)regs.pc_p);
159			do_put_mem_long (&regs.prefetch, r);
160			#endif
161	gbeauche	1.4	#endif
162	cebix	1.1	}
163
164			#if 0
165			static __inline__ void fill_prefetch_2 (void)
166			{
167			uae_u32 r = do_get_mem_long (&regs.prefetch) << 16;
168			uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
169			r \|= r2;
170			do_put_mem_long (&regs.prefetch, r);
171			}
172			#else
173			#define fill_prefetch_2 fill_prefetch_0
174			#endif
175
176			/* These are only used by the 68020/68881 code, and therefore don't
177			* need to handle prefetch. */
178			static __inline__ uae_u32 next_ibyte (void)
179			{
180			uae_u32 r = get_ibyte (0);
181			m68k_incpc (2);
182			return r;
183			}
184
185			static __inline__ uae_u32 next_iword (void)
186			{
187			uae_u32 r = get_iword (0);
188			m68k_incpc (2);
189			return r;
190			}
191
192			static __inline__ uae_u32 next_ilong (void)
193			{
194			uae_u32 r = get_ilong (0);
195			m68k_incpc (4);
196			return r;
197			}
198
199			static __inline__ void m68k_setpc (uaecptr newpc)
200			{
201	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
202			regs.pc_p = get_real_address(newpc);
203			#else
204	cebix	1.1	regs.pc_p = regs.pc_oldp = get_real_address(newpc);
205			regs.pc = newpc;
206	gbeauche	1.4	#endif
207	cebix	1.1	}
208
209			static __inline__ uaecptr m68k_getpc (void)
210			{
211	gbeauche	1.4	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
212			return get_virtual_address(regs.pc_p);
213			#else
214	cebix	1.1	return regs.pc + ((char )regs.pc_p - (char )regs.pc_oldp);
215	gbeauche	1.4	#endif
216	cebix	1.1	}
217
218			#define m68k_setpc_fast m68k_setpc
219			#define m68k_setpc_bcc m68k_setpc
220			#define m68k_setpc_rte m68k_setpc
221
222	gbeauche	1.5	static __inline__ void m68k_do_rts(void)
223			{
224			m68k_setpc(get_long(m68k_areg(regs, 7)));
225			m68k_areg(regs, 7) += 4;
226			}
227
228			static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
229			{
230			m68k_areg(regs, 7) -= 4;
231			put_long(m68k_areg(regs, 7), oldpc);
232			m68k_incpc(offset);
233			}
234
235			static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
236			{
237			m68k_areg(regs, 7) -= 4;
238			put_long(m68k_areg(regs, 7), oldpc);
239			m68k_setpc(dest);
240			}
241
242	cebix	1.1	static __inline__ void m68k_setstopped (int stop)
243			{
244			regs.stopped = stop;
245	gbeauche	1.7	/* A traced STOP instruction drops through immediately without
246			actually stopping. */
247			if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
248	gbeauche	1.8	SPCFLAGS_SET( SPCFLAG_STOP );
249	cebix	1.1	}
250
251			extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
252			extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
253
254			extern uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf);
255
256			extern void MakeSR (void);
257			extern void MakeFromSR (void);
258			extern void Exception (int, uaecptr);
259			extern void dump_counts (void);
260	gbeauche	1.6	extern int m68k_move2c (int, uae_u32 *);
261			extern int m68k_movec2 (int, uae_u32 *);
262	cebix	1.1	extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
263			extern void m68k_mull (uae_u32, uae_u32, uae_u16);
264	gbeauche	1.8	extern void m68k_emulop (uae_u32);
265			extern void m68k_emulop_return (void);
266	cebix	1.1	extern void init_m68k (void);
267	gbeauche	1.3	extern void exit_m68k (void);
268	cebix	1.1	extern void m68k_dumpstate (uaecptr *);
269			extern void m68k_disasm (uaecptr, uaecptr *, int);
270			extern void m68k_reset (void);
271			extern void m68k_enter_debugger(void);
272	gbeauche	1.8	extern int m68k_do_specialties(void);
273	cebix	1.1
274			extern void mmu_op (uae_u32, uae_u16);
275
276			/* Opcode of faulting instruction */
277			extern uae_u16 last_op_for_exception_3;
278			/* PC at fault time */
279			extern uaecptr last_addr_for_exception_3;
280			/* Address that generated the exception */
281			extern uaecptr last_fault_for_exception_3;
282
283			#define CPU_OP_NAME(a) op ## a
284
285			/* 68020 + 68881 */
286	gbeauche	1.8	extern struct cputbl op_smalltbl_0_ff[];
287	cebix	1.1	/* 68020 */
288	gbeauche	1.8	extern struct cputbl op_smalltbl_1_ff[];
289	cebix	1.1	/* 68010 */
290	gbeauche	1.8	extern struct cputbl op_smalltbl_2_ff[];
291	cebix	1.1	/* 68000 */
292	gbeauche	1.8	extern struct cputbl op_smalltbl_3_ff[];
293	cebix	1.1	/* 68000 slow but compatible. */
294	gbeauche	1.8	extern struct cputbl op_smalltbl_4_ff[];
295	cebix	1.1
296	gbeauche	1.10	#if FLIGHT_RECORDER
297			extern void m68k_record_step(uaecptr);
298			#endif
299	gbeauche	1.8	extern void m68k_do_execute(void);
300			extern void m68k_execute(void);
301	gbeauche	1.10	#if USE_JIT
302	gbeauche	1.11	#ifdef X86_ASSEMBLY
303			/* This is generated code */
304			extern void (*m68k_compile_execute)(void);
305			#else
306	gbeauche	1.10	extern void m68k_do_compile_execute(void);
307			extern void m68k_compile_execute(void);
308	gbeauche	1.11	#endif
309	gbeauche	1.10	#endif
310	gbeauche	1.8
311	gbeauche	1.4	#endif /* NEWCPU_H */