163 |
|
#endif |
164 |
|
} |
165 |
|
|
166 |
< |
cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM; |
166 |
> |
void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM; |
167 |
|
|
168 |
< |
cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode) |
168 |
> |
void REGPARAM2 op_illg_1 (uae_u32 opcode) |
169 |
|
{ |
170 |
< |
cpuop_return( op_illg (cft_map (opcode)) ); |
170 |
> |
op_illg (cft_map (opcode)); |
171 |
|
} |
172 |
|
|
173 |
|
static void build_cpufunctbl (void) |
1189 |
|
MakeFromSR(); |
1190 |
|
} |
1191 |
|
|
1192 |
< |
cpuop_rettype REGPARAM2 op_illg (uae_u32 opcode) |
1192 |
> |
void REGPARAM2 op_illg (uae_u32 opcode) |
1193 |
|
{ |
1194 |
|
uaecptr pc = m68k_getpc (); |
1195 |
|
|
1196 |
|
if ((opcode & 0xF000) == 0xA000) { |
1197 |
|
Exception(0xA,0); |
1198 |
< |
cpuop_return(CFLOW_TRAP); |
1198 |
> |
return; |
1199 |
|
} |
1200 |
|
|
1201 |
|
if ((opcode & 0xF000) == 0xF000) { |
1202 |
|
Exception(0xB,0); |
1203 |
< |
cpuop_return(CFLOW_TRAP); |
1203 |
> |
return; |
1204 |
|
} |
1205 |
|
|
1206 |
|
write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc); |
1209 |
|
#endif |
1210 |
|
|
1211 |
|
Exception (4,0); |
1212 |
< |
cpuop_return(CFLOW_TRAP); |
1212 |
> |
return; |
1213 |
|
} |
1214 |
|
|
1215 |
|
void mmu_op(uae_u32 opcode, uae_u16 extra) |
1307 |
|
} |
1308 |
|
if (SPCFLAGS_TEST( SPCFLAG_BRK )) { |
1309 |
|
SPCFLAGS_CLEAR( SPCFLAG_BRK ); |
1310 |
< |
return CFLOW_EXEC_RETURN; |
1310 |
> |
return 1; |
1311 |
|
} |
1312 |
|
return 0; |
1313 |
|
} |