22 |
|
#include "memory.h" |
23 |
|
#include "readcpu.h" |
24 |
|
#include "newcpu.h" |
25 |
– |
#include "compiler.h" |
25 |
|
|
26 |
|
int quit_program = 0; |
27 |
|
int debugging = 0; |
110 |
|
#endif |
111 |
|
} |
112 |
|
|
113 |
< |
static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM; |
113 |
> |
static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM; |
114 |
|
|
115 |
< |
static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode) |
115 |
> |
static void REGPARAM2 op_illg_1 (uae_u32 opcode) |
116 |
|
{ |
117 |
|
op_illg (cft_map (opcode)); |
119 |
– |
return 4; |
118 |
|
} |
119 |
|
|
120 |
|
static void build_cpufunctbl (void) |
182 |
|
for (j = 7 ; j >= 0 ; j--) { |
183 |
|
if (i & (1 << j)) break; |
184 |
|
} |
185 |
< |
fpp_movem_index1[i] = j; |
186 |
< |
fpp_movem_index2[i] = 7-j; |
185 |
> |
fpp_movem_index1[i] = 7-j; |
186 |
> |
fpp_movem_index2[i] = j; |
187 |
|
fpp_movem_next[i] = i & (~(1 << j)); |
188 |
|
} |
189 |
|
#if COUNT_INSTRS |
206 |
|
do_merges (); |
207 |
|
|
208 |
|
build_cpufunctbl (); |
209 |
+ |
|
210 |
+ |
fpu_init (); |
211 |
+ |
fpu_set_integral_fpu (CPUType == 4); |
212 |
+ |
} |
213 |
+ |
|
214 |
+ |
void exit_m68k (void) |
215 |
+ |
{ |
216 |
+ |
fpu_exit (); |
217 |
|
} |
218 |
|
|
219 |
|
struct regstruct regs, lastint_regs; |
222 |
|
static long int m68kpc_offset; |
223 |
|
int lastint_no; |
224 |
|
|
225 |
+ |
#if REAL_ADDRESSING || DIRECT_ADDRESSING |
226 |
+ |
#define get_ibyte_1(o) get_byte(get_virtual_address(regs.pc_p) + (o) + 1) |
227 |
+ |
#define get_iword_1(o) get_word(get_virtual_address(regs.pc_p) + (o)) |
228 |
+ |
#define get_ilong_1(o) get_long(get_virtual_address(regs.pc_p) + (o)) |
229 |
+ |
#else |
230 |
|
#define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1) |
231 |
|
#define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) |
232 |
|
#define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) |
233 |
+ |
#endif |
234 |
|
|
235 |
|
uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf) |
236 |
|
{ |
263 |
|
disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
264 |
|
addr = m68k_areg(regs,reg) + (uae_s16)disp16; |
265 |
|
sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff, |
266 |
< |
(long unsigned int)addr); |
266 |
> |
(unsigned long)addr); |
267 |
|
break; |
268 |
|
case Ad8r: |
269 |
|
dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
296 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
297 |
|
1 << ((dp >> 9) & 3), |
298 |
|
disp,outer, |
299 |
< |
(long unsigned int)addr); |
299 |
> |
(unsigned long)addr); |
300 |
|
} else { |
301 |
|
addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg; |
302 |
|
sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg, |
303 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
304 |
|
1 << ((dp >> 9) & 3), disp8, |
305 |
< |
(long unsigned int)addr); |
305 |
> |
(unsigned long)addr); |
306 |
|
} |
307 |
|
break; |
308 |
|
case PC16: |
309 |
|
addr = m68k_getpc () + m68kpc_offset; |
310 |
|
disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
311 |
|
addr += (uae_s16)disp16; |
312 |
< |
sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr); |
312 |
> |
sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr); |
313 |
|
break; |
314 |
|
case PC8r: |
315 |
|
addr = m68k_getpc () + m68kpc_offset; |
343 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
344 |
|
1 << ((dp >> 9) & 3), |
345 |
|
disp,outer, |
346 |
< |
(long unsigned int)addr); |
346 |
> |
(unsigned long)addr); |
347 |
|
} else { |
348 |
|
addr += (uae_s32)((uae_s8)disp8) + dispreg; |
349 |
|
sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D', |
350 |
|
(int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3), |
351 |
< |
disp8, (long unsigned int)addr); |
351 |
> |
disp8, (unsigned long)addr); |
352 |
|
} |
353 |
|
break; |
354 |
|
case absw: |
355 |
< |
sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset)); |
355 |
> |
sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset)); |
356 |
|
m68kpc_offset += 2; |
357 |
|
break; |
358 |
|
case absl: |
359 |
< |
sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset)); |
359 |
> |
sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset)); |
360 |
|
m68kpc_offset += 4; |
361 |
|
break; |
362 |
|
case imm: |
370 |
|
m68kpc_offset += 2; |
371 |
|
break; |
372 |
|
case sz_long: |
373 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset))); |
373 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset))); |
374 |
|
m68kpc_offset += 4; |
375 |
|
break; |
376 |
|
default: |
390 |
|
case imm2: |
391 |
|
offset = (uae_s32)get_ilong_1 (m68kpc_offset); |
392 |
|
m68kpc_offset += 4; |
393 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)offset); |
393 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)offset); |
394 |
|
break; |
395 |
|
case immi: |
396 |
|
offset = (uae_s32)(uae_s8)(reg & 0xff); |
397 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)offset); |
397 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)offset); |
398 |
|
break; |
399 |
|
default: |
400 |
|
break; |
658 |
|
|
659 |
|
void Exception(int nr, uaecptr oldpc) |
660 |
|
{ |
661 |
< |
compiler_flush_jsr_stack(); |
661 |
> |
uae_u32 currpc = m68k_getpc (); |
662 |
|
MakeSR(); |
663 |
|
if (!regs.s) { |
664 |
|
regs.usp = m68k_areg(regs, 7); |
687 |
|
m68k_areg(regs, 7) -= 2; |
688 |
|
put_word (m68k_areg(regs, 7), nr * 4); |
689 |
|
m68k_areg(regs, 7) -= 4; |
690 |
< |
put_long (m68k_areg(regs, 7), m68k_getpc ()); |
690 |
> |
put_long (m68k_areg(regs, 7), currpc); |
691 |
|
m68k_areg(regs, 7) -= 2; |
692 |
|
put_word (m68k_areg(regs, 7), regs.sr); |
693 |
|
regs.sr |= (1 << 13); |
713 |
|
} |
714 |
|
} |
715 |
|
m68k_areg(regs, 7) -= 4; |
716 |
< |
put_long (m68k_areg(regs, 7), m68k_getpc ()); |
716 |
> |
put_long (m68k_areg(regs, 7), currpc); |
717 |
|
kludge_me_do: |
718 |
|
m68k_areg(regs, 7) -= 2; |
719 |
|
put_word (m68k_areg(regs, 7), regs.sr); |
736 |
|
|
737 |
|
static int caar, cacr, tc, itt0, itt1, dtt0, dtt1; |
738 |
|
|
739 |
< |
void m68k_move2c (int regno, uae_u32 *regp) |
739 |
> |
int m68k_move2c (int regno, uae_u32 *regp) |
740 |
|
{ |
741 |
< |
if (CPUType == 1 && (regno & 0x7FF) > 1) |
741 |
> |
if ((CPUType == 1 && (regno & 0x7FF) > 1) |
742 |
> |
|| (CPUType < 4 && (regno & 0x7FF) > 2) |
743 |
> |
|| (CPUType == 4 && regno == 0x802)) |
744 |
> |
{ |
745 |
|
op_illg (0x4E7B); |
746 |
< |
else |
746 |
> |
return 0; |
747 |
> |
} else { |
748 |
|
switch (regno) { |
749 |
|
case 0: regs.sfc = *regp & 7; break; |
750 |
|
case 1: regs.dfc = *regp & 7; break; |
751 |
< |
case 2: cacr = *regp & 0x3; break; /* ignore C and CE */ |
751 |
> |
case 2: cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000); break; |
752 |
|
case 3: tc = *regp & 0xc000; break; |
753 |
|
case 4: itt0 = *regp & 0xffffe364; break; |
754 |
|
case 5: itt1 = *regp & 0xffffe364; break; |
761 |
|
case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break; |
762 |
|
default: |
763 |
|
op_illg (0x4E7B); |
764 |
< |
break; |
764 |
> |
return 0; |
765 |
|
} |
766 |
+ |
} |
767 |
+ |
return 1; |
768 |
|
} |
769 |
|
|
770 |
< |
void m68k_movec2 (int regno, uae_u32 *regp) |
770 |
> |
int m68k_movec2 (int regno, uae_u32 *regp) |
771 |
|
{ |
772 |
< |
if (CPUType == 1 && (regno & 0x7FF) > 1) |
772 |
> |
if ((CPUType == 1 && (regno & 0x7FF) > 1) |
773 |
> |
|| (CPUType < 4 && (regno & 0x7FF) > 2) |
774 |
> |
|| (CPUType == 4 && regno == 0x802)) |
775 |
> |
{ |
776 |
|
op_illg (0x4E7A); |
777 |
< |
else |
777 |
> |
return 0; |
778 |
> |
} else { |
779 |
|
switch (regno) { |
780 |
|
case 0: *regp = regs.sfc; break; |
781 |
|
case 1: *regp = regs.dfc; break; |
792 |
|
case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break; |
793 |
|
default: |
794 |
|
op_illg (0x4E7A); |
795 |
< |
break; |
795 |
> |
return 0; |
796 |
|
} |
797 |
+ |
} |
798 |
+ |
return 1; |
799 |
|
} |
800 |
|
|
801 |
|
static __inline__ int |
1072 |
|
regs.spcflags = 0; |
1073 |
|
regs.intmask = 7; |
1074 |
|
regs.vbr = regs.sfc = regs.dfc = 0; |
1075 |
< |
regs.fpcr = regs.fpsr = regs.fpiar = 0; |
1075 |
> |
/* gb-- moved into {fpp,fpu_x86}.cpp::fpu_init() |
1076 |
> |
regs.fpcr = regs.fpsr = regs.fpiar = 0; */ |
1077 |
> |
fpu_reset(); |
1078 |
|
} |
1079 |
|
|
1080 |
< |
unsigned long REGPARAM2 op_illg (uae_u32 opcode) |
1080 |
> |
void REGPARAM2 op_illg (uae_u32 opcode) |
1081 |
|
{ |
1082 |
|
uaecptr pc = m68k_getpc (); |
1083 |
|
|
1058 |
– |
compiler_flush_jsr_stack (); |
1059 |
– |
|
1084 |
|
if ((opcode & 0xFF00) == 0x7100) { |
1085 |
|
struct M68kRegisters r; |
1086 |
|
int i; |
1087 |
|
|
1088 |
< |
// Return from Execute68k()? |
1088 |
> |
// Return from Exectue68k()? |
1089 |
|
if (opcode == M68K_EXEC_RETURN) { |
1090 |
|
regs.spcflags |= SPCFLAG_BRK; |
1091 |
|
quit_program = 1; |
1092 |
< |
return 4; |
1092 |
> |
return; |
1093 |
|
} |
1094 |
|
|
1095 |
|
// Call EMUL_OP opcode |
1108 |
|
MakeFromSR(); |
1109 |
|
m68k_incpc(2); |
1110 |
|
fill_prefetch_0 (); |
1111 |
< |
return 4; |
1111 |
> |
return; |
1112 |
|
} |
1113 |
|
|
1114 |
|
if ((opcode & 0xF000) == 0xA000) { |
1115 |
|
Exception(0xA,0); |
1116 |
< |
return 4; |
1116 |
> |
return; |
1117 |
|
} |
1118 |
|
|
1119 |
< |
printf("Illegal instruction %04x at %08lx\n", opcode, pc); //!! |
1119 |
> |
// write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc); |
1120 |
> |
|
1121 |
|
if ((opcode & 0xF000) == 0xF000) { |
1122 |
|
Exception(0xB,0); |
1123 |
< |
return 4; |
1123 |
> |
return; |
1124 |
|
} |
1125 |
|
|
1126 |
|
write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc); |
1127 |
+ |
|
1128 |
|
Exception (4,0); |
1103 |
– |
return 4; |
1129 |
|
} |
1130 |
|
|
1131 |
|
void mmu_op(uae_u32 opcode, uae_u16 extra) |
1144 |
|
|
1145 |
|
static void do_trace (void) |
1146 |
|
{ |
1147 |
< |
if (regs.t0) { |
1147 |
> |
if (regs.t0 && CPUType >= 2) { |
1148 |
|
uae_u16 opcode; |
1149 |
|
/* should also include TRAP, CHK, SR modification FPcc */ |
1150 |
|
/* probably never used so why bother */ |
1181 |
|
static int do_specialties (void) |
1182 |
|
{ |
1183 |
|
/*n_spcinsns++;*/ |
1159 |
– |
run_compiled_code(); |
1184 |
|
if (regs.spcflags & SPCFLAG_DOTRACE) { |
1185 |
|
Exception (9,last_trace_ad); |
1186 |
|
} |
1219 |
|
|
1220 |
|
static void m68k_run_1 (void) |
1221 |
|
{ |
1222 |
< |
for (;;) { |
1223 |
< |
int cycles; |
1224 |
< |
uae_u32 opcode = GET_OPCODE; |
1225 |
< |
#if 0 |
1226 |
< |
if (get_ilong (0) != do_get_mem_long (®s.prefetch)) { |
1227 |
< |
debugging = 1; |
1228 |
< |
return; |
1205 |
< |
} |
1206 |
< |
#endif |
1207 |
< |
/* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */ |
1208 |
< |
/* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/ |
1209 |
< |
#if COUNT_INSTRS == 2 |
1210 |
< |
if (table68k[cft_map (opcode)].handler != -1) |
1211 |
< |
instrcount[table68k[cft_map (opcode)].handler]++; |
1212 |
< |
#elif COUNT_INSTRS == 1 |
1213 |
< |
instrcount[opcode]++; |
1214 |
< |
#endif |
1215 |
< |
#if defined(X86_ASSEMBLYxxx) |
1216 |
< |
__asm__ __volatile__("\tcall *%%ebx" |
1217 |
< |
: "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode) |
1218 |
< |
: "%edx", "%ecx", |
1219 |
< |
"%esi", "%edi", "%ebp", "memory", "cc"); |
1220 |
< |
#else |
1221 |
< |
cycles = (*cpufunctbl[opcode])(opcode); |
1222 |
< |
#endif |
1223 |
< |
/*n_insns++;*/ |
1224 |
< |
if (regs.spcflags) { |
1225 |
< |
if (do_specialties ()) |
1226 |
< |
return; |
1222 |
> |
for (;;) { |
1223 |
> |
uae_u32 opcode = GET_OPCODE; |
1224 |
> |
(*cpufunctbl[opcode])(opcode); |
1225 |
> |
if (regs.spcflags) { |
1226 |
> |
if (do_specialties()) |
1227 |
> |
return; |
1228 |
> |
} |
1229 |
|
} |
1228 |
– |
} |
1230 |
|
} |
1231 |
|
|
1231 |
– |
#ifdef X86_ASSEMBLYxxx |
1232 |
– |
static __inline__ void m68k_run1 (void) |
1233 |
– |
{ |
1234 |
– |
/* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */ |
1235 |
– |
__asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (m68k_run_1) : "%eax", "%edx", "%ecx", "memory", "cc"); |
1236 |
– |
} |
1237 |
– |
#else |
1232 |
|
#define m68k_run1 m68k_run_1 |
1239 |
– |
#endif |
1233 |
|
|
1234 |
|
int in_m68k_go = 0; |
1235 |
|
|