22 |
|
#include "memory.h" |
23 |
|
#include "readcpu.h" |
24 |
|
#include "newcpu.h" |
25 |
– |
#include "compiler.h" |
25 |
|
|
26 |
|
int quit_program = 0; |
27 |
|
int debugging = 0; |
182 |
|
for (j = 7 ; j >= 0 ; j--) { |
183 |
|
if (i & (1 << j)) break; |
184 |
|
} |
185 |
< |
fpp_movem_index1[i] = j; |
186 |
< |
fpp_movem_index2[i] = 7-j; |
185 |
> |
fpp_movem_index1[i] = 7-j; |
186 |
> |
fpp_movem_index2[i] = j; |
187 |
|
fpp_movem_next[i] = i & (~(1 << j)); |
188 |
|
} |
189 |
|
#if COUNT_INSTRS |
206 |
|
do_merges (); |
207 |
|
|
208 |
|
build_cpufunctbl (); |
209 |
+ |
|
210 |
+ |
fpu_init (); |
211 |
+ |
fpu_set_integral_fpu (CPUType == 4); |
212 |
+ |
} |
213 |
+ |
|
214 |
+ |
void exit_m68k (void) |
215 |
+ |
{ |
216 |
+ |
fpu_exit (); |
217 |
|
} |
218 |
|
|
219 |
|
struct regstruct regs, lastint_regs; |
222 |
|
static long int m68kpc_offset; |
223 |
|
int lastint_no; |
224 |
|
|
225 |
+ |
#if REAL_ADDRESSING || DIRECT_ADDRESSING |
226 |
+ |
#define get_ibyte_1(o) get_byte(get_virtual_address(regs.pc_p) + (o) + 1) |
227 |
+ |
#define get_iword_1(o) get_word(get_virtual_address(regs.pc_p) + (o)) |
228 |
+ |
#define get_ilong_1(o) get_long(get_virtual_address(regs.pc_p) + (o)) |
229 |
+ |
#else |
230 |
|
#define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1) |
231 |
|
#define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) |
232 |
|
#define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) |
233 |
+ |
#endif |
234 |
|
|
235 |
|
uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf) |
236 |
|
{ |
263 |
|
disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
264 |
|
addr = m68k_areg(regs,reg) + (uae_s16)disp16; |
265 |
|
sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff, |
266 |
< |
(long unsigned int)addr); |
266 |
> |
(unsigned long)addr); |
267 |
|
break; |
268 |
|
case Ad8r: |
269 |
|
dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
296 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
297 |
|
1 << ((dp >> 9) & 3), |
298 |
|
disp,outer, |
299 |
< |
(long unsigned int)addr); |
299 |
> |
(unsigned long)addr); |
300 |
|
} else { |
301 |
|
addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg; |
302 |
|
sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg, |
303 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
304 |
|
1 << ((dp >> 9) & 3), disp8, |
305 |
< |
(long unsigned int)addr); |
305 |
> |
(unsigned long)addr); |
306 |
|
} |
307 |
|
break; |
308 |
|
case PC16: |
309 |
|
addr = m68k_getpc () + m68kpc_offset; |
310 |
|
disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; |
311 |
|
addr += (uae_s16)disp16; |
312 |
< |
sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr); |
312 |
> |
sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr); |
313 |
|
break; |
314 |
|
case PC8r: |
315 |
|
addr = m68k_getpc () + m68kpc_offset; |
343 |
|
dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', |
344 |
|
1 << ((dp >> 9) & 3), |
345 |
|
disp,outer, |
346 |
< |
(long unsigned int)addr); |
346 |
> |
(unsigned long)addr); |
347 |
|
} else { |
348 |
|
addr += (uae_s32)((uae_s8)disp8) + dispreg; |
349 |
|
sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D', |
350 |
|
(int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3), |
351 |
< |
disp8, (long unsigned int)addr); |
351 |
> |
disp8, (unsigned long)addr); |
352 |
|
} |
353 |
|
break; |
354 |
|
case absw: |
355 |
< |
sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset)); |
355 |
> |
sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset)); |
356 |
|
m68kpc_offset += 2; |
357 |
|
break; |
358 |
|
case absl: |
359 |
< |
sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset)); |
359 |
> |
sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset)); |
360 |
|
m68kpc_offset += 4; |
361 |
|
break; |
362 |
|
case imm: |
370 |
|
m68kpc_offset += 2; |
371 |
|
break; |
372 |
|
case sz_long: |
373 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset))); |
373 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset))); |
374 |
|
m68kpc_offset += 4; |
375 |
|
break; |
376 |
|
default: |
390 |
|
case imm2: |
391 |
|
offset = (uae_s32)get_ilong_1 (m68kpc_offset); |
392 |
|
m68kpc_offset += 4; |
393 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)offset); |
393 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)offset); |
394 |
|
break; |
395 |
|
case immi: |
396 |
|
offset = (uae_s32)(uae_s8)(reg & 0xff); |
397 |
< |
sprintf (buffer,"#$%08lx", (long unsigned int)offset); |
397 |
> |
sprintf (buffer,"#$%08lx", (unsigned long)offset); |
398 |
|
break; |
399 |
|
default: |
400 |
|
break; |
658 |
|
|
659 |
|
void Exception(int nr, uaecptr oldpc) |
660 |
|
{ |
648 |
– |
compiler_flush_jsr_stack(); |
661 |
|
MakeSR(); |
662 |
|
if (!regs.s) { |
663 |
|
regs.usp = m68k_areg(regs, 7); |
1059 |
|
regs.spcflags = 0; |
1060 |
|
regs.intmask = 7; |
1061 |
|
regs.vbr = regs.sfc = regs.dfc = 0; |
1062 |
< |
regs.fpcr = regs.fpsr = regs.fpiar = 0; |
1062 |
> |
/* gb-- moved into {fpp,fpu_x86}.cpp::fpu_init() |
1063 |
> |
regs.fpcr = regs.fpsr = regs.fpiar = 0; */ |
1064 |
> |
fpu_reset(); |
1065 |
|
} |
1066 |
|
|
1067 |
|
void REGPARAM2 op_illg (uae_u32 opcode) |
1068 |
|
{ |
1069 |
|
uaecptr pc = m68k_getpc (); |
1070 |
|
|
1057 |
– |
compiler_flush_jsr_stack (); |
1058 |
– |
|
1071 |
|
if ((opcode & 0xFF00) == 0x7100) { |
1072 |
|
struct M68kRegisters r; |
1073 |
|
int i; |
1168 |
|
static int do_specialties (void) |
1169 |
|
{ |
1170 |
|
/*n_spcinsns++;*/ |
1159 |
– |
run_compiled_code(); |
1171 |
|
if (regs.spcflags & SPCFLAG_DOTRACE) { |
1172 |
|
Exception (9,last_trace_ad); |
1173 |
|
} |