--- BasiliskII/src/uae_cpu/newcpu.cpp	1999/10/03 14:16:26	1.1
+++ BasiliskII/src/uae_cpu/newcpu.cpp	1999/10/31 23:18:42	1.4
@@ -111,23 +111,34 @@ static __inline__ unsigned int cft_map (
 #endif
 }
 
-static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
+static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
 
-static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
+static void REGPARAM2 op_illg_1 (uae_u32 opcode)
 {
     op_illg (cft_map (opcode));
-    return 4;
 }
 
 static void build_cpufunctbl (void)
 {
     int i;
     unsigned long opcode;
-	int cpu_level = (FPUType ? 3 : CPUType >= 2 ? 2 : CPUType == 1 ? 1 : 0);
-    struct cputbl *tbl = (cpu_level == 3 ? op_smalltbl_0
-			  : cpu_level == 2 ? op_smalltbl_1
-			  : cpu_level == 1 ? op_smalltbl_2
-			  : op_smalltbl_3);
+	int cpu_level = 0;		// 68000 (default)
+	if (CPUType == 4)
+		cpu_level = 4;		// 68040 with FPU
+	else {
+		if (FPUType)
+			cpu_level = 3;	// 68020 with FPU
+		else if (CPUType >= 2)
+			cpu_level = 2;	// 68020
+		else if (CPUType == 1)
+			cpu_level = 1;
+	}
+    struct cputbl *tbl = (
+		  cpu_level == 4 ? op_smalltbl_0
+		: cpu_level == 3 ? op_smalltbl_1
+		: cpu_level == 2 ? op_smalltbl_2
+		: cpu_level == 1 ? op_smalltbl_3
+		: op_smalltbl_4);
 
     for (opcode = 0; opcode < 65536; opcode++)
 	cpufunctbl[cft_map (opcode)] = op_illg_1;
@@ -710,7 +721,7 @@ static void Interrupt(int nr)
     regs.spcflags |= SPCFLAG_INT;
 }
 
-static int caar, cacr;
+static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
 
 void m68k_move2c (int regno, uae_u32 *regp)
 {
@@ -721,6 +732,11 @@ void m68k_move2c (int regno, uae_u32 *re
 	 case 0: regs.sfc = *regp & 7; break;
 	 case 1: regs.dfc = *regp & 7; break;
 	 case 2: cacr = *regp & 0x3; break;	/* ignore C and CE */
+	 case 3: tc = *regp & 0xc000; break;
+	 case 4: itt0 = *regp & 0xffffe364; break;
+	 case 5: itt1 = *regp & 0xffffe364; break;
+	 case 6: dtt0 = *regp & 0xffffe364; break;
+	 case 7: dtt1 = *regp & 0xffffe364; break;
 	 case 0x800: regs.usp = *regp; break;
 	 case 0x801: regs.vbr = *regp; break;
 	 case 0x802: caar = *regp &0xfc; break;
@@ -741,6 +757,11 @@ void m68k_movec2 (int regno, uae_u32 *re
 	 case 0: *regp = regs.sfc; break;
 	 case 1: *regp = regs.dfc; break;
 	 case 2: *regp = cacr; break;
+	 case 3: *regp = tc; break;
+	 case 4: *regp = itt0; break;
+	 case 5: *regp = itt1; break;
+	 case 6: *regp = dtt0; break;
+	 case 7: *regp = dtt1; break;
 	 case 0x800: *regp = regs.usp; break;
 	 case 0x801: *regp = regs.vbr; break;
 	 case 0x802: *regp = caar; break;
@@ -1029,7 +1050,7 @@ void m68k_reset (void)
     regs.fpcr = regs.fpsr = regs.fpiar = 0;
 }
 
-unsigned long REGPARAM2 op_illg (uae_u32 opcode)
+void REGPARAM2 op_illg (uae_u32 opcode)
 {
     uaecptr pc = m68k_getpc ();
 
@@ -1043,7 +1064,7 @@ unsigned long REGPARAM2 op_illg (uae_u32
 		if (opcode == M68K_EXEC_RETURN) {
 			regs.spcflags |= SPCFLAG_BRK;
 			quit_program = 1;
-			return 4;
+			return;
 		}
 
 		// Call EMUL_OP opcode
@@ -1062,22 +1083,24 @@ unsigned long REGPARAM2 op_illg (uae_u32
 		MakeFromSR();
 		m68k_incpc(2);
 		fill_prefetch_0 ();
-		return 4;
+		return;
 	}
 
     if ((opcode & 0xF000) == 0xA000) {
 	Exception(0xA,0);
-	return 4;
+	return;
     }
 
+//    write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
+
     if ((opcode & 0xF000) == 0xF000) {
 	Exception(0xB,0);
-	return 4;
+	return;
     }
 
     write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
+
     Exception (4,0);
-    return 4;
 }
 
 void mmu_op(uae_u32 opcode, uae_u16 extra)
@@ -1172,48 +1195,17 @@ static int do_specialties (void)
 
 static void m68k_run_1 (void)
 {
-    for (;;) {
-	int cycles;
-	uae_u32 opcode = GET_OPCODE;
-#if 0
-	if (get_ilong (0) != do_get_mem_long (&regs.prefetch)) {
-	    debugging = 1;
-	    return;
-	}
-#endif
-	/* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
-/*	regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
-#if COUNT_INSTRS == 2
-	if (table68k[cft_map (opcode)].handler != -1)
-	    instrcount[table68k[cft_map (opcode)].handler]++;
-#elif COUNT_INSTRS == 1
-	instrcount[opcode]++;
-#endif
-#if defined(X86_ASSEMBLYxxx)
-	__asm__ __volatile__("\tcall *%%ebx"
-			     : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
-			     : "%edx", "%ecx",
-			     "%esi", "%edi", "%ebp", "memory", "cc");
-#else
-	cycles = (*cpufunctbl[opcode])(opcode);
-#endif
-	/*n_insns++;*/
-	if (regs.spcflags) {
-	    if (do_specialties ())
-		return;
+	for (;;) {
+		uae_u32 opcode = GET_OPCODE;
+		(*cpufunctbl[opcode])(opcode);
+		if (regs.spcflags) {
+			if (do_specialties())
+				return;
+		}
 	}
-    }
 }
 
-#ifdef X86_ASSEMBLYxxx
-static __inline__ void m68k_run1 (void)
-{
-    /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
-    __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (m68k_run_1) : "%eax", "%edx", "%ecx", "memory", "cc");
-}
-#else
 #define m68k_run1 m68k_run_1
-#endif
 
 int in_m68k_go = 0;