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root/cebix/BasiliskII/src/uae_cpu/newcpu.cpp

Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.4 by cebix, 1999-10-31T23:18:42Z vs.
Revision 1.21 by gbeauche, 2005-06-11T06:43:24Z

#	Line 22 | Line 22 | extern int intlev(void);       // From baisili
22		#include "memory.h"
23		#include "readcpu.h"
24		#include "newcpu.h"
25	<	#include "compiler.h"
25	>	#include "compiler/compemu.h"
26	>	#include "fpu/fpu.h"
27
28	<	int quit_program = 0;
29	<	int debugging = 0;
28	>	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
29	>	B2_mutex *spcflags_lock = NULL;
30	>	#endif
31	>
32	>	#if ENABLE_MON
33	>	#include "mon.h"
34	>	#include "mon_disass.h"
35	>	#endif
36	>
37	>	bool quit_program = false;
38		struct flag_struct regflags;
39
40		/* Opcode of faulting instruction */
#	Line 42 | Line 51 | int movem_index1[256];
51		int movem_index2[256];
52		int movem_next[256];
53
45	–	int fpp_movem_index1[256];
46	–	int fpp_movem_index2[256];
47	–	int fpp_movem_next[256];
48	–
54		cpuop_func *cpufunctbl[65536];
55
56	+	#if FLIGHT_RECORDER
57	+	struct rec_step {
58	+	uae_u32 pc;
59	+	#if FLIGHT_RECORDER >= 2
60	+	uae_u32 d[8];
61	+	uae_u32 a[8];
62	+	#endif
63	+	};
64	+
65	+	const int LOG_SIZE = 32768;
66	+	static rec_step log[LOG_SIZE];
67	+	static int log_ptr = -1; // First time initialization
68	+
69	+	static const char *log_filename(void)
70	+	{
71	+	const char *name = getenv("M68K_LOG_FILE");
72	+	return name ? name : "log.68k";
73	+	}
74	+
75	+	void m68k_record_step(uaecptr pc)
76	+	{
77	+	#if FLIGHT_RECORDER >= 2
78	+	/* XXX: if LSB is set, we are recording from generated code and we
79	+	don't support registers recording yet.  */
80	+	if ((pc & 1) == 0) {
81	+	for (int i = 0; i < 8; i++) {
82	+	log[log_ptr].d[i] = m68k_dreg(regs, i);
83	+	log[log_ptr].a[i] = m68k_areg(regs, i);
84	+	}
85	+	}
86	+	#endif
87	+	log[log_ptr].pc = pc;
88	+	log_ptr = (log_ptr + 1) % LOG_SIZE;
89	+	}
90	+
91	+	static void dump_log(void)
92	+	{
93	+	FILE *f = fopen(log_filename(), "w");
94	+	if (f == NULL)
95	+	return;
96	+	for (int i = 0; i < LOG_SIZE; i++) {
97	+	int j = (i + log_ptr) % LOG_SIZE;
98	+	uae_u32 pc = log[j].pc & ~1;
99	+	fprintf(f, "pc %08x", pc);
100	+	#if FLIGHT_RECORDER >= 2
101	+	fprintf(f, "\n");
102	+	if ((log[j].pc & 1) == 0) {
103	+	fprintf(f, "d0 %08x d1 %08x d2 %08x d3 %08x\n", log[j].d[0], log[j].d[1], log[j].d[2], log[j].d[3]);
104	+	fprintf(f, "d4 %08x d5 %08x d6 %08x d7 %08x\n", log[j].d[4], log[j].d[5], log[j].d[6], log[j].d[7]);
105	+	fprintf(f, "a0 %08x a1 %08x a2 %08x a3 %08x\n", log[j].a[0], log[j].a[1], log[j].a[2], log[j].a[3]);
106	+	fprintf(f, "a4 %08x a5 %08x a6 %08x a7 %08x\n", log[j].a[4], log[j].a[5], log[j].a[6], log[j].a[7]);
107	+	}
108	+	#else
109	+	fprintf(f, " | ");
110	+	#endif
111	+	#if ENABLE_MON
112	+	disass_68k(f, pc);
113	+	#endif
114	+	}
115	+	fclose(f);
116	+	}
117	+	#endif
118	+
119	+	#if ENABLE_MON
120	+	static void dump_regs(void)
121	+	{
122	+	m68k_dumpstate(NULL);
123	+	}
124	+	#endif
125	+
126		#define COUNT_INSTRS 0
127
128		#if COUNT_INSTRS
#	Line 111 | Line 186 | static __inline__ unsigned int cft_map (
186		#endif
187		}
188
189	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
189	>	void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
190
191	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode)
191	>	void REGPARAM2 op_illg_1 (uae_u32 opcode)
192		{
193		op_illg (cft_map (opcode));
194		}
#	Line 134 | Line 209 | static void build_cpufunctbl (void)
209		cpu_level = 1;
210		}
211		struct cputbl *tbl = (
212	<	cpu_level == 4 ? op_smalltbl_0
213	<	: cpu_level == 3 ? op_smalltbl_1
214	<	: cpu_level == 2 ? op_smalltbl_2
215	<	: cpu_level == 1 ? op_smalltbl_3
216	<	: op_smalltbl_4);
212	>	cpu_level == 4 ? op_smalltbl_0_ff
213	>	: cpu_level == 3 ? op_smalltbl_1_ff
214	>	: cpu_level == 2 ? op_smalltbl_2_ff
215	>	: cpu_level == 1 ? op_smalltbl_3_ff
216	>	: op_smalltbl_4_ff);
217
218		for (opcode = 0; opcode < 65536; opcode++)
219		cpufunctbl[cft_map (opcode)] = op_illg_1;
#	Line 178 | Line 253 | void init_m68k (void)
253		movem_index2[i] = 7-j;
254		movem_next[i] = i & (~(1 << j));
255		}
181	–	for (i = 0 ; i < 256 ; i++) {
182	–	int j;
183	–	for (j = 7 ; j >= 0 ; j--) {
184	–	if (i & (1 << j)) break;
185	–	}
186	–	fpp_movem_index1[i] = j;
187	–	fpp_movem_index2[i] = 7-j;
188	–	fpp_movem_next[i] = i & (~(1 << j));
189	–	}
256		#if COUNT_INSTRS
257		{
258		FILE *f = fopen (icountfilename (), "r");
#	Line 207 | Line 273 | void init_m68k (void)
273		do_merges ();
274
275		build_cpufunctbl ();
276	+
277	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
278	+	spcflags_lock = B2_create_mutex();
279	+	#endif
280	+	fpu_init(CPUType == 4);
281	+	}
282	+
283	+	void exit_m68k (void)
284	+	{
285	+	fpu_exit ();
286	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
287	+	B2_delete_mutex(spcflags_lock);
288	+	#endif
289		}
290
291		struct regstruct regs, lastint_regs;
#	Line 215 | Line 294 | static int backup_pointer = 0;
294		static long int m68kpc_offset;
295		int lastint_no;
296
297	+	#if REAL_ADDRESSING || DIRECT_ADDRESSING
298	+	#define get_ibyte_1(o) get_byte(get_virtual_address(regs.pc_p) + (o) + 1)
299	+	#define get_iword_1(o) get_word(get_virtual_address(regs.pc_p) + (o))
300	+	#define get_ilong_1(o) get_long(get_virtual_address(regs.pc_p) + (o))
301	+	#else
302		#define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
303		#define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
304		#define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
305	+	#endif
306
307		uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
308		{
#	Line 250 | Line 335 | uae_s32 ShowEA (int reg, amodes mode, wo
335		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
336		addr = m68k_areg(regs,reg) + (uae_s16)disp16;
337		sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
338	<	(long unsigned int)addr);
338	>	(unsigned long)addr);
339		break;
340		case Ad8r:
341		dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
#	Line 283 | Line 368 | uae_s32 ShowEA (int reg, amodes mode, wo
368		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
369		1 << ((dp >> 9) & 3),
370		disp,outer,
371	<	(long unsigned int)addr);
371	>	(unsigned long)addr);
372		} else {
373		addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
374		sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
375		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
376		1 << ((dp >> 9) & 3), disp8,
377	<	(long unsigned int)addr);
377	>	(unsigned long)addr);
378		}
379		break;
380		case PC16:
381		addr = m68k_getpc () + m68kpc_offset;
382		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
383		addr += (uae_s16)disp16;
384	<	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
384	>	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
385		break;
386		case PC8r:
387		addr = m68k_getpc () + m68kpc_offset;
#	Line 330 | Line 415 | uae_s32 ShowEA (int reg, amodes mode, wo
415		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
416		1 << ((dp >> 9) & 3),
417		disp,outer,
418	<	(long unsigned int)addr);
418	>	(unsigned long)addr);
419		} else {
420		addr += (uae_s32)((uae_s8)disp8) + dispreg;
421		sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
422		(int)r, dp & 0x800 ? 'L' : 'W',  1 << ((dp >> 9) & 3),
423	<	disp8, (long unsigned int)addr);
423	>	disp8, (unsigned long)addr);
424		}
425		break;
426		case absw:
427	<	sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
427	>	sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
428		m68kpc_offset += 2;
429		break;
430		case absl:
431	<	sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
431	>	sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
432		m68kpc_offset += 4;
433		break;
434		case imm:
#	Line 357 | Line 442 | uae_s32 ShowEA (int reg, amodes mode, wo
442		m68kpc_offset += 2;
443		break;
444		case sz_long:
445	<	sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
445	>	sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
446		m68kpc_offset += 4;
447		break;
448		default:
#	Line 377 | Line 462 | uae_s32 ShowEA (int reg, amodes mode, wo
462		case imm2:
463		offset = (uae_s32)get_ilong_1 (m68kpc_offset);
464		m68kpc_offset += 4;
465	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
465	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
466		break;
467		case immi:
468		offset = (uae_s32)(uae_s8)(reg & 0xff);
469	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
469	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
470		break;
471		default:
472		break;
#	Line 636 | Line 721 | void MakeFromSR (void)
721		}
722		}
723
724	<	regs.spcflags |= SPCFLAG_INT;
724	>	SPCFLAGS_SET( SPCFLAG_INT );
725		if (regs.t1 || regs.t0)
726	<	regs.spcflags |= SPCFLAG_TRACE;
726	>	SPCFLAGS_SET( SPCFLAG_TRACE );
727		else
728	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
728	>	/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
729	>	SR-modifying instructions (including STOP).  */
730	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
731		}
732
733		void Exception(int nr, uaecptr oldpc)
734		{
735	<	compiler_flush_jsr_stack();
735	>	uae_u32 currpc = m68k_getpc ();
736		MakeSR();
737		if (!regs.s) {
738		regs.usp = m68k_areg(regs, 7);
#	Line 674 | Line 761 | void Exception(int nr, uaecptr oldpc)
761		m68k_areg(regs, 7) -= 2;
762		put_word (m68k_areg(regs, 7), nr * 4);
763		m68k_areg(regs, 7) -= 4;
764	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
764	>	put_long (m68k_areg(regs, 7), currpc);
765		m68k_areg(regs, 7) -= 2;
766		put_word (m68k_areg(regs, 7), regs.sr);
767		regs.sr |= (1 << 13);
#	Line 700 | Line 787 | void Exception(int nr, uaecptr oldpc)
787		}
788		}
789		m68k_areg(regs, 7) -= 4;
790	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
790	>	put_long (m68k_areg(regs, 7), currpc);
791		kludge_me_do:
792		m68k_areg(regs, 7) -= 2;
793		put_word (m68k_areg(regs, 7), regs.sr);
794		m68k_setpc (get_long (regs.vbr + 4*nr));
795	+	SPCFLAGS_SET( SPCFLAG_JIT_END_COMPILE );
796		fill_prefetch_0 ();
797		regs.t1 = regs.t0 = regs.m = 0;
798	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
798	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE | SPCFLAG_DOTRACE );
799		}
800
801		static void Interrupt(int nr)
#	Line 718 | Line 806 | static void Interrupt(int nr)
806		Exception(nr+24, 0);
807
808		regs.intmask = nr;
809	<	regs.spcflags |= SPCFLAG_INT;
809	>	SPCFLAGS_SET( SPCFLAG_INT );
810		}
811
812	<	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
812	>	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1, mmusr, urp, srp;
813
814	<	void m68k_move2c (int regno, uae_u32 *regp)
814	>	int m68k_move2c (int regno, uae_u32 *regp)
815		{
816	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
816	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
817	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
818	>	|| (CPUType == 4 && regno == 0x802))
819	>	{
820		op_illg (0x4E7B);
821	<	else
821	>	return 0;
822	>	} else {
823		switch (regno) {
824		case 0: regs.sfc = *regp & 7; break;
825		case 1: regs.dfc = *regp & 7; break;
826	<	case 2: cacr = *regp & 0x3; break;     /* ignore C and CE */
826	>	case 2:
827	>	cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000);
828	>	#if USE_JIT
829	>	if (CPUType < 4) {
830	>	set_cache_state(cacr&1);
831	>	if (*regp & 0x08)
832	>	flush_icache(1);
833	>	}
834	>	else {
835	>	set_cache_state((cacr&0x8000) || 0);
836	>	// FIXME: The User Manual claims bit 3 of CACR is undefined
837	>	if (*regp & 0x08)
838	>	flush_icache(2);
839	>	}
840	>	#endif
841	>	break;
842		case 3: tc = *regp & 0xc000; break;
843		case 4: itt0 = *regp & 0xffffe364; break;
844		case 5: itt1 = *regp & 0xffffe364; break;
#	Line 742 | Line 849 | void m68k_move2c (int regno, uae_u32 *re
849		case 0x802: caar = *regp &0xfc; break;
850		case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
851		case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
852	+	case 0x805: mmusr = *regp; break;
853	+	case 0x806: urp = *regp; break;
854	+	case 0x807: srp = *regp; break;
855		default:
856		op_illg (0x4E7B);
857	<	break;
857	>	return 0;
858		}
859	+	}
860	+	return 1;
861		}
862
863	<	void m68k_movec2 (int regno, uae_u32 *regp)
863	>	int m68k_movec2 (int regno, uae_u32 *regp)
864		{
865	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
865	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
866	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
867	>	|| (CPUType == 4 && regno == 0x802))
868	>	{
869		op_illg (0x4E7A);
870	<	else
870	>	return 0;
871	>	} else {
872		switch (regno) {
873		case 0: *regp = regs.sfc; break;
874		case 1: *regp = regs.dfc; break;
#	Line 767 | Line 883 | void m68k_movec2 (int regno, uae_u32 *re
883		case 0x802: *regp = caar; break;
884		case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
885		case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
886	+	case 0x805: *regp = mmusr; break;
887	+	case 0x806: *regp = urp; break;
888	+	case 0x807: *regp = srp; break;
889		default:
890		op_illg (0x4E7A);
891	<	break;
891	>	return 0;
892	>	}
893		}
894	+	return 1;
895		}
896
897		static __inline__ int
#	Line 1028 | Line 1149 | static char* ccnames[] =
1149		{ "T ","F ","HI","LS","CC","CS","NE","EQ",
1150		"VC","VS","PL","MI","GE","LT","GT","LE" };
1151
1152	+	// If value is greater than zero, this means we are still processing an EmulOp
1153	+	// because the counter is incremented only in m68k_execute(), i.e. interpretive
1154	+	// execution only
1155	+	static int m68k_execute_depth = 0;
1156	+
1157		void m68k_reset (void)
1158		{
1159		m68k_areg (regs, 7) = 0x2000;
1160		m68k_setpc (ROMBaseMac + 0x2a);
1161		fill_prefetch_0 ();
1036	–	regs.kick_mask = 0xF80000;
1162		regs.s = 1;
1163		regs.m = 0;
1164		regs.stopped = 0;
#	Line 1044 | Line 1169 | void m68k_reset (void)
1169		SET_CFLG (0);
1170		SET_VFLG (0);
1171		SET_NFLG (0);
1172	<	regs.spcflags = 0;
1172	>	SPCFLAGS_INIT( 0 );
1173		regs.intmask = 7;
1174		regs.vbr = regs.sfc = regs.dfc = 0;
1175	<	regs.fpcr = regs.fpsr = regs.fpiar = 0;
1175	>	fpu_reset();
1176	>
1177	>	#if FLIGHT_RECORDER
1178	>	log_ptr = 0;
1179	>	memset(log, 0, sizeof(log));
1180	>	#endif
1181	>
1182	>	#if ENABLE_MON
1183	>	static bool first_time = true;
1184	>	if (first_time) {
1185	>	first_time = false;
1186	>	mon_add_command("regs", dump_regs, "regs                    Dump m68k emulator registers\n");
1187	>	#if FLIGHT_RECORDER
1188	>	// Install "log" command in mon
1189	>	mon_add_command("log", dump_log, "log                      Dump m68k emulation log\n");
1190	>	#endif
1191	>	}
1192	>	#endif
1193		}
1194
1195	<	void REGPARAM2 op_illg (uae_u32 opcode)
1195	>	void m68k_emulop_return(void)
1196		{
1197	<	uaecptr pc = m68k_getpc ();
1198	<
1199	<	compiler_flush_jsr_stack ();
1197	>	SPCFLAGS_SET( SPCFLAG_BRK );
1198	>	quit_program = true;
1199	>	}
1200
1201	<	if ((opcode & 0xFF00) == 0x7100) {
1201	>	void m68k_emulop(uae_u32 opcode)
1202	>	{
1203		struct M68kRegisters r;
1204		int i;
1205
1063	–	// Return from Execute68k()?
1064	–	if (opcode == M68K_EXEC_RETURN) {
1065	–	regs.spcflags |= SPCFLAG_BRK;
1066	–	quit_program = 1;
1067	–	return;
1068	–	}
1069	–
1070	–	// Call EMUL_OP opcode
1206		for (i=0; i<8; i++) {
1207		r.d[i] = m68k_dreg(regs, i);
1208		r.a[i] = m68k_areg(regs, i);
#	Line 1081 | Line 1216 | void REGPARAM2 op_illg (uae_u32 opcode)
1216		}
1217		regs.sr = r.sr;
1218		MakeFromSR();
1219	<	m68k_incpc(2);
1220	<	fill_prefetch_0 ();
1221	<	return;
1222	<	}
1219	>	}
1220	>
1221	>	void REGPARAM2 op_illg (uae_u32 opcode)
1222	>	{
1223	>	uaecptr pc = m68k_getpc ();
1224
1225		if ((opcode & 0xF000) == 0xA000) {
1226		Exception(0xA,0);
1227		return;
1228		}
1229
1094	–	//    write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1095	–
1230		if ((opcode & 0xF000) == 0xF000) {
1231		Exception(0xB,0);
1232		return;
1233		}
1234
1235		write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1236	+	#if USE_JIT && JIT_DEBUG
1237	+	compiler_dumpstate();
1238	+	#endif
1239
1240		Exception (4,0);
1241	+	return;
1242		}
1243
1244		void mmu_op(uae_u32 opcode, uae_u16 extra)
1245		{
1246	<	if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1247	<
1248	<	} else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1249	<	} else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1246	>	if ((opcode & 0xFE0) == 0x0500) {
1247	>	/* PFLUSH */
1248	>	mmusr = 0;
1249	>	} else if ((opcode & 0x0FD8) == 0x548) {
1250	>	/* PTEST */
1251		} else
1252	<	op_illg (opcode);
1252	>	op_illg (opcode);
1253		}
1254
1255		static int n_insns = 0, n_spcinsns = 0;
#	Line 1119 | Line 1258 | static uaecptr last_trace_ad = 0;
1258
1259		static void do_trace (void)
1260		{
1261	<	if (regs.t0) {
1261	>	if (regs.t0 && CPUType >= 2) {
1262		uae_u16 opcode;
1263		/* should also include TRAP, CHK, SR modification FPcc */
1264		/* probably never used so why bother */
1265		/* We can afford this to be inefficient... */
1266		m68k_setpc (m68k_getpc ());
1267		fill_prefetch_0 ();
1268	<	opcode = get_word (regs.pc);
1268	>	opcode = get_word(m68k_getpc());
1269		if (opcode == 0x4e72            /* RTE */
1270		|| opcode == 0x4e74                 /* RTD */
1271		|| opcode == 0x4e75                 /* RTS */
#	Line 1142 | Line 1281 | static void do_trace (void)
1281		&& (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1282		{
1283		last_trace_ad = m68k_getpc ();
1284	<	regs.spcflags &= ~SPCFLAG_TRACE;
1285	<	regs.spcflags |= SPCFLAG_DOTRACE;
1284	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1285	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1286		}
1287		} else if (regs.t1) {
1288		last_trace_ad = m68k_getpc ();
1289	<	regs.spcflags &= ~SPCFLAG_TRACE;
1290	<	regs.spcflags |= SPCFLAG_DOTRACE;
1289	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1290	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1291		}
1292		}
1293
1294	<
1156	<	static int do_specialties (void)
1294	>	int m68k_do_specialties (void)
1295		{
1296	<	/*n_spcinsns++;*/
1297	<	run_compiled_code();
1298	<	if (regs.spcflags & SPCFLAG_DOTRACE) {
1296	>	#if USE_JIT
1297	>	// Block was compiled
1298	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_END_COMPILE );
1299	>
1300	>	// Retain the request to get out of compiled code until
1301	>	// we reached the toplevel execution, i.e. the one that
1302	>	// can compile then run compiled code. This also means
1303	>	// we processed all (nested) EmulOps
1304	>	if ((m68k_execute_depth == 0) && SPCFLAGS_TEST( SPCFLAG_JIT_EXEC_RETURN ))
1305	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_EXEC_RETURN );
1306	>	#endif
1307	>
1308	>	if (SPCFLAGS_TEST( SPCFLAG_DOTRACE )) {
1309		Exception (9,last_trace_ad);
1310		}
1311	<	while (regs.spcflags & SPCFLAG_STOP) {
1312	<	if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1311	>	while (SPCFLAGS_TEST( SPCFLAG_STOP )) {
1312	>	if (SPCFLAGS_TEST( SPCFLAG_INT | SPCFLAG_DOINT )){
1313	>	SPCFLAGS_CLEAR( SPCFLAG_INT | SPCFLAG_DOINT );
1314		int intr = intlev ();
1166	–	regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1315		if (intr != -1 && intr > regs.intmask) {
1316		Interrupt (intr);
1317		regs.stopped = 0;
1318	<	regs.spcflags &= ~SPCFLAG_STOP;
1318	>	SPCFLAGS_CLEAR( SPCFLAG_STOP );
1319		}
1320		}
1321		}
1322	<	if (regs.spcflags & SPCFLAG_TRACE)
1322	>	if (SPCFLAGS_TEST( SPCFLAG_TRACE ))
1323		do_trace ();
1324
1325	<	if (regs.spcflags & SPCFLAG_DOINT) {
1325	>	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
1326	>	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
1327		int intr = intlev ();
1179	–	regs.spcflags &= ~SPCFLAG_DOINT;
1328		if (intr != -1 && intr > regs.intmask) {
1329		Interrupt (intr);
1330		regs.stopped = 0;
1331		}
1332		}
1333	<	if (regs.spcflags & SPCFLAG_INT) {
1334	<	regs.spcflags &= ~SPCFLAG_INT;
1335	<	regs.spcflags |= SPCFLAG_DOINT;
1333	>	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
1334	>	SPCFLAGS_CLEAR( SPCFLAG_INT );
1335	>	SPCFLAGS_SET( SPCFLAG_DOINT );
1336		}
1337	<	if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1338	<	regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1337	>	if (SPCFLAGS_TEST( SPCFLAG_BRK )) {
1338	>	SPCFLAGS_CLEAR( SPCFLAG_BRK );
1339		return 1;
1340		}
1341		return 0;
1342		}
1343
1344	<	static void m68k_run_1 (void)
1344	>	void m68k_do_execute (void)
1345		{
1346		for (;;) {
1347		uae_u32 opcode = GET_OPCODE;
1348	+	#if FLIGHT_RECORDER
1349	+	m68k_record_step(m68k_getpc());
1350	+	#endif
1351		(*cpufunctbl[opcode])(opcode);
1352	<	if (regs.spcflags) {
1353	<	if (do_specialties())
1352	>	cpu_check_ticks();
1353	>	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
1354	>	if (m68k_do_specialties())
1355		return;
1356		}
1357		}
1358		}
1359
1360	<	#define m68k_run1 m68k_run_1
1361	<
1210	<	int in_m68k_go = 0;
1211	<
1212	<	void m68k_go (int may_quit)
1360	>	#if USE_JIT && !(defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY))
1361	>	void m68k_compile_execute (void)
1362		{
1363	<	// m68k_go() must be reentrant for Execute68k() and Execute68kTrap() to work
1364	<	/*
1365	<	if (in_m68k_go || !may_quit) {
1366	<	write_log("Bug! m68k_go is not reentrant.\n");
1218	<	abort();
1363	>	for (;;) {
1364	>	if (quit_program)
1365	>	break;
1366	>	m68k_do_compile_execute();
1367		}
1368	<	*/
1369	<	in_m68k_go++;
1368	>	}
1369	>	#endif
1370	>
1371	>	void m68k_execute (void)
1372	>	{
1373	>	#if USE_JIT
1374	>	++m68k_execute_depth;
1375	>	#endif
1376		for (;;) {
1377	<	if (quit_program > 0) {
1224	<	if (quit_program == 1)
1377	>	if (quit_program)
1378		break;
1379	<	quit_program = 0;
1227	<	m68k_reset ();
1228	<	}
1229	<	m68k_run1();
1379	>	m68k_do_execute();
1380		}
1381	<	if (debugging) {
1382	<	uaecptr nextpc;
1383	<	m68k_dumpstate(&nextpc);
1234	<	exit(1);
1235	<	}
1236	<	in_m68k_go--;
1381	>	#if USE_JIT
1382	>	--m68k_execute_depth;
1383	>	#endif
1384		}
1385
1386		static void m68k_verify (uaecptr addr, uaecptr *nextpc)
#	Line 1342 | Line 1489 | void m68k_dumpstate (uaecptr *nextpc)
1489		printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1490		regs.t1, regs.t0, regs.s, regs.m,
1491		GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1492	<	for (i = 0; i < 8; i++){
1493	<	printf ("FP%d: %g ", i, regs.fp[i]);
1494	<	if ((i & 3) == 3) printf ("\n");
1495	<	}
1349	<	printf ("N=%d Z=%d I=%d NAN=%d\n",
1350	<	(regs.fpsr & 0x8000000) != 0,
1351	<	(regs.fpsr & 0x4000000) != 0,
1352	<	(regs.fpsr & 0x2000000) != 0,
1353	<	(regs.fpsr & 0x1000000) != 0);
1354	<
1492	>
1493	>	fpu_dump_registers();
1494	>	fpu_dump_flags();
1495	>
1496		m68k_disasm(m68k_getpc (), nextpc, 1);
1497		if (nextpc)
1498		printf ("next PC: %08lx\n", *nextpc);

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