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root/cebix/BasiliskII/src/uae_cpu/newcpu.cpp

Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.4 by cebix, 1999-10-31T23:18:42Z vs.
Revision 1.19 by gbeauche, 2004-11-01T16:01:51Z

#	Line 22 | Line 22 | extern int intlev(void);       // From baisili
22		#include "memory.h"
23		#include "readcpu.h"
24		#include "newcpu.h"
25	<	#include "compiler.h"
25	>	#include "compiler/compemu.h"
26	>	#include "fpu/fpu.h"
27
28	<	int quit_program = 0;
29	<	int debugging = 0;
28	>	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
29	>	B2_mutex *spcflags_lock = NULL;
30	>	#endif
31	>
32	>	#if ENABLE_MON
33	>	#include "mon.h"
34	>	#include "mon_disass.h"
35	>	#endif
36	>
37	>	bool quit_program = false;
38		struct flag_struct regflags;
39
40		/* Opcode of faulting instruction */
#	Line 42 | Line 51 | int movem_index1[256];
51		int movem_index2[256];
52		int movem_next[256];
53
45	–	int fpp_movem_index1[256];
46	–	int fpp_movem_index2[256];
47	–	int fpp_movem_next[256];
48	–
54		cpuop_func *cpufunctbl[65536];
55
56	+	#if FLIGHT_RECORDER
57	+	struct rec_step {
58	+	uae_u32 d[8];
59	+	uae_u32 a[8];
60	+	uae_u32 pc;
61	+	};
62	+
63	+	const int LOG_SIZE = 8192;
64	+	static rec_step log[LOG_SIZE];
65	+	static int log_ptr = -1; // First time initialization
66	+
67	+	static const char *log_filename(void)
68	+	{
69	+	const char *name = getenv("M68K_LOG_FILE");
70	+	return name ? name : "log.68k";
71	+	}
72	+
73	+	void m68k_record_step(uaecptr pc)
74	+	{
75	+	for (int i = 0; i < 8; i++) {
76	+	log[log_ptr].d[i] = m68k_dreg(regs, i);
77	+	log[log_ptr].a[i] = m68k_areg(regs, i);
78	+	}
79	+	log[log_ptr].pc = pc;
80	+	log_ptr = (log_ptr + 1) % LOG_SIZE;
81	+	}
82	+
83	+	static void dump_log(void)
84	+	{
85	+	FILE *f = fopen(log_filename(), "w");
86	+	if (f == NULL)
87	+	return;
88	+	for (int i = 0; i < LOG_SIZE; i++) {
89	+	int j = (i + log_ptr) % LOG_SIZE;
90	+	fprintf(f, "pc %08x\n", log[j].pc);
91	+	fprintf(f, "d0 %08x d1 %08x d2 %08x d3 %08x\n", log[j].d[0], log[j].d[1], log[j].d[2], log[j].d[3]);
92	+	fprintf(f, "d4 %08x d5 %08x d6 %08x d7 %08x\n", log[j].d[4], log[j].d[5], log[j].d[6], log[j].d[7]);
93	+	fprintf(f, "a0 %08x a1 %08x a2 %08x a3 %08x\n", log[j].a[0], log[j].a[1], log[j].a[2], log[j].a[3]);
94	+	fprintf(f, "a4 %08x a5 %08x a6 %08x a7 %08x\n", log[j].a[4], log[j].a[5], log[j].a[6], log[j].a[7]);
95	+	#if ENABLE_MON
96	+	disass_68k(f, log[j].pc);
97	+	#endif
98	+	}
99	+	fclose(f);
100	+	}
101	+	#endif
102	+
103		#define COUNT_INSTRS 0
104
105		#if COUNT_INSTRS
#	Line 111 | Line 163 | static __inline__ unsigned int cft_map (
163		#endif
164		}
165
166	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
166	>	void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
167
168	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode)
168	>	void REGPARAM2 op_illg_1 (uae_u32 opcode)
169		{
170		op_illg (cft_map (opcode));
171		}
#	Line 134 | Line 186 | static void build_cpufunctbl (void)
186		cpu_level = 1;
187		}
188		struct cputbl *tbl = (
189	<	cpu_level == 4 ? op_smalltbl_0
190	<	: cpu_level == 3 ? op_smalltbl_1
191	<	: cpu_level == 2 ? op_smalltbl_2
192	<	: cpu_level == 1 ? op_smalltbl_3
193	<	: op_smalltbl_4);
189	>	cpu_level == 4 ? op_smalltbl_0_ff
190	>	: cpu_level == 3 ? op_smalltbl_1_ff
191	>	: cpu_level == 2 ? op_smalltbl_2_ff
192	>	: cpu_level == 1 ? op_smalltbl_3_ff
193	>	: op_smalltbl_4_ff);
194
195		for (opcode = 0; opcode < 65536; opcode++)
196		cpufunctbl[cft_map (opcode)] = op_illg_1;
#	Line 178 | Line 230 | void init_m68k (void)
230		movem_index2[i] = 7-j;
231		movem_next[i] = i & (~(1 << j));
232		}
181	–	for (i = 0 ; i < 256 ; i++) {
182	–	int j;
183	–	for (j = 7 ; j >= 0 ; j--) {
184	–	if (i & (1 << j)) break;
185	–	}
186	–	fpp_movem_index1[i] = j;
187	–	fpp_movem_index2[i] = 7-j;
188	–	fpp_movem_next[i] = i & (~(1 << j));
189	–	}
233		#if COUNT_INSTRS
234		{
235		FILE *f = fopen (icountfilename (), "r");
#	Line 207 | Line 250 | void init_m68k (void)
250		do_merges ();
251
252		build_cpufunctbl ();
253	+
254	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
255	+	spcflags_lock = B2_create_mutex();
256	+	#endif
257	+	fpu_init(CPUType == 4);
258	+	}
259	+
260	+	void exit_m68k (void)
261	+	{
262	+	fpu_exit ();
263	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
264	+	B2_delete_mutex(spcflags_lock);
265	+	#endif
266		}
267
268		struct regstruct regs, lastint_regs;
#	Line 215 | Line 271 | static int backup_pointer = 0;
271		static long int m68kpc_offset;
272		int lastint_no;
273
274	+	#if REAL_ADDRESSING || DIRECT_ADDRESSING
275	+	#define get_ibyte_1(o) get_byte(get_virtual_address(regs.pc_p) + (o) + 1)
276	+	#define get_iword_1(o) get_word(get_virtual_address(regs.pc_p) + (o))
277	+	#define get_ilong_1(o) get_long(get_virtual_address(regs.pc_p) + (o))
278	+	#else
279		#define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
280		#define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
281		#define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
282	+	#endif
283
284		uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
285		{
#	Line 250 | Line 312 | uae_s32 ShowEA (int reg, amodes mode, wo
312		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
313		addr = m68k_areg(regs,reg) + (uae_s16)disp16;
314		sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
315	<	(long unsigned int)addr);
315	>	(unsigned long)addr);
316		break;
317		case Ad8r:
318		dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
#	Line 283 | Line 345 | uae_s32 ShowEA (int reg, amodes mode, wo
345		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
346		1 << ((dp >> 9) & 3),
347		disp,outer,
348	<	(long unsigned int)addr);
348	>	(unsigned long)addr);
349		} else {
350		addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
351		sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
352		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
353		1 << ((dp >> 9) & 3), disp8,
354	<	(long unsigned int)addr);
354	>	(unsigned long)addr);
355		}
356		break;
357		case PC16:
358		addr = m68k_getpc () + m68kpc_offset;
359		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
360		addr += (uae_s16)disp16;
361	<	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
361	>	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
362		break;
363		case PC8r:
364		addr = m68k_getpc () + m68kpc_offset;
#	Line 330 | Line 392 | uae_s32 ShowEA (int reg, amodes mode, wo
392		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
393		1 << ((dp >> 9) & 3),
394		disp,outer,
395	<	(long unsigned int)addr);
395	>	(unsigned long)addr);
396		} else {
397		addr += (uae_s32)((uae_s8)disp8) + dispreg;
398		sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
399		(int)r, dp & 0x800 ? 'L' : 'W',  1 << ((dp >> 9) & 3),
400	<	disp8, (long unsigned int)addr);
400	>	disp8, (unsigned long)addr);
401		}
402		break;
403		case absw:
404	<	sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
404	>	sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
405		m68kpc_offset += 2;
406		break;
407		case absl:
408	<	sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
408	>	sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
409		m68kpc_offset += 4;
410		break;
411		case imm:
#	Line 357 | Line 419 | uae_s32 ShowEA (int reg, amodes mode, wo
419		m68kpc_offset += 2;
420		break;
421		case sz_long:
422	<	sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
422	>	sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
423		m68kpc_offset += 4;
424		break;
425		default:
#	Line 377 | Line 439 | uae_s32 ShowEA (int reg, amodes mode, wo
439		case imm2:
440		offset = (uae_s32)get_ilong_1 (m68kpc_offset);
441		m68kpc_offset += 4;
442	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
442	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
443		break;
444		case immi:
445		offset = (uae_s32)(uae_s8)(reg & 0xff);
446	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
446	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
447		break;
448		default:
449		break;
#	Line 636 | Line 698 | void MakeFromSR (void)
698		}
699		}
700
701	<	regs.spcflags |= SPCFLAG_INT;
701	>	SPCFLAGS_SET( SPCFLAG_INT );
702		if (regs.t1 || regs.t0)
703	<	regs.spcflags |= SPCFLAG_TRACE;
703	>	SPCFLAGS_SET( SPCFLAG_TRACE );
704		else
705	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
705	>	/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
706	>	SR-modifying instructions (including STOP).  */
707	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
708		}
709
710		void Exception(int nr, uaecptr oldpc)
711		{
712	<	compiler_flush_jsr_stack();
712	>	uae_u32 currpc = m68k_getpc ();
713		MakeSR();
714		if (!regs.s) {
715		regs.usp = m68k_areg(regs, 7);
#	Line 674 | Line 738 | void Exception(int nr, uaecptr oldpc)
738		m68k_areg(regs, 7) -= 2;
739		put_word (m68k_areg(regs, 7), nr * 4);
740		m68k_areg(regs, 7) -= 4;
741	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
741	>	put_long (m68k_areg(regs, 7), currpc);
742		m68k_areg(regs, 7) -= 2;
743		put_word (m68k_areg(regs, 7), regs.sr);
744		regs.sr |= (1 << 13);
#	Line 700 | Line 764 | void Exception(int nr, uaecptr oldpc)
764		}
765		}
766		m68k_areg(regs, 7) -= 4;
767	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
767	>	put_long (m68k_areg(regs, 7), currpc);
768		kludge_me_do:
769		m68k_areg(regs, 7) -= 2;
770		put_word (m68k_areg(regs, 7), regs.sr);
771		m68k_setpc (get_long (regs.vbr + 4*nr));
772	+	SPCFLAGS_SET( SPCFLAG_JIT_END_COMPILE );
773		fill_prefetch_0 ();
774		regs.t1 = regs.t0 = regs.m = 0;
775	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
775	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE | SPCFLAG_DOTRACE );
776		}
777
778		static void Interrupt(int nr)
#	Line 718 | Line 783 | static void Interrupt(int nr)
783		Exception(nr+24, 0);
784
785		regs.intmask = nr;
786	<	regs.spcflags |= SPCFLAG_INT;
786	>	SPCFLAGS_SET( SPCFLAG_INT );
787		}
788
789	<	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
789	>	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1, mmusr, urp, srp;
790
791	<	void m68k_move2c (int regno, uae_u32 *regp)
791	>	int m68k_move2c (int regno, uae_u32 *regp)
792		{
793	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
793	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
794	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
795	>	|| (CPUType == 4 && regno == 0x802))
796	>	{
797		op_illg (0x4E7B);
798	<	else
798	>	return 0;
799	>	} else {
800		switch (regno) {
801		case 0: regs.sfc = *regp & 7; break;
802		case 1: regs.dfc = *regp & 7; break;
803	<	case 2: cacr = *regp & 0x3; break;     /* ignore C and CE */
803	>	case 2:
804	>	cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000);
805	>	#if USE_JIT
806	>	if (CPUType < 4) {
807	>	set_cache_state(cacr&1);
808	>	if (*regp & 0x08)
809	>	flush_icache(1);
810	>	}
811	>	else {
812	>	set_cache_state((cacr&0x8000) || 0);
813	>	// FIXME: The User Manual claims bit 3 of CACR is undefined
814	>	if (*regp & 0x08)
815	>	flush_icache(2);
816	>	}
817	>	#endif
818	>	break;
819		case 3: tc = *regp & 0xc000; break;
820		case 4: itt0 = *regp & 0xffffe364; break;
821		case 5: itt1 = *regp & 0xffffe364; break;
#	Line 742 | Line 826 | void m68k_move2c (int regno, uae_u32 *re
826		case 0x802: caar = *regp &0xfc; break;
827		case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
828		case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
829	+	case 0x805: mmusr = *regp; break;
830	+	case 0x806: urp = *regp; break;
831	+	case 0x807: srp = *regp; break;
832		default:
833		op_illg (0x4E7B);
834	<	break;
834	>	return 0;
835		}
836	+	}
837	+	return 1;
838		}
839
840	<	void m68k_movec2 (int regno, uae_u32 *regp)
840	>	int m68k_movec2 (int regno, uae_u32 *regp)
841		{
842	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
842	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
843	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
844	>	|| (CPUType == 4 && regno == 0x802))
845	>	{
846		op_illg (0x4E7A);
847	<	else
847	>	return 0;
848	>	} else {
849		switch (regno) {
850		case 0: *regp = regs.sfc; break;
851		case 1: *regp = regs.dfc; break;
#	Line 767 | Line 860 | void m68k_movec2 (int regno, uae_u32 *re
860		case 0x802: *regp = caar; break;
861		case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
862		case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
863	+	case 0x805: *regp = mmusr; break;
864	+	case 0x806: *regp = urp; break;
865	+	case 0x807: *regp = srp; break;
866		default:
867		op_illg (0x4E7A);
868	<	break;
868	>	return 0;
869	>	}
870		}
871	+	return 1;
872		}
873
874		static __inline__ int
#	Line 1028 | Line 1126 | static char* ccnames[] =
1126		{ "T ","F ","HI","LS","CC","CS","NE","EQ",
1127		"VC","VS","PL","MI","GE","LT","GT","LE" };
1128
1129	+	// If value is greater than zero, this means we are still processing an EmulOp
1130	+	// because the counter is incremented only in m68k_execute(), i.e. interpretive
1131	+	// execution only
1132	+	static int m68k_execute_depth = 0;
1133	+
1134		void m68k_reset (void)
1135		{
1136		m68k_areg (regs, 7) = 0x2000;
1137		m68k_setpc (ROMBaseMac + 0x2a);
1138		fill_prefetch_0 ();
1036	–	regs.kick_mask = 0xF80000;
1139		regs.s = 1;
1140		regs.m = 0;
1141		regs.stopped = 0;
#	Line 1044 | Line 1146 | void m68k_reset (void)
1146		SET_CFLG (0);
1147		SET_VFLG (0);
1148		SET_NFLG (0);
1149	<	regs.spcflags = 0;
1149	>	SPCFLAGS_INIT( 0 );
1150		regs.intmask = 7;
1151		regs.vbr = regs.sfc = regs.dfc = 0;
1152	<	regs.fpcr = regs.fpsr = regs.fpiar = 0;
1152	>	fpu_reset();
1153	>
1154	>	#if FLIGHT_RECORDER
1155	>	#if ENABLE_MON
1156	>	if (log_ptr == -1) {
1157	>	// Install "log" command in mon
1158	>	mon_add_command("log", dump_log, "log                      Dump m68k emulation log\n");
1159	>	}
1160	>	#endif
1161	>	log_ptr = 0;
1162	>	memset(log, 0, sizeof(log));
1163	>	#endif
1164		}
1165
1166	<	void REGPARAM2 op_illg (uae_u32 opcode)
1166	>	void m68k_emulop_return(void)
1167		{
1168	<	uaecptr pc = m68k_getpc ();
1169	<
1170	<	compiler_flush_jsr_stack ();
1168	>	SPCFLAGS_SET( SPCFLAG_BRK );
1169	>	quit_program = true;
1170	>	}
1171
1172	<	if ((opcode & 0xFF00) == 0x7100) {
1172	>	void m68k_emulop(uae_u32 opcode)
1173	>	{
1174		struct M68kRegisters r;
1175		int i;
1176
1063	–	// Return from Execute68k()?
1064	–	if (opcode == M68K_EXEC_RETURN) {
1065	–	regs.spcflags |= SPCFLAG_BRK;
1066	–	quit_program = 1;
1067	–	return;
1068	–	}
1069	–
1070	–	// Call EMUL_OP opcode
1177		for (i=0; i<8; i++) {
1178		r.d[i] = m68k_dreg(regs, i);
1179		r.a[i] = m68k_areg(regs, i);
#	Line 1081 | Line 1187 | void REGPARAM2 op_illg (uae_u32 opcode)
1187		}
1188		regs.sr = r.sr;
1189		MakeFromSR();
1190	<	m68k_incpc(2);
1191	<	fill_prefetch_0 ();
1192	<	return;
1193	<	}
1190	>	}
1191	>
1192	>	void REGPARAM2 op_illg (uae_u32 opcode)
1193	>	{
1194	>	uaecptr pc = m68k_getpc ();
1195
1196		if ((opcode & 0xF000) == 0xA000) {
1197		Exception(0xA,0);
1198		return;
1199		}
1200
1094	–	//    write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1095	–
1201		if ((opcode & 0xF000) == 0xF000) {
1202		Exception(0xB,0);
1203		return;
1204		}
1205
1206		write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1207	+	#if USE_JIT && JIT_DEBUG
1208	+	compiler_dumpstate();
1209	+	#endif
1210
1211		Exception (4,0);
1212	+	return;
1213		}
1214
1215		void mmu_op(uae_u32 opcode, uae_u16 extra)
1216		{
1217	<	if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1218	<
1219	<	} else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1220	<	} else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1217	>	if ((opcode & 0xFE0) == 0x0500) {
1218	>	/* PFLUSH */
1219	>	mmusr = 0;
1220	>	} else if ((opcode & 0x0FD8) == 0x548) {
1221	>	/* PTEST */
1222		} else
1223	<	op_illg (opcode);
1223	>	op_illg (opcode);
1224		}
1225
1226		static int n_insns = 0, n_spcinsns = 0;
#	Line 1119 | Line 1229 | static uaecptr last_trace_ad = 0;
1229
1230		static void do_trace (void)
1231		{
1232	<	if (regs.t0) {
1232	>	if (regs.t0 && CPUType >= 2) {
1233		uae_u16 opcode;
1234		/* should also include TRAP, CHK, SR modification FPcc */
1235		/* probably never used so why bother */
1236		/* We can afford this to be inefficient... */
1237		m68k_setpc (m68k_getpc ());
1238		fill_prefetch_0 ();
1239	<	opcode = get_word (regs.pc);
1239	>	opcode = get_word(m68k_getpc());
1240		if (opcode == 0x4e72            /* RTE */
1241		|| opcode == 0x4e74                 /* RTD */
1242		|| opcode == 0x4e75                 /* RTS */
#	Line 1142 | Line 1252 | static void do_trace (void)
1252		&& (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1253		{
1254		last_trace_ad = m68k_getpc ();
1255	<	regs.spcflags &= ~SPCFLAG_TRACE;
1256	<	regs.spcflags |= SPCFLAG_DOTRACE;
1255	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1256	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1257		}
1258		} else if (regs.t1) {
1259		last_trace_ad = m68k_getpc ();
1260	<	regs.spcflags &= ~SPCFLAG_TRACE;
1261	<	regs.spcflags |= SPCFLAG_DOTRACE;
1260	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1261	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1262		}
1263		}
1264
1265	<
1156	<	static int do_specialties (void)
1265	>	int m68k_do_specialties (void)
1266		{
1267	<	/*n_spcinsns++;*/
1268	<	run_compiled_code();
1269	<	if (regs.spcflags & SPCFLAG_DOTRACE) {
1267	>	#if USE_JIT
1268	>	// Block was compiled
1269	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_END_COMPILE );
1270	>
1271	>	// Retain the request to get out of compiled code until
1272	>	// we reached the toplevel execution, i.e. the one that
1273	>	// can compile then run compiled code. This also means
1274	>	// we processed all (nested) EmulOps
1275	>	if ((m68k_execute_depth == 0) && SPCFLAGS_TEST( SPCFLAG_JIT_EXEC_RETURN ))
1276	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_EXEC_RETURN );
1277	>	#endif
1278	>
1279	>	if (SPCFLAGS_TEST( SPCFLAG_DOTRACE )) {
1280		Exception (9,last_trace_ad);
1281		}
1282	<	while (regs.spcflags & SPCFLAG_STOP) {
1283	<	if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1282	>	while (SPCFLAGS_TEST( SPCFLAG_STOP )) {
1283	>	if (SPCFLAGS_TEST( SPCFLAG_INT | SPCFLAG_DOINT )){
1284	>	SPCFLAGS_CLEAR( SPCFLAG_INT | SPCFLAG_DOINT );
1285		int intr = intlev ();
1166	–	regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1286		if (intr != -1 && intr > regs.intmask) {
1287		Interrupt (intr);
1288		regs.stopped = 0;
1289	<	regs.spcflags &= ~SPCFLAG_STOP;
1289	>	SPCFLAGS_CLEAR( SPCFLAG_STOP );
1290		}
1291		}
1292		}
1293	<	if (regs.spcflags & SPCFLAG_TRACE)
1293	>	if (SPCFLAGS_TEST( SPCFLAG_TRACE ))
1294		do_trace ();
1295
1296	<	if (regs.spcflags & SPCFLAG_DOINT) {
1296	>	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
1297	>	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
1298		int intr = intlev ();
1179	–	regs.spcflags &= ~SPCFLAG_DOINT;
1299		if (intr != -1 && intr > regs.intmask) {
1300		Interrupt (intr);
1301		regs.stopped = 0;
1302		}
1303		}
1304	<	if (regs.spcflags & SPCFLAG_INT) {
1305	<	regs.spcflags &= ~SPCFLAG_INT;
1306	<	regs.spcflags |= SPCFLAG_DOINT;
1304	>	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
1305	>	SPCFLAGS_CLEAR( SPCFLAG_INT );
1306	>	SPCFLAGS_SET( SPCFLAG_DOINT );
1307		}
1308	<	if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1309	<	regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1308	>	if (SPCFLAGS_TEST( SPCFLAG_BRK )) {
1309	>	SPCFLAGS_CLEAR( SPCFLAG_BRK );
1310		return 1;
1311		}
1312		return 0;
1313		}
1314
1315	<	static void m68k_run_1 (void)
1315	>	void m68k_do_execute (void)
1316		{
1317		for (;;) {
1318		uae_u32 opcode = GET_OPCODE;
1319	+	#if FLIGHT_RECORDER
1320	+	m68k_record_step(m68k_getpc());
1321	+	#endif
1322		(*cpufunctbl[opcode])(opcode);
1323	<	if (regs.spcflags) {
1324	<	if (do_specialties())
1323	>	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
1324	>	if (m68k_do_specialties())
1325		return;
1326		}
1327		}
1328		}
1329
1330	<	#define m68k_run1 m68k_run_1
1331	<
1210	<	int in_m68k_go = 0;
1211	<
1212	<	void m68k_go (int may_quit)
1330	>	#if USE_JIT && !(defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY))
1331	>	void m68k_compile_execute (void)
1332		{
1333	<	// m68k_go() must be reentrant for Execute68k() and Execute68kTrap() to work
1334	<	/*
1335	<	if (in_m68k_go || !may_quit) {
1336	<	write_log("Bug! m68k_go is not reentrant.\n");
1218	<	abort();
1333	>	for (;;) {
1334	>	if (quit_program)
1335	>	break;
1336	>	m68k_do_compile_execute();
1337		}
1338	<	*/
1339	<	in_m68k_go++;
1338	>	}
1339	>	#endif
1340	>
1341	>	void m68k_execute (void)
1342	>	{
1343	>	#if USE_JIT
1344	>	++m68k_execute_depth;
1345	>	#endif
1346		for (;;) {
1347	<	if (quit_program > 0) {
1224	<	if (quit_program == 1)
1347	>	if (quit_program)
1348		break;
1349	<	quit_program = 0;
1227	<	m68k_reset ();
1228	<	}
1229	<	m68k_run1();
1349	>	m68k_do_execute();
1350		}
1351	<	if (debugging) {
1352	<	uaecptr nextpc;
1353	<	m68k_dumpstate(&nextpc);
1234	<	exit(1);
1235	<	}
1236	<	in_m68k_go--;
1351	>	#if USE_JIT
1352	>	--m68k_execute_depth;
1353	>	#endif
1354		}
1355
1356		static void m68k_verify (uaecptr addr, uaecptr *nextpc)
#	Line 1342 | Line 1459 | void m68k_dumpstate (uaecptr *nextpc)
1459		printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1460		regs.t1, regs.t0, regs.s, regs.m,
1461		GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1462	<	for (i = 0; i < 8; i++){
1463	<	printf ("FP%d: %g ", i, regs.fp[i]);
1464	<	if ((i & 3) == 3) printf ("\n");
1465	<	}
1349	<	printf ("N=%d Z=%d I=%d NAN=%d\n",
1350	<	(regs.fpsr & 0x8000000) != 0,
1351	<	(regs.fpsr & 0x4000000) != 0,
1352	<	(regs.fpsr & 0x2000000) != 0,
1353	<	(regs.fpsr & 0x1000000) != 0);
1354	<
1462	>
1463	>	fpu_dump_registers();
1464	>	fpu_dump_flags();
1465	>
1466		m68k_disasm(m68k_getpc (), nextpc, 1);
1467		if (nextpc)
1468		printf ("next PC: %08lx\n", *nextpc);

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