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root/cebix/BasiliskII/src/uae_cpu/newcpu.cpp

Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.4 by cebix, 1999-10-31T23:18:42Z vs.
Revision 1.15 by gbeauche, 2002-09-13T12:50:56Z

#	Line 22 | Line 22 | extern int intlev(void);       // From baisili
22		#include "memory.h"
23		#include "readcpu.h"
24		#include "newcpu.h"
25	<	#include "compiler.h"
25	>	#include "fpu/fpu.h"
26	>
27	>	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
28	>	B2_mutex *spcflags_lock = NULL;
29	>	#endif
30	>
31	>	#if ENABLE_MON
32	>	#include "mon.h"
33	>	#include "mon_disass.h"
34	>	#endif
35
36		int quit_program = 0;
37	<	int debugging = 0;
37	>	const int debugging = 0;
38		struct flag_struct regflags;
39
40		/* Opcode of faulting instruction */
#	Line 42 | Line 51 | int movem_index1[256];
51		int movem_index2[256];
52		int movem_next[256];
53
45	–	int fpp_movem_index1[256];
46	–	int fpp_movem_index2[256];
47	–	int fpp_movem_next[256];
48	–
54		cpuop_func *cpufunctbl[65536];
55
56	+	#define FLIGHT_RECORDER 0
57	+
58	+	#if FLIGHT_RECORDER
59	+	struct rec_step {
60	+	uae_u32 d[8];
61	+	uae_u32 a[8];
62	+	uae_u32 pc;
63	+	};
64	+
65	+	const int LOG_SIZE = 8192;
66	+	static rec_step log[LOG_SIZE];
67	+	static int log_ptr = -1; // First time initialization
68	+
69	+	static const char *log_filename(void)
70	+	{
71	+	const char *name = getenv("M68K_LOG_FILE");
72	+	return name ? name : "log.68k";
73	+	}
74	+
75	+	static void record_step(uaecptr pc)
76	+	{
77	+	for (int i = 0; i < 8; i++) {
78	+	log[log_ptr].d[i] = m68k_dreg(regs, i);
79	+	log[log_ptr].a[i] = m68k_areg(regs, i);
80	+	}
81	+	log[log_ptr].pc = pc;
82	+	log_ptr = (log_ptr + 1) % LOG_SIZE;
83	+	}
84	+
85	+	static void dump_log(void)
86	+	{
87	+	FILE *f = fopen(log_filename(), "w");
88	+	if (f == NULL)
89	+	return;
90	+	for (int i = 0; i < LOG_SIZE; i++) {
91	+	int j = (i + log_ptr) % LOG_SIZE;
92	+	fprintf(f, "pc %08x\n", log[j].pc);
93	+	fprintf(f, "d0 %08x d1 %08x d2 %08x d3 %08x\n", log[j].d[0], log[j].d[1], log[j].d[2], log[j].d[3]);
94	+	fprintf(f, "d4 %08x d5 %08x d6 %08x d7 %08x\n", log[j].d[4], log[j].d[5], log[j].d[6], log[j].d[7]);
95	+	fprintf(f, "a0 %08x a1 %08x a2 %08x a3 %08x\n", log[j].a[0], log[j].a[1], log[j].a[2], log[j].a[3]);
96	+	fprintf(f, "a4 %08x a5 %08x a6 %08x a7 %08x\n", log[j].a[4], log[j].a[5], log[j].a[6], log[j].a[7]);
97	+	#if ENABLE_MON
98	+	disass_68k(f, log[j].pc);
99	+	#endif
100	+	}
101	+	fclose(f);
102	+	}
103	+	#endif
104	+
105		#define COUNT_INSTRS 0
106
107		#if COUNT_INSTRS
#	Line 111 | Line 165 | static __inline__ unsigned int cft_map (
165		#endif
166		}
167
168	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
168	>	cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
169
170	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode)
170	>	cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode)
171		{
172	<	op_illg (cft_map (opcode));
172	>	cpuop_return( op_illg (cft_map (opcode)) );
173		}
174
175		static void build_cpufunctbl (void)
#	Line 134 | Line 188 | static void build_cpufunctbl (void)
188		cpu_level = 1;
189		}
190		struct cputbl *tbl = (
191	<	cpu_level == 4 ? op_smalltbl_0
192	<	: cpu_level == 3 ? op_smalltbl_1
193	<	: cpu_level == 2 ? op_smalltbl_2
194	<	: cpu_level == 1 ? op_smalltbl_3
195	<	: op_smalltbl_4);
191	>	cpu_level == 4 ? op_smalltbl_0_ff
192	>	: cpu_level == 3 ? op_smalltbl_1_ff
193	>	: cpu_level == 2 ? op_smalltbl_2_ff
194	>	: cpu_level == 1 ? op_smalltbl_3_ff
195	>	: op_smalltbl_4_ff);
196
197		for (opcode = 0; opcode < 65536; opcode++)
198		cpufunctbl[cft_map (opcode)] = op_illg_1;
#	Line 178 | Line 232 | void init_m68k (void)
232		movem_index2[i] = 7-j;
233		movem_next[i] = i & (~(1 << j));
234		}
181	–	for (i = 0 ; i < 256 ; i++) {
182	–	int j;
183	–	for (j = 7 ; j >= 0 ; j--) {
184	–	if (i & (1 << j)) break;
185	–	}
186	–	fpp_movem_index1[i] = j;
187	–	fpp_movem_index2[i] = 7-j;
188	–	fpp_movem_next[i] = i & (~(1 << j));
189	–	}
235		#if COUNT_INSTRS
236		{
237		FILE *f = fopen (icountfilename (), "r");
#	Line 207 | Line 252 | void init_m68k (void)
252		do_merges ();
253
254		build_cpufunctbl ();
255	+
256	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
257	+	spcflags_lock = B2_create_mutex();
258	+	#endif
259	+	fpu_init(CPUType == 4);
260	+	}
261	+
262	+	void exit_m68k (void)
263	+	{
264	+	fpu_exit ();
265	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
266	+	B2_delete_mutex(spcflags_lock);
267	+	#endif
268		}
269
270		struct regstruct regs, lastint_regs;
#	Line 215 | Line 273 | static int backup_pointer = 0;
273		static long int m68kpc_offset;
274		int lastint_no;
275
276	+	#if REAL_ADDRESSING || DIRECT_ADDRESSING
277	+	#define get_ibyte_1(o) get_byte(get_virtual_address(regs.pc_p) + (o) + 1)
278	+	#define get_iword_1(o) get_word(get_virtual_address(regs.pc_p) + (o))
279	+	#define get_ilong_1(o) get_long(get_virtual_address(regs.pc_p) + (o))
280	+	#else
281		#define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
282		#define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
283		#define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
284	+	#endif
285
286		uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
287		{
#	Line 250 | Line 314 | uae_s32 ShowEA (int reg, amodes mode, wo
314		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
315		addr = m68k_areg(regs,reg) + (uae_s16)disp16;
316		sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
317	<	(long unsigned int)addr);
317	>	(unsigned long)addr);
318		break;
319		case Ad8r:
320		dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
#	Line 283 | Line 347 | uae_s32 ShowEA (int reg, amodes mode, wo
347		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
348		1 << ((dp >> 9) & 3),
349		disp,outer,
350	<	(long unsigned int)addr);
350	>	(unsigned long)addr);
351		} else {
352		addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
353		sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
354		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
355		1 << ((dp >> 9) & 3), disp8,
356	<	(long unsigned int)addr);
356	>	(unsigned long)addr);
357		}
358		break;
359		case PC16:
360		addr = m68k_getpc () + m68kpc_offset;
361		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
362		addr += (uae_s16)disp16;
363	<	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
363	>	sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
364		break;
365		case PC8r:
366		addr = m68k_getpc () + m68kpc_offset;
#	Line 330 | Line 394 | uae_s32 ShowEA (int reg, amodes mode, wo
394		dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
395		1 << ((dp >> 9) & 3),
396		disp,outer,
397	<	(long unsigned int)addr);
397	>	(unsigned long)addr);
398		} else {
399		addr += (uae_s32)((uae_s8)disp8) + dispreg;
400		sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
401		(int)r, dp & 0x800 ? 'L' : 'W',  1 << ((dp >> 9) & 3),
402	<	disp8, (long unsigned int)addr);
402	>	disp8, (unsigned long)addr);
403		}
404		break;
405		case absw:
406	<	sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
406	>	sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
407		m68kpc_offset += 2;
408		break;
409		case absl:
410	<	sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
410	>	sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
411		m68kpc_offset += 4;
412		break;
413		case imm:
#	Line 357 | Line 421 | uae_s32 ShowEA (int reg, amodes mode, wo
421		m68kpc_offset += 2;
422		break;
423		case sz_long:
424	<	sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
424	>	sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
425		m68kpc_offset += 4;
426		break;
427		default:
#	Line 377 | Line 441 | uae_s32 ShowEA (int reg, amodes mode, wo
441		case imm2:
442		offset = (uae_s32)get_ilong_1 (m68kpc_offset);
443		m68kpc_offset += 4;
444	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
444	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
445		break;
446		case immi:
447		offset = (uae_s32)(uae_s8)(reg & 0xff);
448	<	sprintf (buffer,"#$%08lx", (long unsigned int)offset);
448	>	sprintf (buffer,"#$%08lx", (unsigned long)offset);
449		break;
450		default:
451		break;
#	Line 636 | Line 700 | void MakeFromSR (void)
700		}
701		}
702
703	<	regs.spcflags |= SPCFLAG_INT;
703	>	SPCFLAGS_SET( SPCFLAG_INT );
704		if (regs.t1 || regs.t0)
705	<	regs.spcflags |= SPCFLAG_TRACE;
705	>	SPCFLAGS_SET( SPCFLAG_TRACE );
706		else
707	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
707	>	/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
708	>	SR-modifying instructions (including STOP).  */
709	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
710		}
711
712		void Exception(int nr, uaecptr oldpc)
713		{
714	<	compiler_flush_jsr_stack();
714	>	uae_u32 currpc = m68k_getpc ();
715		MakeSR();
716		if (!regs.s) {
717		regs.usp = m68k_areg(regs, 7);
#	Line 674 | Line 740 | void Exception(int nr, uaecptr oldpc)
740		m68k_areg(regs, 7) -= 2;
741		put_word (m68k_areg(regs, 7), nr * 4);
742		m68k_areg(regs, 7) -= 4;
743	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
743	>	put_long (m68k_areg(regs, 7), currpc);
744		m68k_areg(regs, 7) -= 2;
745		put_word (m68k_areg(regs, 7), regs.sr);
746		regs.sr |= (1 << 13);
#	Line 700 | Line 766 | void Exception(int nr, uaecptr oldpc)
766		}
767		}
768		m68k_areg(regs, 7) -= 4;
769	<	put_long (m68k_areg(regs, 7), m68k_getpc ());
769	>	put_long (m68k_areg(regs, 7), currpc);
770		kludge_me_do:
771		m68k_areg(regs, 7) -= 2;
772		put_word (m68k_areg(regs, 7), regs.sr);
773		m68k_setpc (get_long (regs.vbr + 4*nr));
774	+	SPCFLAGS_SET( SPCFLAG_JIT_END_COMPILE );
775		fill_prefetch_0 ();
776		regs.t1 = regs.t0 = regs.m = 0;
777	<	regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
777	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE | SPCFLAG_DOTRACE );
778		}
779
780		static void Interrupt(int nr)
#	Line 718 | Line 785 | static void Interrupt(int nr)
785		Exception(nr+24, 0);
786
787		regs.intmask = nr;
788	<	regs.spcflags |= SPCFLAG_INT;
788	>	SPCFLAGS_SET( SPCFLAG_INT );
789		}
790
791	<	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
791	>	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1, mmusr, urp, srp;
792
793	<	void m68k_move2c (int regno, uae_u32 *regp)
793	>	int m68k_move2c (int regno, uae_u32 *regp)
794		{
795	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
795	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
796	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
797	>	|| (CPUType == 4 && regno == 0x802))
798	>	{
799		op_illg (0x4E7B);
800	<	else
800	>	return 0;
801	>	} else {
802		switch (regno) {
803		case 0: regs.sfc = *regp & 7; break;
804		case 1: regs.dfc = *regp & 7; break;
805	<	case 2: cacr = *regp & 0x3; break;     /* ignore C and CE */
805	>	case 2: cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000); break;
806		case 3: tc = *regp & 0xc000; break;
807		case 4: itt0 = *regp & 0xffffe364; break;
808		case 5: itt1 = *regp & 0xffffe364; break;
#	Line 742 | Line 813 | void m68k_move2c (int regno, uae_u32 *re
813		case 0x802: caar = *regp &0xfc; break;
814		case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
815		case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
816	+	case 0x805: mmusr = *regp; break;
817	+	case 0x806: urp = *regp; break;
818	+	case 0x807: srp = *regp; break;
819		default:
820		op_illg (0x4E7B);
821	<	break;
821	>	return 0;
822		}
823	+	}
824	+	return 1;
825		}
826
827	<	void m68k_movec2 (int regno, uae_u32 *regp)
827	>	int m68k_movec2 (int regno, uae_u32 *regp)
828		{
829	<	if (CPUType == 1 && (regno & 0x7FF) > 1)
829	>	if ((CPUType == 1 && (regno & 0x7FF) > 1)
830	>	|| (CPUType < 4 && (regno & 0x7FF) > 2)
831	>	|| (CPUType == 4 && regno == 0x802))
832	>	{
833		op_illg (0x4E7A);
834	<	else
834	>	return 0;
835	>	} else {
836		switch (regno) {
837		case 0: *regp = regs.sfc; break;
838		case 1: *regp = regs.dfc; break;
#	Line 767 | Line 847 | void m68k_movec2 (int regno, uae_u32 *re
847		case 0x802: *regp = caar; break;
848		case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
849		case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
850	+	case 0x805: *regp = mmusr; break;
851	+	case 0x806: *regp = urp; break;
852	+	case 0x807: *regp = srp; break;
853		default:
854		op_illg (0x4E7A);
855	<	break;
855	>	return 0;
856	>	}
857		}
858	+	return 1;
859		}
860
861		static __inline__ int
#	Line 1028 | Line 1113 | static char* ccnames[] =
1113		{ "T ","F ","HI","LS","CC","CS","NE","EQ",
1114		"VC","VS","PL","MI","GE","LT","GT","LE" };
1115
1116	+	// If value is greater than zero, this means we are still processing an EmulOp
1117	+	// because the counter is incremented only in m68k_execute(), i.e. interpretive
1118	+	// execution only
1119	+	static int m68k_execute_depth = 0;
1120	+
1121		void m68k_reset (void)
1122		{
1123		m68k_areg (regs, 7) = 0x2000;
1124		m68k_setpc (ROMBaseMac + 0x2a);
1125		fill_prefetch_0 ();
1036	–	regs.kick_mask = 0xF80000;
1126		regs.s = 1;
1127		regs.m = 0;
1128		regs.stopped = 0;
#	Line 1044 | Line 1133 | void m68k_reset (void)
1133		SET_CFLG (0);
1134		SET_VFLG (0);
1135		SET_NFLG (0);
1136	<	regs.spcflags = 0;
1136	>	SPCFLAGS_INIT( 0 );
1137		regs.intmask = 7;
1138		regs.vbr = regs.sfc = regs.dfc = 0;
1139	<	regs.fpcr = regs.fpsr = regs.fpiar = 0;
1139	>	fpu_reset();
1140	>
1141	>	#if FLIGHT_RECORDER
1142	>	#if ENABLE_MON
1143	>	if (log_ptr == -1) {
1144	>	// Install "log" command in mon
1145	>	mon_add_command("log", dump_log, "log                      Dump m68k emulation log\n");
1146	>	}
1147	>	#endif
1148	>	log_ptr = 0;
1149	>	memset(log, 0, sizeof(log));
1150	>	#endif
1151		}
1152
1153	<	void REGPARAM2 op_illg (uae_u32 opcode)
1153	>	void m68k_emulop_return(void)
1154		{
1155	<	uaecptr pc = m68k_getpc ();
1156	<
1157	<	compiler_flush_jsr_stack ();
1155	>	SPCFLAGS_SET( SPCFLAG_BRK );
1156	>	quit_program = 1;
1157	>	}
1158
1159	<	if ((opcode & 0xFF00) == 0x7100) {
1159	>	void m68k_emulop(uae_u32 opcode)
1160	>	{
1161		struct M68kRegisters r;
1162		int i;
1163
1063	–	// Return from Execute68k()?
1064	–	if (opcode == M68K_EXEC_RETURN) {
1065	–	regs.spcflags |= SPCFLAG_BRK;
1066	–	quit_program = 1;
1067	–	return;
1068	–	}
1069	–
1070	–	// Call EMUL_OP opcode
1164		for (i=0; i<8; i++) {
1165		r.d[i] = m68k_dreg(regs, i);
1166		r.a[i] = m68k_areg(regs, i);
#	Line 1081 | Line 1174 | void REGPARAM2 op_illg (uae_u32 opcode)
1174		}
1175		regs.sr = r.sr;
1176		MakeFromSR();
1177	<	m68k_incpc(2);
1178	<	fill_prefetch_0 ();
1179	<	return;
1180	<	}
1177	>	}
1178	>
1179	>	cpuop_rettype REGPARAM2 op_illg (uae_u32 opcode)
1180	>	{
1181	>	uaecptr pc = m68k_getpc ();
1182
1183		if ((opcode & 0xF000) == 0xA000) {
1184		Exception(0xA,0);
1185	<	return;
1185	>	cpuop_return(CFLOW_TRAP);
1186		}
1187
1094	–	//    write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1095	–
1188		if ((opcode & 0xF000) == 0xF000) {
1189		Exception(0xB,0);
1190	<	return;
1190	>	cpuop_return(CFLOW_TRAP);
1191		}
1192
1193		write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1194
1195		Exception (4,0);
1196	+	cpuop_return(CFLOW_TRAP);
1197		}
1198
1199		void mmu_op(uae_u32 opcode, uae_u16 extra)
1200		{
1201	<	if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1202	<
1203	<	} else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1204	<	} else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1201	>	if ((opcode & 0xFE0) == 0x0500) {
1202	>	/* PFLUSH */
1203	>	mmusr = 0;
1204	>	} else if ((opcode & 0x0FD8) == 0x548) {
1205	>	/* PTEST */
1206		} else
1207	<	op_illg (opcode);
1207	>	op_illg (opcode);
1208		}
1209
1210		static int n_insns = 0, n_spcinsns = 0;
#	Line 1119 | Line 1213 | static uaecptr last_trace_ad = 0;
1213
1214		static void do_trace (void)
1215		{
1216	<	if (regs.t0) {
1216	>	if (regs.t0 && CPUType >= 2) {
1217		uae_u16 opcode;
1218		/* should also include TRAP, CHK, SR modification FPcc */
1219		/* probably never used so why bother */
1220		/* We can afford this to be inefficient... */
1221		m68k_setpc (m68k_getpc ());
1222		fill_prefetch_0 ();
1223	<	opcode = get_word (regs.pc);
1223	>	opcode = get_word(m68k_getpc());
1224		if (opcode == 0x4e72            /* RTE */
1225		|| opcode == 0x4e74                 /* RTD */
1226		|| opcode == 0x4e75                 /* RTS */
#	Line 1142 | Line 1236 | static void do_trace (void)
1236		&& (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1237		{
1238		last_trace_ad = m68k_getpc ();
1239	<	regs.spcflags &= ~SPCFLAG_TRACE;
1240	<	regs.spcflags |= SPCFLAG_DOTRACE;
1239	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1240	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1241		}
1242		} else if (regs.t1) {
1243		last_trace_ad = m68k_getpc ();
1244	<	regs.spcflags &= ~SPCFLAG_TRACE;
1245	<	regs.spcflags |= SPCFLAG_DOTRACE;
1244	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1245	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1246		}
1247		}
1248
1249	<
1156	<	static int do_specialties (void)
1249	>	int m68k_do_specialties (void)
1250		{
1251	<	/*n_spcinsns++;*/
1159	<	run_compiled_code();
1160	<	if (regs.spcflags & SPCFLAG_DOTRACE) {
1251	>	if (SPCFLAGS_TEST( SPCFLAG_DOTRACE )) {
1252		Exception (9,last_trace_ad);
1253		}
1254	<	while (regs.spcflags & SPCFLAG_STOP) {
1255	<	if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1254	>	while (SPCFLAGS_TEST( SPCFLAG_STOP )) {
1255	>	if (SPCFLAGS_TEST( SPCFLAG_INT | SPCFLAG_DOINT )){
1256	>	SPCFLAGS_CLEAR( SPCFLAG_INT | SPCFLAG_DOINT );
1257		int intr = intlev ();
1166	–	regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1258		if (intr != -1 && intr > regs.intmask) {
1259		Interrupt (intr);
1260		regs.stopped = 0;
1261	<	regs.spcflags &= ~SPCFLAG_STOP;
1261	>	SPCFLAGS_CLEAR( SPCFLAG_STOP );
1262		}
1263		}
1264		}
1265	<	if (regs.spcflags & SPCFLAG_TRACE)
1265	>	if (SPCFLAGS_TEST( SPCFLAG_TRACE ))
1266		do_trace ();
1267
1268	<	if (regs.spcflags & SPCFLAG_DOINT) {
1268	>	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
1269	>	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
1270		int intr = intlev ();
1179	–	regs.spcflags &= ~SPCFLAG_DOINT;
1271		if (intr != -1 && intr > regs.intmask) {
1272		Interrupt (intr);
1273		regs.stopped = 0;
1274		}
1275		}
1276	<	if (regs.spcflags & SPCFLAG_INT) {
1277	<	regs.spcflags &= ~SPCFLAG_INT;
1278	<	regs.spcflags |= SPCFLAG_DOINT;
1279	<	}
1280	<	if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1281	<	regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1282	<	return 1;
1276	>	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
1277	>	SPCFLAGS_CLEAR( SPCFLAG_INT );
1278	>	SPCFLAGS_SET( SPCFLAG_DOINT );
1279	>	}
1280	>	if (SPCFLAGS_TEST( SPCFLAG_BRK )) {
1281	>	SPCFLAGS_CLEAR( SPCFLAG_BRK );
1282	>	return CFLOW_EXEC_RETURN;
1283		}
1284		return 0;
1285		}
1286
1287	<	static void m68k_run_1 (void)
1287	>	void m68k_do_execute (void)
1288		{
1289		for (;;) {
1290		uae_u32 opcode = GET_OPCODE;
1291	+	#if FLIGHT_RECORDER
1292	+	record_step(m68k_getpc());
1293	+	#endif
1294	+	#ifdef X86_ASSEMBLY
1295	+	__asm__ __volatile__("\tpushl %%ebp\n\tcall *%%ebx\n\tpopl %%ebp" /* FIXME */
1296	+	: : "b" (cpufunctbl[opcode]), "a" (opcode)
1297	+	: "%edx", "%ecx", "%esi", "%edi",  "%ebp", "memory", "cc");
1298	+	#else
1299		(*cpufunctbl[opcode])(opcode);
1300	<	if (regs.spcflags) {
1301	<	if (do_specialties())
1300	>	#endif
1301	>	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
1302	>	if (m68k_do_specialties())
1303		return;
1304		}
1305		}
1306		}
1307
1308	<	#define m68k_run1 m68k_run_1
1209	<
1210	<	int in_m68k_go = 0;
1211	<
1212	<	void m68k_go (int may_quit)
1308	>	void m68k_execute (void)
1309		{
1214	–	// m68k_go() must be reentrant for Execute68k() and Execute68kTrap() to work
1215	–	/*
1216	–	if (in_m68k_go || !may_quit) {
1217	–	write_log("Bug! m68k_go is not reentrant.\n");
1218	–	abort();
1219	–	}
1220	–	*/
1221	–	in_m68k_go++;
1310		for (;;) {
1311		if (quit_program > 0) {
1312		if (quit_program == 1)
#	Line 1226 | Line 1314 | void m68k_go (int may_quit)
1314		quit_program = 0;
1315		m68k_reset ();
1316		}
1317	<	m68k_run1();
1317	>	m68k_do_execute();
1318		}
1319		if (debugging) {
1320		uaecptr nextpc;
1321		m68k_dumpstate(&nextpc);
1322		exit(1);
1323		}
1236	–	in_m68k_go--;
1324		}
1325
1326		static void m68k_verify (uaecptr addr, uaecptr *nextpc)
#	Line 1342 | Line 1429 | void m68k_dumpstate (uaecptr *nextpc)
1429		printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1430		regs.t1, regs.t0, regs.s, regs.m,
1431		GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1432	<	for (i = 0; i < 8; i++){
1433	<	printf ("FP%d: %g ", i, regs.fp[i]);
1434	<	if ((i & 3) == 3) printf ("\n");
1435	<	}
1349	<	printf ("N=%d Z=%d I=%d NAN=%d\n",
1350	<	(regs.fpsr & 0x8000000) != 0,
1351	<	(regs.fpsr & 0x4000000) != 0,
1352	<	(regs.fpsr & 0x2000000) != 0,
1353	<	(regs.fpsr & 0x1000000) != 0);
1354	<
1432	>
1433	>	fpu_dump_registers();
1434	>	fpu_dump_flags();
1435	>
1436		m68k_disasm(m68k_getpc (), nextpc, 1);
1437		if (nextpc)
1438		printf ("next PC: %08lx\n", *nextpc);

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