[ViewVC] Diff of: cebix/BasiliskII/src/uae

Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.11 by gbeauche, 2002-03-18T21:25:07Z vs.
Revision 1.16 by gbeauche, 2002-09-17T16:05:39Z

#	Line 22 \| Line 22 \| extern int intlev(void); // From baisili
22		#include "memory.h"
23		#include "readcpu.h"
24		#include "newcpu.h"
25	+	#include "compiler/compemu.h"
26	+	#include "fpu/fpu.h"
27	+
28	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
29	+	B2_mutex *spcflags_lock = NULL;
30	+	#endif
31
32		#if ENABLE_MON
33		#include "mon.h"
#	Line 29 \| Line 35 \| extern int intlev(void); // From baisili
35		#endif
36
37		int quit_program = 0;
38	<	int debugging = 0;
38	>	const int debugging = 0;
39		struct flag_struct regflags;
40
41		/* Opcode of faulting instruction */
#	Line 46 \| Line 52 \| int movem_index1[256];
52		int movem_index2[256];
53		int movem_next[256];
54
49	–	int fpp_movem_index1[256];
50	–	int fpp_movem_index2[256];
51	–	int fpp_movem_next[256];
52	–
55		cpuop_func *cpufunctbl[65536];
56
55	–	#define FLIGHT_RECORDER 0
56	–
57		#if FLIGHT_RECORDER
58		struct rec_step {
59		uae_u32 d[8];
#	Line 71 \| Line 71 \| *static const char log_filename(void)**
71		return name ? name : "log.68k";
72		}
73
74	<	static void record_step(uaecptr pc)
74	>	void m68k_record_step(uaecptr pc)
75		{
76		for (int i = 0; i < 8; i++) {
77		log[log_ptr].d[i] = m68k_dreg(regs, i);
#	Line 164 \| Line 164 \| static __inline__ unsigned int cft_map (
164		#endif
165		}
166
167	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
167	>	cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
168
169	<	static void REGPARAM2 op_illg_1 (uae_u32 opcode)
169	>	cpuop_rettype REGPARAM2 op_illg_1 (uae_u32 opcode)
170		{
171	<	op_illg (cft_map (opcode));
171	>	cpuop_return( op_illg (cft_map (opcode)) );
172		}
173
174		static void build_cpufunctbl (void)
#	Line 187 \| Line 187 \| static void build_cpufunctbl (void)
187		cpu_level = 1;
188		}
189		struct cputbl *tbl = (
190	<	cpu_level == 4 ? op_smalltbl_0
191	<	: cpu_level == 3 ? op_smalltbl_1
192	<	: cpu_level == 2 ? op_smalltbl_2
193	<	: cpu_level == 1 ? op_smalltbl_3
194	<	: op_smalltbl_4);
190	>	cpu_level == 4 ? op_smalltbl_0_ff
191	>	: cpu_level == 3 ? op_smalltbl_1_ff
192	>	: cpu_level == 2 ? op_smalltbl_2_ff
193	>	: cpu_level == 1 ? op_smalltbl_3_ff
194	>	: op_smalltbl_4_ff);
195
196		for (opcode = 0; opcode < 65536; opcode++)
197		cpufunctbl[cft_map (opcode)] = op_illg_1;
#	Line 231 \| Line 231 \| void init_m68k (void)
231		movem_index2[i] = 7-j;
232		movem_next[i] = i & (~(1 << j));
233		}
234	–	for (i = 0 ; i < 256 ; i++) {
235	–	int j;
236	–	for (j = 7 ; j >= 0 ; j--) {
237	–	if (i & (1 << j)) break;
238	–	}
239	–	fpp_movem_index1[i] = 7-j;
240	–	fpp_movem_index2[i] = j;
241	–	fpp_movem_next[i] = i & (~(1 << j));
242	–	}
234		#if COUNT_INSTRS
235		{
236		FILE *f = fopen (icountfilename (), "r");
#	Line 260 \| Line 251 \| void init_m68k (void)
251		do_merges ();
252
253		build_cpufunctbl ();
254	<
255	<	fpu_init ();
256	<	fpu_set_integral_fpu (CPUType == 4);
254	>
255	>	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
256	>	spcflags_lock = B2_create_mutex();
257	>	#endif
258	>	fpu_init(CPUType == 4);
259		}
260
261		void exit_m68k (void)
262		{
263		fpu_exit ();
264	+	#if defined(ENABLE_EXCLUSIVE_SPCFLAGS) && !defined(HAVE_HARDWARE_LOCKS)
265	+	B2_delete_mutex(spcflags_lock);
266	+	#endif
267		}
268
269		struct regstruct regs, lastint_regs;
#	Line 703 \| Line 699 \| void MakeFromSR (void)
699		}
700		}
701
702	<	regs.spcflags \|= SPCFLAG_INT;
702	>	SPCFLAGS_SET( SPCFLAG_INT );
703		if (regs.t1 \|\| regs.t0)
704	<	regs.spcflags \|= SPCFLAG_TRACE;
704	>	SPCFLAGS_SET( SPCFLAG_TRACE );
705		else
706	<	regs.spcflags &= ~(SPCFLAG_TRACE \| SPCFLAG_DOTRACE);
706	>	/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
707	>	SR-modifying instructions (including STOP). */
708	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
709		}
710
711		void Exception(int nr, uaecptr oldpc)
#	Line 772 \| Line 770 \| kludge_me_do:
770		m68k_areg(regs, 7) -= 2;
771		put_word (m68k_areg(regs, 7), regs.sr);
772		m68k_setpc (get_long (regs.vbr + 4*nr));
773	+	SPCFLAGS_SET( SPCFLAG_JIT_END_COMPILE );
774		fill_prefetch_0 ();
775		regs.t1 = regs.t0 = regs.m = 0;
776	<	regs.spcflags &= ~(SPCFLAG_TRACE \| SPCFLAG_DOTRACE);
776	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE \| SPCFLAG_DOTRACE );
777		}
778
779		static void Interrupt(int nr)
#	Line 785 \| Line 784 \| static void Interrupt(int nr)
784		Exception(nr+24, 0);
785
786		regs.intmask = nr;
787	<	regs.spcflags \|= SPCFLAG_INT;
787	>	SPCFLAGS_SET( SPCFLAG_INT );
788		}
789
790	<	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
790	>	static int caar, cacr, tc, itt0, itt1, dtt0, dtt1, mmusr, urp, srp;
791
792		int m68k_move2c (int regno, uae_u32 *regp)
793		{
794		if ((CPUType == 1 && (regno & 0x7FF) > 1)
795	<	\|\| (CPUType < 4 && (regno & 0x7FF) > 2)
796	<	\|\| (CPUType == 4 && regno == 0x802))
795	>	\|\| (CPUType < 4 && (regno & 0x7FF) > 2)
796	>	\|\| (CPUType == 4 && regno == 0x802))
797		{
798		op_illg (0x4E7B);
799		return 0;
#	Line 802 \| Line 801 \| *int m68k_move2c (int regno, uae_u32 reg**
801		switch (regno) {
802		case 0: regs.sfc = *regp & 7; break;
803		case 1: regs.dfc = *regp & 7; break;
804	<	case 2: cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000); break;
804	>	case 2:
805	>	cacr = *regp & (CPUType < 4 ? 0x3 : 0x80008000);
806	>	#if USE_JIT
807	>	if (CPUType < 4) {
808	>	set_cache_state(cacr&1);
809	>	if (*regp & 0x08)
810	>	flush_icache(1);
811	>	}
812	>	else {
813	>	set_cache_state((cacr&0x8000) \|\| 0);
814	>	// FIXME: The User Manual claims bit 3 of CACR is undefined
815	>	if (*regp & 0x08)
816	>	flush_icache(2);
817	>	}
818	>	#endif
819	>	break;
820		case 3: tc = *regp & 0xc000; break;
821		case 4: itt0 = *regp & 0xffffe364; break;
822		case 5: itt1 = *regp & 0xffffe364; break;
#	Line 813 \| Line 827 \| *int m68k_move2c (int regno, uae_u32 reg**
827		case 0x802: caar = *regp &0xfc; break;
828		case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
829		case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
830	+	case 0x805: mmusr = *regp; break;
831	+	case 0x806: urp = *regp; break;
832	+	case 0x807: srp = *regp; break;
833		default:
834		op_illg (0x4E7B);
835		return 0;
#	Line 824 \| Line 841 \| *int m68k_move2c (int regno, uae_u32 reg**
841		int m68k_movec2 (int regno, uae_u32 *regp)
842		{
843		if ((CPUType == 1 && (regno & 0x7FF) > 1)
844	<	\|\| (CPUType < 4 && (regno & 0x7FF) > 2)
845	<	\|\| (CPUType == 4 && regno == 0x802))
844	>	\|\| (CPUType < 4 && (regno & 0x7FF) > 2)
845	>	\|\| (CPUType == 4 && regno == 0x802))
846		{
847		op_illg (0x4E7A);
848		return 0;
#	Line 844 \| Line 861 \| *int m68k_movec2 (int regno, uae_u32 reg**
861		case 0x802: *regp = caar; break;
862		case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
863		case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
864	+	case 0x805: *regp = mmusr; break;
865	+	case 0x806: *regp = urp; break;
866	+	case 0x807: *regp = srp; break;
867		default:
868		op_illg (0x4E7A);
869		return 0;
#	Line 1107 \| Line 1127 \| *static char ccnames[] =**
1127		{ "T ","F ","HI","LS","CC","CS","NE","EQ",
1128		"VC","VS","PL","MI","GE","LT","GT","LE" };
1129
1130	+	// If value is greater than zero, this means we are still processing an EmulOp
1131	+	// because the counter is incremented only in m68k_execute(), i.e. interpretive
1132	+	// execution only
1133	+	static int m68k_execute_depth = 0;
1134	+
1135		void m68k_reset (void)
1136		{
1137		m68k_areg (regs, 7) = 0x2000;
1138		m68k_setpc (ROMBaseMac + 0x2a);
1139		fill_prefetch_0 ();
1115	–	regs.kick_mask = 0xF80000;
1140		regs.s = 1;
1141		regs.m = 0;
1142		regs.stopped = 0;
#	Line 1123 \| Line 1147 \| void m68k_reset (void)
1147		SET_CFLG (0);
1148		SET_VFLG (0);
1149		SET_NFLG (0);
1150	<	regs.spcflags = 0;
1150	>	SPCFLAGS_INIT( 0 );
1151		regs.intmask = 7;
1152		regs.vbr = regs.sfc = regs.dfc = 0;
1129	–	/* gb-- moved into {fpp,fpu_x86}.cpp::fpu_init()
1130	–	regs.fpcr = regs.fpsr = regs.fpiar = 0; */
1153		fpu_reset();
1154
1155		#if FLIGHT_RECORDER
#	Line 1142 \| Line 1164 \| void m68k_reset (void)
1164		#endif
1165		}
1166
1167	<	void REGPARAM2 op_illg (uae_u32 opcode)
1167	>	void m68k_emulop_return(void)
1168		{
1169	<	uaecptr pc = m68k_getpc ();
1169	>	SPCFLAGS_SET( SPCFLAG_BRK );
1170	>	quit_program = 1;
1171	>	}
1172
1173	<	if ((opcode & 0xFF00) == 0x7100) {
1173	>	void m68k_emulop(uae_u32 opcode)
1174	>	{
1175		struct M68kRegisters r;
1176		int i;
1177
1153	–	// Return from Exectue68k()?
1154	–	if (opcode == M68K_EXEC_RETURN) {
1155	–	regs.spcflags \|= SPCFLAG_BRK;
1156	–	quit_program = 1;
1157	–	return;
1158	–	}
1159	–
1160	–	// Call EMUL_OP opcode
1178		for (i=0; i<8; i++) {
1179		r.d[i] = m68k_dreg(regs, i);
1180		r.a[i] = m68k_areg(regs, i);
#	Line 1171 \| Line 1188 \| void REGPARAM2 op_illg (uae_u32 opcode)
1188		}
1189		regs.sr = r.sr;
1190		MakeFromSR();
1191	<	m68k_incpc(2);
1192	<	fill_prefetch_0 ();
1193	<	return;
1194	<	}
1191	>	}
1192	>
1193	>	cpuop_rettype REGPARAM2 op_illg (uae_u32 opcode)
1194	>	{
1195	>	uaecptr pc = m68k_getpc ();
1196
1197		if ((opcode & 0xF000) == 0xA000) {
1198		Exception(0xA,0);
1199	<	return;
1199	>	cpuop_return(CFLOW_TRAP);
1200		}
1201
1184	–	// write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1185	–
1202		if ((opcode & 0xF000) == 0xF000) {
1203		Exception(0xB,0);
1204	<	return;
1204	>	cpuop_return(CFLOW_TRAP);
1205		}
1206
1207		write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1208	+	#if USE_JIT && JIT_DEBUG
1209	+	compiler_dumpstate();
1210	+	#endif
1211
1212		Exception (4,0);
1213	+	cpuop_return(CFLOW_TRAP);
1214		}
1215
1216		void mmu_op(uae_u32 opcode, uae_u16 extra)
1217		{
1218	<	if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1219	<
1220	<	} else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1221	<	} else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1218	>	if ((opcode & 0xFE0) == 0x0500) {
1219	>	/* PFLUSH */
1220	>	mmusr = 0;
1221	>	} else if ((opcode & 0x0FD8) == 0x548) {
1222	>	/* PTEST */
1223		} else
1224	<	op_illg (opcode);
1224	>	op_illg (opcode);
1225		}
1226
1227		static int n_insns = 0, n_spcinsns = 0;
#	Line 1216 \| Line 1237 \| static void do_trace (void)
1237		/* We can afford this to be inefficient... */
1238		m68k_setpc (m68k_getpc ());
1239		fill_prefetch_0 ();
1240	<	opcode = get_word (regs.pc);
1240	>	opcode = get_word(m68k_getpc());
1241		if (opcode == 0x4e72 /* RTE */
1242		\|\| opcode == 0x4e74 /* RTD */
1243		\|\| opcode == 0x4e75 /* RTS */
#	Line 1232 \| Line 1253 \| static void do_trace (void)
1253		&& (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1254		{
1255		last_trace_ad = m68k_getpc ();
1256	<	regs.spcflags &= ~SPCFLAG_TRACE;
1257	<	regs.spcflags \|= SPCFLAG_DOTRACE;
1256	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1257	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1258		}
1259		} else if (regs.t1) {
1260		last_trace_ad = m68k_getpc ();
1261	<	regs.spcflags &= ~SPCFLAG_TRACE;
1262	<	regs.spcflags \|= SPCFLAG_DOTRACE;
1261	>	SPCFLAGS_CLEAR( SPCFLAG_TRACE );
1262	>	SPCFLAGS_SET( SPCFLAG_DOTRACE );
1263		}
1264		}
1265
1266	<
1246	<	static int do_specialties (void)
1266	>	int m68k_do_specialties (void)
1267		{
1268	<	/n_spcinsns++;/
1269	<	if (regs.spcflags & SPCFLAG_DOTRACE) {
1268	>	#if USE_JIT
1269	>	// Block was compiled
1270	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_END_COMPILE );
1271	>
1272	>	// Retain the request to get out of compiled code until
1273	>	// we reached the toplevel execution, i.e. the one that
1274	>	// can compile then run compiled code. This also means
1275	>	// we processed all (nested) EmulOps
1276	>	if ((m68k_execute_depth == 0) && SPCFLAGS_TEST( SPCFLAG_JIT_EXEC_RETURN ))
1277	>	SPCFLAGS_CLEAR( SPCFLAG_JIT_EXEC_RETURN );
1278	>	#endif
1279	>
1280	>	if (SPCFLAGS_TEST( SPCFLAG_DOTRACE )) {
1281		Exception (9,last_trace_ad);
1282		}
1283	<	while (regs.spcflags & SPCFLAG_STOP) {
1284	<	if (regs.spcflags & (SPCFLAG_INT \| SPCFLAG_DOINT)){
1283	>	while (SPCFLAGS_TEST( SPCFLAG_STOP )) {
1284	>	if (SPCFLAGS_TEST( SPCFLAG_INT \| SPCFLAG_DOINT )){
1285	>	SPCFLAGS_CLEAR( SPCFLAG_INT \| SPCFLAG_DOINT );
1286		int intr = intlev ();
1255	–	regs.spcflags &= ~(SPCFLAG_INT \| SPCFLAG_DOINT);
1287		if (intr != -1 && intr > regs.intmask) {
1288		Interrupt (intr);
1289		regs.stopped = 0;
1290	<	regs.spcflags &= ~SPCFLAG_STOP;
1290	>	SPCFLAGS_CLEAR( SPCFLAG_STOP );
1291		}
1292		}
1293		}
1294	<	if (regs.spcflags & SPCFLAG_TRACE)
1294	>	if (SPCFLAGS_TEST( SPCFLAG_TRACE ))
1295		do_trace ();
1296
1297	<	if (regs.spcflags & SPCFLAG_DOINT) {
1297	>	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
1298	>	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
1299		int intr = intlev ();
1268	–	regs.spcflags &= ~SPCFLAG_DOINT;
1300		if (intr != -1 && intr > regs.intmask) {
1301		Interrupt (intr);
1302		regs.stopped = 0;
1303		}
1304		}
1305	<	if (regs.spcflags & SPCFLAG_INT) {
1306	<	regs.spcflags &= ~SPCFLAG_INT;
1307	<	regs.spcflags \|= SPCFLAG_DOINT;
1308	<	}
1309	<	if (regs.spcflags & (SPCFLAG_BRK \| SPCFLAG_MODE_CHANGE)) {
1310	<	regs.spcflags &= ~(SPCFLAG_BRK \| SPCFLAG_MODE_CHANGE);
1311	<	return 1;
1305	>	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
1306	>	SPCFLAGS_CLEAR( SPCFLAG_INT );
1307	>	SPCFLAGS_SET( SPCFLAG_DOINT );
1308	>	}
1309	>	if (SPCFLAGS_TEST( SPCFLAG_BRK )) {
1310	>	SPCFLAGS_CLEAR( SPCFLAG_BRK );
1311	>	return CFLOW_EXEC_RETURN;
1312		}
1313		return 0;
1314		}
1315
1316	<	static void m68k_run_1 (void)
1316	>	void m68k_do_execute (void)
1317		{
1318		for (;;) {
1319		uae_u32 opcode = GET_OPCODE;
1320		#if FLIGHT_RECORDER
1321	<	record_step(m68k_getpc());
1321	>	m68k_record_step(m68k_getpc());
1322		#endif
1323	+	#ifdef X86_ASSEMBLY
1324	+	__asm__ __volatile__("\tpushl %%ebp\n\tcall %%ebx\n\tpopl %%ebp" / FIXME */
1325	+	: : "b" (cpufunctbl[opcode]), "a" (opcode)
1326	+	: "%edx", "%ecx", "%esi", "%edi", "%ebp", "memory", "cc");
1327	+	#else
1328		(*cpufunctbl[opcode])(opcode);
1329	<	if (regs.spcflags) {
1330	<	if (do_specialties())
1329	>	#endif
1330	>	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
1331	>	if (m68k_do_specialties())
1332		return;
1333		}
1334		}
1335		}
1336
1337	<	#define m68k_run1 m68k_run_1
1338	<
1302	<	int in_m68k_go = 0;
1303	<
1304	<	void m68k_go (int may_quit)
1337	>	#if USE_JIT
1338	>	void m68k_compile_execute (void)
1339		{
1340	<	// m68k_go() must be reentrant for Execute68k() and Execute68kTrap() to work
1341	<	/*
1342	<	if (in_m68k_go \|\| !may_quit) {
1343	<	write_log("Bug! m68k_go is not reentrant.\n");
1344	<	abort();
1340	>	for (;;) {
1341	>	if (quit_program > 0) {
1342	>	if (quit_program == 1)
1343	>	break;
1344	>	quit_program = 0;
1345	>	m68k_reset ();
1346	>	}
1347	>	m68k_do_compile_execute();
1348		}
1349	<	*/
1350	<	in_m68k_go++;
1349	>	if (debugging) {
1350	>	uaecptr nextpc;
1351	>	m68k_dumpstate(&nextpc);
1352	>	exit(1);
1353	>	}
1354	>	}
1355	>	#endif
1356	>
1357	>	void m68k_execute (void)
1358	>	{
1359	>	#if USE_JIT
1360	>	++m68k_execute_depth;
1361	>	#endif
1362	>
1363		for (;;) {
1364		if (quit_program > 0) {
1365		if (quit_program == 1)
#	Line 1318 \| Line 1367 \| void m68k_go (int may_quit)
1367		quit_program = 0;
1368		m68k_reset ();
1369		}
1370	<	m68k_run1();
1370	>	m68k_do_execute();
1371		}
1372		if (debugging) {
1373		uaecptr nextpc;
1374		m68k_dumpstate(&nextpc);
1375		exit(1);
1376		}
1377	<	in_m68k_go--;
1377	>
1378	>	#if USE_JIT
1379	>	--m68k_execute_depth;
1380	>	#endif
1381		}
1382
1383		static void m68k_verify (uaecptr addr, uaecptr *nextpc)
#	Line 1434 \| Line 1486 \| *void m68k_dumpstate (uaecptr nextpc)**
1486		printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1487		regs.t1, regs.t0, regs.s, regs.m,
1488		GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1489	<	for (i = 0; i < 8; i++){
1490	<	printf ("FP%d: %g ", i, regs.fp[i]);
1491	<	if ((i & 3) == 3) printf ("\n");
1492	<	}
1441	<	printf ("N=%d Z=%d I=%d NAN=%d\n",
1442	<	(regs.fpsr & 0x8000000) != 0,
1443	<	(regs.fpsr & 0x4000000) != 0,
1444	<	(regs.fpsr & 0x2000000) != 0,
1445	<	(regs.fpsr & 0x1000000) != 0);
1446	<
1489	>
1490	>	fpu_dump_registers();
1491	>	fpu_dump_flags();
1492	>
1493		m68k_disasm(m68k_getpc (), nextpc, 1);
1494		if (nextpc)
1495		printf ("next PC: %08lx\n", *nextpc);

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Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents): Revision 1.11 by gbeauche, 2002-03-18T21:25:07Z vs. Revision 1.16 by gbeauche, 2002-09-17T16:05:39Z

Diff Legend

Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.11 by gbeauche, 2002-03-18T21:25:07Z vs.
Revision 1.16 by gbeauche, 2002-09-17T16:05:39Z