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root/cebix/BasiliskII/src/uae_cpu/newcpu.cpp
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Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.2 by cebix, 1999-10-28T15:33:23Z

# Line 123 | Line 123 | static void build_cpufunctbl (void)
123   {
124      int i;
125      unsigned long opcode;
126 <        int cpu_level = (FPUType ? 3 : CPUType >= 2 ? 2 : CPUType == 1 ? 1 : 0);
127 <    struct cputbl *tbl = (cpu_level == 3 ? op_smalltbl_0
128 <                          : cpu_level == 2 ? op_smalltbl_1
129 <                          : cpu_level == 1 ? op_smalltbl_2
130 <                          : op_smalltbl_3);
126 >        int cpu_level = 0;              // 68000 (default)
127 >        if (CPUType == 4)
128 >                cpu_level = 4;          // 68040 with FPU
129 >        else {
130 >                if (FPUType)
131 >                        cpu_level = 3;  // 68020 with FPU
132 >                else if (CPUType >= 2)
133 >                        cpu_level = 2;  // 68020
134 >                else if (CPUType == 1)
135 >                        cpu_level = 1;
136 >        }
137 >    struct cputbl *tbl = (
138 >                  cpu_level == 4 ? op_smalltbl_0
139 >                : cpu_level == 3 ? op_smalltbl_1
140 >                : cpu_level == 2 ? op_smalltbl_2
141 >                : cpu_level == 1 ? op_smalltbl_3
142 >                : op_smalltbl_4);
143  
144      for (opcode = 0; opcode < 65536; opcode++)
145          cpufunctbl[cft_map (opcode)] = op_illg_1;
# Line 710 | Line 722 | static void Interrupt(int nr)
722      regs.spcflags |= SPCFLAG_INT;
723   }
724  
725 < static int caar, cacr;
725 > static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
726  
727   void m68k_move2c (int regno, uae_u32 *regp)
728   {
# Line 721 | Line 733 | void m68k_move2c (int regno, uae_u32 *re
733           case 0: regs.sfc = *regp & 7; break;
734           case 1: regs.dfc = *regp & 7; break;
735           case 2: cacr = *regp & 0x3; break;     /* ignore C and CE */
736 +         case 3: tc = *regp & 0xc000; break;
737 +         case 4: itt0 = *regp & 0xffffe364; break;
738 +         case 5: itt1 = *regp & 0xffffe364; break;
739 +         case 6: dtt0 = *regp & 0xffffe364; break;
740 +         case 7: dtt1 = *regp & 0xffffe364; break;
741           case 0x800: regs.usp = *regp; break;
742           case 0x801: regs.vbr = *regp; break;
743           case 0x802: caar = *regp &0xfc; break;
# Line 741 | Line 758 | void m68k_movec2 (int regno, uae_u32 *re
758           case 0: *regp = regs.sfc; break;
759           case 1: *regp = regs.dfc; break;
760           case 2: *regp = cacr; break;
761 +         case 3: *regp = tc; break;
762 +         case 4: *regp = itt0; break;
763 +         case 5: *regp = itt1; break;
764 +         case 6: *regp = dtt0; break;
765 +         case 7: *regp = dtt1; break;
766           case 0x800: *regp = regs.usp; break;
767           case 0x801: *regp = regs.vbr; break;
768           case 0x802: *regp = caar; break;
# Line 1070 | Line 1092 | unsigned long REGPARAM2 op_illg (uae_u32
1092          return 4;
1093      }
1094  
1095 + printf("Illegal instruction %04x at %08lx\n", opcode, pc);      //!!
1096      if ((opcode & 0xF000) == 0xF000) {
1097          Exception(0xB,0);
1098          return 4;

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