| 1 |
cebix |
1.1 |
/* |
| 2 |
|
|
* UAE - The Un*x Amiga Emulator |
| 3 |
|
|
* |
| 4 |
|
|
* Memory management |
| 5 |
|
|
* |
| 6 |
|
|
* (c) 1995 Bernd Schmidt |
| 7 |
|
|
*/ |
| 8 |
|
|
|
| 9 |
|
|
#include <stdio.h> |
| 10 |
|
|
#include <stdlib.h> |
| 11 |
|
|
|
| 12 |
|
|
#include "sysdeps.h" |
| 13 |
|
|
|
| 14 |
|
|
#include "cpu_emulation.h" |
| 15 |
|
|
#include "m68k.h" |
| 16 |
|
|
#include "memory.h" |
| 17 |
|
|
#include "readcpu.h" |
| 18 |
|
|
#include "newcpu.h" |
| 19 |
|
|
#include "main.h" |
| 20 |
|
|
#include "video.h" |
| 21 |
|
|
|
| 22 |
gbeauche |
1.3 |
#if !REAL_ADDRESSING && !DIRECT_ADDRESSING |
| 23 |
|
|
|
| 24 |
cebix |
1.1 |
static bool illegal_mem = false; |
| 25 |
|
|
|
| 26 |
|
|
#ifdef SAVE_MEMORY_BANKS |
| 27 |
|
|
addrbank *mem_banks[65536]; |
| 28 |
|
|
#else |
| 29 |
|
|
addrbank mem_banks[65536]; |
| 30 |
|
|
#endif |
| 31 |
|
|
|
| 32 |
gbeauche |
1.3 |
#ifdef WORDS_BIGENDIAN |
| 33 |
|
|
# define swap_words(X) (X) |
| 34 |
|
|
#else |
| 35 |
|
|
# define swap_words(X) (((X) >> 16) | ((X) << 16)) |
| 36 |
|
|
#endif |
| 37 |
|
|
|
| 38 |
cebix |
1.1 |
#ifdef NO_INLINE_MEMORY_ACCESS |
| 39 |
|
|
__inline__ uae_u32 longget (uaecptr addr) |
| 40 |
|
|
{ |
| 41 |
|
|
return call_mem_get_func (get_mem_bank (addr).lget, addr); |
| 42 |
|
|
} |
| 43 |
|
|
__inline__ uae_u32 wordget (uaecptr addr) |
| 44 |
|
|
{ |
| 45 |
|
|
return call_mem_get_func (get_mem_bank (addr).wget, addr); |
| 46 |
|
|
} |
| 47 |
|
|
__inline__ uae_u32 byteget (uaecptr addr) |
| 48 |
|
|
{ |
| 49 |
|
|
return call_mem_get_func (get_mem_bank (addr).bget, addr); |
| 50 |
|
|
} |
| 51 |
|
|
__inline__ void longput (uaecptr addr, uae_u32 l) |
| 52 |
|
|
{ |
| 53 |
|
|
call_mem_put_func (get_mem_bank (addr).lput, addr, l); |
| 54 |
|
|
} |
| 55 |
|
|
__inline__ void wordput (uaecptr addr, uae_u32 w) |
| 56 |
|
|
{ |
| 57 |
|
|
call_mem_put_func (get_mem_bank (addr).wput, addr, w); |
| 58 |
|
|
} |
| 59 |
|
|
__inline__ void byteput (uaecptr addr, uae_u32 b) |
| 60 |
|
|
{ |
| 61 |
|
|
call_mem_put_func (get_mem_bank (addr).bput, addr, b); |
| 62 |
|
|
} |
| 63 |
|
|
#endif |
| 64 |
|
|
|
| 65 |
|
|
/* A dummy bank that only contains zeros */ |
| 66 |
|
|
|
| 67 |
|
|
static uae_u32 REGPARAM2 dummy_lget (uaecptr) REGPARAM; |
| 68 |
|
|
static uae_u32 REGPARAM2 dummy_wget (uaecptr) REGPARAM; |
| 69 |
|
|
static uae_u32 REGPARAM2 dummy_bget (uaecptr) REGPARAM; |
| 70 |
|
|
static void REGPARAM2 dummy_lput (uaecptr, uae_u32) REGPARAM; |
| 71 |
|
|
static void REGPARAM2 dummy_wput (uaecptr, uae_u32) REGPARAM; |
| 72 |
|
|
static void REGPARAM2 dummy_bput (uaecptr, uae_u32) REGPARAM; |
| 73 |
|
|
static int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) REGPARAM; |
| 74 |
|
|
|
| 75 |
|
|
uae_u32 REGPARAM2 dummy_lget (uaecptr addr) |
| 76 |
|
|
{ |
| 77 |
|
|
if (illegal_mem) |
| 78 |
|
|
write_log ("Illegal lget at %08lx\n", addr); |
| 79 |
|
|
|
| 80 |
|
|
return 0; |
| 81 |
|
|
} |
| 82 |
|
|
|
| 83 |
|
|
uae_u32 REGPARAM2 dummy_wget (uaecptr addr) |
| 84 |
|
|
{ |
| 85 |
|
|
if (illegal_mem) |
| 86 |
|
|
write_log ("Illegal wget at %08lx\n", addr); |
| 87 |
|
|
|
| 88 |
|
|
return 0; |
| 89 |
|
|
} |
| 90 |
|
|
|
| 91 |
|
|
uae_u32 REGPARAM2 dummy_bget (uaecptr addr) |
| 92 |
|
|
{ |
| 93 |
|
|
if (illegal_mem) |
| 94 |
|
|
write_log ("Illegal bget at %08lx\n", addr); |
| 95 |
|
|
|
| 96 |
|
|
return 0; |
| 97 |
|
|
} |
| 98 |
|
|
|
| 99 |
|
|
void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l) |
| 100 |
|
|
{ |
| 101 |
|
|
if (illegal_mem) |
| 102 |
|
|
write_log ("Illegal lput at %08lx\n", addr); |
| 103 |
|
|
} |
| 104 |
|
|
void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w) |
| 105 |
|
|
{ |
| 106 |
|
|
if (illegal_mem) |
| 107 |
|
|
write_log ("Illegal wput at %08lx\n", addr); |
| 108 |
|
|
} |
| 109 |
|
|
void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b) |
| 110 |
|
|
{ |
| 111 |
|
|
if (illegal_mem) |
| 112 |
|
|
write_log ("Illegal bput at %08lx\n", addr); |
| 113 |
|
|
} |
| 114 |
|
|
|
| 115 |
|
|
int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) |
| 116 |
|
|
{ |
| 117 |
|
|
if (illegal_mem) |
| 118 |
|
|
write_log ("Illegal check at %08lx\n", addr); |
| 119 |
|
|
|
| 120 |
|
|
return 0; |
| 121 |
|
|
} |
| 122 |
|
|
|
| 123 |
|
|
/* Mac RAM (32 bit addressing) */ |
| 124 |
|
|
|
| 125 |
|
|
static uae_u32 REGPARAM2 ram_lget(uaecptr) REGPARAM; |
| 126 |
|
|
static uae_u32 REGPARAM2 ram_wget(uaecptr) REGPARAM; |
| 127 |
|
|
static uae_u32 REGPARAM2 ram_bget(uaecptr) REGPARAM; |
| 128 |
|
|
static void REGPARAM2 ram_lput(uaecptr, uae_u32) REGPARAM; |
| 129 |
|
|
static void REGPARAM2 ram_wput(uaecptr, uae_u32) REGPARAM; |
| 130 |
|
|
static void REGPARAM2 ram_bput(uaecptr, uae_u32) REGPARAM; |
| 131 |
|
|
static int REGPARAM2 ram_check(uaecptr addr, uae_u32 size) REGPARAM; |
| 132 |
|
|
static uae_u8 *REGPARAM2 ram_xlate(uaecptr addr) REGPARAM; |
| 133 |
|
|
|
| 134 |
|
|
static uae_u32 RAMBaseDiff; // RAMBaseHost - RAMBaseMac |
| 135 |
|
|
|
| 136 |
|
|
uae_u32 REGPARAM2 ram_lget(uaecptr addr) |
| 137 |
|
|
{ |
| 138 |
|
|
uae_u32 *m; |
| 139 |
|
|
m = (uae_u32 *)(RAMBaseDiff + addr); |
| 140 |
|
|
return do_get_mem_long(m); |
| 141 |
|
|
} |
| 142 |
|
|
|
| 143 |
|
|
uae_u32 REGPARAM2 ram_wget(uaecptr addr) |
| 144 |
|
|
{ |
| 145 |
|
|
uae_u16 *m; |
| 146 |
|
|
m = (uae_u16 *)(RAMBaseDiff + addr); |
| 147 |
|
|
return do_get_mem_word(m); |
| 148 |
|
|
} |
| 149 |
|
|
|
| 150 |
|
|
uae_u32 REGPARAM2 ram_bget(uaecptr addr) |
| 151 |
|
|
{ |
| 152 |
|
|
return (uae_u32)*(uae_u8 *)(RAMBaseDiff + addr); |
| 153 |
|
|
} |
| 154 |
|
|
|
| 155 |
|
|
void REGPARAM2 ram_lput(uaecptr addr, uae_u32 l) |
| 156 |
|
|
{ |
| 157 |
|
|
uae_u32 *m; |
| 158 |
|
|
m = (uae_u32 *)(RAMBaseDiff + addr); |
| 159 |
|
|
do_put_mem_long(m, l); |
| 160 |
|
|
} |
| 161 |
|
|
|
| 162 |
|
|
void REGPARAM2 ram_wput(uaecptr addr, uae_u32 w) |
| 163 |
|
|
{ |
| 164 |
|
|
uae_u16 *m; |
| 165 |
|
|
m = (uae_u16 *)(RAMBaseDiff + addr); |
| 166 |
|
|
do_put_mem_word(m, w); |
| 167 |
|
|
} |
| 168 |
|
|
|
| 169 |
|
|
void REGPARAM2 ram_bput(uaecptr addr, uae_u32 b) |
| 170 |
|
|
{ |
| 171 |
|
|
*(uae_u8 *)(RAMBaseDiff + addr) = b; |
| 172 |
|
|
} |
| 173 |
|
|
|
| 174 |
|
|
int REGPARAM2 ram_check(uaecptr addr, uae_u32 size) |
| 175 |
|
|
{ |
| 176 |
|
|
return (addr - RAMBaseMac + size) < RAMSize; |
| 177 |
|
|
} |
| 178 |
|
|
|
| 179 |
|
|
uae_u8 *REGPARAM2 ram_xlate(uaecptr addr) |
| 180 |
|
|
{ |
| 181 |
|
|
return (uae_u8 *)(RAMBaseDiff + addr); |
| 182 |
|
|
} |
| 183 |
|
|
|
| 184 |
|
|
/* Mac RAM (24 bit addressing) */ |
| 185 |
|
|
|
| 186 |
|
|
static uae_u32 REGPARAM2 ram24_lget(uaecptr) REGPARAM; |
| 187 |
|
|
static uae_u32 REGPARAM2 ram24_wget(uaecptr) REGPARAM; |
| 188 |
|
|
static uae_u32 REGPARAM2 ram24_bget(uaecptr) REGPARAM; |
| 189 |
|
|
static void REGPARAM2 ram24_lput(uaecptr, uae_u32) REGPARAM; |
| 190 |
|
|
static void REGPARAM2 ram24_wput(uaecptr, uae_u32) REGPARAM; |
| 191 |
|
|
static void REGPARAM2 ram24_bput(uaecptr, uae_u32) REGPARAM; |
| 192 |
|
|
static int REGPARAM2 ram24_check(uaecptr addr, uae_u32 size) REGPARAM; |
| 193 |
|
|
static uae_u8 *REGPARAM2 ram24_xlate(uaecptr addr) REGPARAM; |
| 194 |
|
|
|
| 195 |
|
|
uae_u32 REGPARAM2 ram24_lget(uaecptr addr) |
| 196 |
|
|
{ |
| 197 |
|
|
uae_u32 *m; |
| 198 |
|
|
m = (uae_u32 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 199 |
|
|
return do_get_mem_long(m); |
| 200 |
|
|
} |
| 201 |
|
|
|
| 202 |
|
|
uae_u32 REGPARAM2 ram24_wget(uaecptr addr) |
| 203 |
|
|
{ |
| 204 |
|
|
uae_u16 *m; |
| 205 |
|
|
m = (uae_u16 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 206 |
|
|
return do_get_mem_word(m); |
| 207 |
|
|
} |
| 208 |
|
|
|
| 209 |
|
|
uae_u32 REGPARAM2 ram24_bget(uaecptr addr) |
| 210 |
|
|
{ |
| 211 |
|
|
return (uae_u32)*(uae_u8 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 212 |
|
|
} |
| 213 |
|
|
|
| 214 |
|
|
void REGPARAM2 ram24_lput(uaecptr addr, uae_u32 l) |
| 215 |
|
|
{ |
| 216 |
|
|
uae_u32 *m; |
| 217 |
|
|
m = (uae_u32 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 218 |
|
|
do_put_mem_long(m, l); |
| 219 |
|
|
} |
| 220 |
|
|
|
| 221 |
|
|
void REGPARAM2 ram24_wput(uaecptr addr, uae_u32 w) |
| 222 |
|
|
{ |
| 223 |
|
|
uae_u16 *m; |
| 224 |
|
|
m = (uae_u16 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 225 |
|
|
do_put_mem_word(m, w); |
| 226 |
|
|
} |
| 227 |
|
|
|
| 228 |
|
|
void REGPARAM2 ram24_bput(uaecptr addr, uae_u32 b) |
| 229 |
|
|
{ |
| 230 |
|
|
*(uae_u8 *)(RAMBaseDiff + (addr & 0xffffff)) = b; |
| 231 |
|
|
} |
| 232 |
|
|
|
| 233 |
|
|
int REGPARAM2 ram24_check(uaecptr addr, uae_u32 size) |
| 234 |
|
|
{ |
| 235 |
|
|
return ((addr & 0xffffff) - RAMBaseMac + size) < RAMSize; |
| 236 |
|
|
} |
| 237 |
|
|
|
| 238 |
|
|
uae_u8 *REGPARAM2 ram24_xlate(uaecptr addr) |
| 239 |
|
|
{ |
| 240 |
|
|
return (uae_u8 *)(RAMBaseDiff + (addr & 0xffffff)); |
| 241 |
|
|
} |
| 242 |
|
|
|
| 243 |
|
|
/* Mac ROM (32 bit addressing) */ |
| 244 |
|
|
|
| 245 |
|
|
static uae_u32 REGPARAM2 rom_lget(uaecptr) REGPARAM; |
| 246 |
|
|
static uae_u32 REGPARAM2 rom_wget(uaecptr) REGPARAM; |
| 247 |
|
|
static uae_u32 REGPARAM2 rom_bget(uaecptr) REGPARAM; |
| 248 |
|
|
static void REGPARAM2 rom_lput(uaecptr, uae_u32) REGPARAM; |
| 249 |
|
|
static void REGPARAM2 rom_wput(uaecptr, uae_u32) REGPARAM; |
| 250 |
|
|
static void REGPARAM2 rom_bput(uaecptr, uae_u32) REGPARAM; |
| 251 |
|
|
static int REGPARAM2 rom_check(uaecptr addr, uae_u32 size) REGPARAM; |
| 252 |
|
|
static uae_u8 *REGPARAM2 rom_xlate(uaecptr addr) REGPARAM; |
| 253 |
|
|
|
| 254 |
|
|
static uae_u32 ROMBaseDiff; // ROMBaseHost - ROMBaseMac |
| 255 |
|
|
|
| 256 |
|
|
uae_u32 REGPARAM2 rom_lget(uaecptr addr) |
| 257 |
|
|
{ |
| 258 |
|
|
uae_u32 *m; |
| 259 |
|
|
m = (uae_u32 *)(ROMBaseDiff + addr); |
| 260 |
|
|
return do_get_mem_long(m); |
| 261 |
|
|
} |
| 262 |
|
|
|
| 263 |
|
|
uae_u32 REGPARAM2 rom_wget(uaecptr addr) |
| 264 |
|
|
{ |
| 265 |
|
|
uae_u16 *m; |
| 266 |
|
|
m = (uae_u16 *)(ROMBaseDiff + addr); |
| 267 |
|
|
return do_get_mem_word(m); |
| 268 |
|
|
} |
| 269 |
|
|
|
| 270 |
|
|
uae_u32 REGPARAM2 rom_bget(uaecptr addr) |
| 271 |
|
|
{ |
| 272 |
|
|
return (uae_u32)*(uae_u8 *)(ROMBaseDiff + addr); |
| 273 |
|
|
} |
| 274 |
|
|
|
| 275 |
|
|
void REGPARAM2 rom_lput(uaecptr addr, uae_u32 b) |
| 276 |
|
|
{ |
| 277 |
|
|
if (illegal_mem) |
| 278 |
|
|
write_log ("Illegal ROM lput at %08lx\n", addr); |
| 279 |
|
|
} |
| 280 |
|
|
|
| 281 |
|
|
void REGPARAM2 rom_wput(uaecptr addr, uae_u32 b) |
| 282 |
|
|
{ |
| 283 |
|
|
if (illegal_mem) |
| 284 |
|
|
write_log ("Illegal ROM wput at %08lx\n", addr); |
| 285 |
|
|
} |
| 286 |
|
|
|
| 287 |
|
|
void REGPARAM2 rom_bput(uaecptr addr, uae_u32 b) |
| 288 |
|
|
{ |
| 289 |
|
|
if (illegal_mem) |
| 290 |
|
|
write_log ("Illegal ROM bput at %08lx\n", addr); |
| 291 |
|
|
} |
| 292 |
|
|
|
| 293 |
|
|
int REGPARAM2 rom_check(uaecptr addr, uae_u32 size) |
| 294 |
|
|
{ |
| 295 |
|
|
return (addr - ROMBaseMac + size) < ROMSize; |
| 296 |
|
|
} |
| 297 |
|
|
|
| 298 |
|
|
uae_u8 *REGPARAM2 rom_xlate(uaecptr addr) |
| 299 |
|
|
{ |
| 300 |
|
|
return (uae_u8 *)(ROMBaseDiff + addr); |
| 301 |
|
|
} |
| 302 |
|
|
|
| 303 |
|
|
/* Mac ROM (24 bit addressing) */ |
| 304 |
|
|
|
| 305 |
|
|
static uae_u32 REGPARAM2 rom24_lget(uaecptr) REGPARAM; |
| 306 |
|
|
static uae_u32 REGPARAM2 rom24_wget(uaecptr) REGPARAM; |
| 307 |
|
|
static uae_u32 REGPARAM2 rom24_bget(uaecptr) REGPARAM; |
| 308 |
|
|
static int REGPARAM2 rom24_check(uaecptr addr, uae_u32 size) REGPARAM; |
| 309 |
|
|
static uae_u8 *REGPARAM2 rom24_xlate(uaecptr addr) REGPARAM; |
| 310 |
|
|
|
| 311 |
|
|
uae_u32 REGPARAM2 rom24_lget(uaecptr addr) |
| 312 |
|
|
{ |
| 313 |
|
|
uae_u32 *m; |
| 314 |
|
|
m = (uae_u32 *)(ROMBaseDiff + (addr & 0xffffff)); |
| 315 |
|
|
return do_get_mem_long(m); |
| 316 |
|
|
} |
| 317 |
|
|
|
| 318 |
|
|
uae_u32 REGPARAM2 rom24_wget(uaecptr addr) |
| 319 |
|
|
{ |
| 320 |
|
|
uae_u16 *m; |
| 321 |
|
|
m = (uae_u16 *)(ROMBaseDiff + (addr & 0xffffff)); |
| 322 |
|
|
return do_get_mem_word(m); |
| 323 |
|
|
} |
| 324 |
|
|
|
| 325 |
|
|
uae_u32 REGPARAM2 rom24_bget(uaecptr addr) |
| 326 |
|
|
{ |
| 327 |
|
|
return (uae_u32)*(uae_u8 *)(ROMBaseDiff + (addr & 0xffffff)); |
| 328 |
|
|
} |
| 329 |
|
|
|
| 330 |
|
|
int REGPARAM2 rom24_check(uaecptr addr, uae_u32 size) |
| 331 |
|
|
{ |
| 332 |
|
|
return ((addr & 0xffffff) - ROMBaseMac + size) < ROMSize; |
| 333 |
|
|
} |
| 334 |
|
|
|
| 335 |
|
|
uae_u8 *REGPARAM2 rom24_xlate(uaecptr addr) |
| 336 |
|
|
{ |
| 337 |
|
|
return (uae_u8 *)(ROMBaseDiff + (addr & 0xffffff)); |
| 338 |
|
|
} |
| 339 |
|
|
|
| 340 |
|
|
/* Frame buffer */ |
| 341 |
|
|
|
| 342 |
|
|
static uae_u32 REGPARAM2 frame_direct_lget(uaecptr) REGPARAM; |
| 343 |
|
|
static uae_u32 REGPARAM2 frame_direct_wget(uaecptr) REGPARAM; |
| 344 |
|
|
static uae_u32 REGPARAM2 frame_direct_bget(uaecptr) REGPARAM; |
| 345 |
|
|
static void REGPARAM2 frame_direct_lput(uaecptr, uae_u32) REGPARAM; |
| 346 |
|
|
static void REGPARAM2 frame_direct_wput(uaecptr, uae_u32) REGPARAM; |
| 347 |
|
|
static void REGPARAM2 frame_direct_bput(uaecptr, uae_u32) REGPARAM; |
| 348 |
|
|
|
| 349 |
|
|
static uae_u32 REGPARAM2 frame_host_555_lget(uaecptr) REGPARAM; |
| 350 |
|
|
static uae_u32 REGPARAM2 frame_host_555_wget(uaecptr) REGPARAM; |
| 351 |
|
|
static void REGPARAM2 frame_host_555_lput(uaecptr, uae_u32) REGPARAM; |
| 352 |
|
|
static void REGPARAM2 frame_host_555_wput(uaecptr, uae_u32) REGPARAM; |
| 353 |
|
|
|
| 354 |
|
|
static uae_u32 REGPARAM2 frame_host_565_lget(uaecptr) REGPARAM; |
| 355 |
|
|
static uae_u32 REGPARAM2 frame_host_565_wget(uaecptr) REGPARAM; |
| 356 |
|
|
static void REGPARAM2 frame_host_565_lput(uaecptr, uae_u32) REGPARAM; |
| 357 |
|
|
static void REGPARAM2 frame_host_565_wput(uaecptr, uae_u32) REGPARAM; |
| 358 |
|
|
|
| 359 |
|
|
static uae_u32 REGPARAM2 frame_host_888_lget(uaecptr) REGPARAM; |
| 360 |
|
|
static void REGPARAM2 frame_host_888_lput(uaecptr, uae_u32) REGPARAM; |
| 361 |
|
|
|
| 362 |
|
|
static int REGPARAM2 frame_check(uaecptr addr, uae_u32 size) REGPARAM; |
| 363 |
|
|
static uae_u8 *REGPARAM2 frame_xlate(uaecptr addr) REGPARAM; |
| 364 |
|
|
|
| 365 |
|
|
static uae_u32 FrameBaseDiff; // MacFrameBaseHost - MacFrameBaseMac |
| 366 |
|
|
|
| 367 |
|
|
uae_u32 REGPARAM2 frame_direct_lget(uaecptr addr) |
| 368 |
|
|
{ |
| 369 |
|
|
uae_u32 *m; |
| 370 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 371 |
|
|
return do_get_mem_long(m); |
| 372 |
|
|
} |
| 373 |
|
|
|
| 374 |
|
|
uae_u32 REGPARAM2 frame_direct_wget(uaecptr addr) |
| 375 |
|
|
{ |
| 376 |
|
|
uae_u16 *m; |
| 377 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 378 |
|
|
return do_get_mem_word(m); |
| 379 |
|
|
} |
| 380 |
|
|
|
| 381 |
|
|
uae_u32 REGPARAM2 frame_direct_bget(uaecptr addr) |
| 382 |
|
|
{ |
| 383 |
|
|
return (uae_u32)*(uae_u8 *)(FrameBaseDiff + addr); |
| 384 |
|
|
} |
| 385 |
|
|
|
| 386 |
|
|
void REGPARAM2 frame_direct_lput(uaecptr addr, uae_u32 l) |
| 387 |
|
|
{ |
| 388 |
|
|
uae_u32 *m; |
| 389 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 390 |
|
|
do_put_mem_long(m, l); |
| 391 |
|
|
} |
| 392 |
|
|
|
| 393 |
|
|
void REGPARAM2 frame_direct_wput(uaecptr addr, uae_u32 w) |
| 394 |
|
|
{ |
| 395 |
|
|
uae_u16 *m; |
| 396 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 397 |
|
|
do_put_mem_word(m, w); |
| 398 |
|
|
} |
| 399 |
|
|
|
| 400 |
|
|
void REGPARAM2 frame_direct_bput(uaecptr addr, uae_u32 b) |
| 401 |
|
|
{ |
| 402 |
|
|
*(uae_u8 *)(FrameBaseDiff + addr) = b; |
| 403 |
|
|
} |
| 404 |
|
|
|
| 405 |
|
|
uae_u32 REGPARAM2 frame_host_555_lget(uaecptr addr) |
| 406 |
|
|
{ |
| 407 |
|
|
uae_u32 *m, l; |
| 408 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 409 |
|
|
l = *m; |
| 410 |
gbeauche |
1.3 |
return swap_words(l); |
| 411 |
cebix |
1.1 |
} |
| 412 |
|
|
|
| 413 |
|
|
uae_u32 REGPARAM2 frame_host_555_wget(uaecptr addr) |
| 414 |
|
|
{ |
| 415 |
|
|
uae_u16 *m; |
| 416 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 417 |
|
|
return *m; |
| 418 |
|
|
} |
| 419 |
|
|
|
| 420 |
|
|
void REGPARAM2 frame_host_555_lput(uaecptr addr, uae_u32 l) |
| 421 |
|
|
{ |
| 422 |
|
|
uae_u32 *m; |
| 423 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 424 |
gbeauche |
1.3 |
*m = swap_words(l); |
| 425 |
cebix |
1.1 |
} |
| 426 |
|
|
|
| 427 |
|
|
void REGPARAM2 frame_host_555_wput(uaecptr addr, uae_u32 w) |
| 428 |
|
|
{ |
| 429 |
|
|
uae_u16 *m; |
| 430 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 431 |
|
|
*m = w; |
| 432 |
|
|
} |
| 433 |
|
|
|
| 434 |
|
|
uae_u32 REGPARAM2 frame_host_565_lget(uaecptr addr) |
| 435 |
|
|
{ |
| 436 |
|
|
uae_u32 *m, l; |
| 437 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 438 |
|
|
l = *m; |
| 439 |
|
|
l = (l & 0x001f001f) | ((l >> 1) & 0x7fe07fe0); |
| 440 |
gbeauche |
1.3 |
return swap_words(l); |
| 441 |
cebix |
1.1 |
} |
| 442 |
|
|
|
| 443 |
|
|
uae_u32 REGPARAM2 frame_host_565_wget(uaecptr addr) |
| 444 |
|
|
{ |
| 445 |
|
|
uae_u16 *m, w; |
| 446 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 447 |
|
|
w = *m; |
| 448 |
|
|
return (w & 0x1f) | ((w >> 1) & 0x7fe0); |
| 449 |
|
|
} |
| 450 |
|
|
|
| 451 |
|
|
void REGPARAM2 frame_host_565_lput(uaecptr addr, uae_u32 l) |
| 452 |
|
|
{ |
| 453 |
|
|
uae_u32 *m; |
| 454 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 455 |
|
|
l = (l & 0x001f001f) | ((l << 1) & 0xffc0ffc0); |
| 456 |
gbeauche |
1.3 |
*m = swap_words(l); |
| 457 |
cebix |
1.1 |
} |
| 458 |
|
|
|
| 459 |
|
|
void REGPARAM2 frame_host_565_wput(uaecptr addr, uae_u32 w) |
| 460 |
|
|
{ |
| 461 |
|
|
uae_u16 *m; |
| 462 |
|
|
m = (uae_u16 *)(FrameBaseDiff + addr); |
| 463 |
|
|
*m = (w & 0x1f) | ((w << 1) & 0xffc0); |
| 464 |
|
|
} |
| 465 |
|
|
|
| 466 |
|
|
uae_u32 REGPARAM2 frame_host_888_lget(uaecptr addr) |
| 467 |
|
|
{ |
| 468 |
|
|
uae_u32 *m, l; |
| 469 |
|
|
m = (uae_u32 *)(FrameBaseDiff + addr); |
| 470 |
|
|
return *m; |
| 471 |
|
|
} |
| 472 |
|
|
|
| 473 |
|
|
void REGPARAM2 frame_host_888_lput(uaecptr addr, uae_u32 l) |
| 474 |
|
|
{ |
| 475 |
|
|
uae_u32 *m; |
| 476 |
|
|
m = (uae_u32 *)(MacFrameBaseHost + addr - MacFrameBaseMac); |
| 477 |
|
|
*m = l; |
| 478 |
|
|
} |
| 479 |
|
|
|
| 480 |
|
|
int REGPARAM2 frame_check(uaecptr addr, uae_u32 size) |
| 481 |
|
|
{ |
| 482 |
|
|
return (addr - MacFrameBaseMac + size) < MacFrameSize; |
| 483 |
|
|
} |
| 484 |
|
|
|
| 485 |
|
|
uae_u8 *REGPARAM2 frame_xlate(uaecptr addr) |
| 486 |
|
|
{ |
| 487 |
|
|
return (uae_u8 *)(FrameBaseDiff + addr); |
| 488 |
|
|
} |
| 489 |
|
|
|
| 490 |
|
|
/* Default memory access functions */ |
| 491 |
|
|
|
| 492 |
|
|
int REGPARAM2 default_check (uaecptr a, uae_u32 b) |
| 493 |
|
|
{ |
| 494 |
|
|
return 0; |
| 495 |
|
|
} |
| 496 |
|
|
|
| 497 |
|
|
uae_u8 *REGPARAM2 default_xlate (uaecptr a) |
| 498 |
|
|
{ |
| 499 |
|
|
write_log("Your Mac program just did something terribly stupid\n"); |
| 500 |
|
|
return NULL; |
| 501 |
|
|
} |
| 502 |
|
|
|
| 503 |
|
|
/* Address banks */ |
| 504 |
|
|
|
| 505 |
|
|
addrbank dummy_bank = { |
| 506 |
|
|
dummy_lget, dummy_wget, dummy_bget, |
| 507 |
|
|
dummy_lput, dummy_wput, dummy_bput, |
| 508 |
|
|
default_xlate, dummy_check |
| 509 |
|
|
}; |
| 510 |
|
|
|
| 511 |
|
|
addrbank ram_bank = { |
| 512 |
|
|
ram_lget, ram_wget, ram_bget, |
| 513 |
|
|
ram_lput, ram_wput, ram_bput, |
| 514 |
|
|
ram_xlate, ram_check |
| 515 |
|
|
}; |
| 516 |
|
|
|
| 517 |
|
|
addrbank ram24_bank = { |
| 518 |
|
|
ram24_lget, ram24_wget, ram24_bget, |
| 519 |
|
|
ram24_lput, ram24_wput, ram24_bput, |
| 520 |
|
|
ram24_xlate, ram24_check |
| 521 |
|
|
}; |
| 522 |
|
|
|
| 523 |
|
|
addrbank rom_bank = { |
| 524 |
|
|
rom_lget, rom_wget, rom_bget, |
| 525 |
|
|
rom_lput, rom_wput, rom_bput, |
| 526 |
|
|
rom_xlate, rom_check |
| 527 |
|
|
}; |
| 528 |
|
|
|
| 529 |
|
|
addrbank rom24_bank = { |
| 530 |
|
|
rom24_lget, rom24_wget, rom24_bget, |
| 531 |
|
|
rom_lput, rom_wput, rom_bput, |
| 532 |
|
|
rom24_xlate, rom24_check |
| 533 |
|
|
}; |
| 534 |
|
|
|
| 535 |
|
|
addrbank frame_direct_bank = { |
| 536 |
|
|
frame_direct_lget, frame_direct_wget, frame_direct_bget, |
| 537 |
|
|
frame_direct_lput, frame_direct_wput, frame_direct_bput, |
| 538 |
|
|
frame_xlate, frame_check |
| 539 |
|
|
}; |
| 540 |
|
|
|
| 541 |
|
|
addrbank frame_host_555_bank = { |
| 542 |
|
|
frame_host_555_lget, frame_host_555_wget, frame_direct_bget, |
| 543 |
|
|
frame_host_555_lput, frame_host_555_wput, frame_direct_bput, |
| 544 |
|
|
frame_xlate, frame_check |
| 545 |
|
|
}; |
| 546 |
|
|
|
| 547 |
|
|
addrbank frame_host_565_bank = { |
| 548 |
|
|
frame_host_565_lget, frame_host_565_wget, frame_direct_bget, |
| 549 |
|
|
frame_host_565_lput, frame_host_565_wput, frame_direct_bput, |
| 550 |
|
|
frame_xlate, frame_check |
| 551 |
|
|
}; |
| 552 |
|
|
|
| 553 |
|
|
addrbank frame_host_888_bank = { |
| 554 |
|
|
frame_host_888_lget, frame_direct_wget, frame_direct_bget, |
| 555 |
|
|
frame_host_888_lput, frame_direct_wput, frame_direct_bput, |
| 556 |
|
|
frame_xlate, frame_check |
| 557 |
|
|
}; |
| 558 |
|
|
|
| 559 |
cebix |
1.4 |
void InitFrameBufferMapping(void) |
| 560 |
|
|
{ |
| 561 |
|
|
|
| 562 |
|
|
} |
| 563 |
|
|
|
| 564 |
cebix |
1.1 |
void memory_init(void) |
| 565 |
|
|
{ |
| 566 |
cebix |
1.4 |
for(long i=0; i<65536; i++) |
| 567 |
cebix |
1.1 |
put_mem_bank(i<<16, &dummy_bank); |
| 568 |
|
|
|
| 569 |
|
|
// Limit RAM size to not overlap ROM |
| 570 |
|
|
uint32 ram_size = RAMSize > ROMBaseMac ? ROMBaseMac : RAMSize; |
| 571 |
|
|
|
| 572 |
cebix |
1.2 |
RAMBaseDiff = (uae_u32)RAMBaseHost - (uae_u32)RAMBaseMac; |
| 573 |
|
|
ROMBaseDiff = (uae_u32)ROMBaseHost - (uae_u32)ROMBaseMac; |
| 574 |
|
|
FrameBaseDiff = (uae_u32)MacFrameBaseHost - (uae_u32)MacFrameBaseMac; |
| 575 |
|
|
|
| 576 |
|
|
// Map RAM and ROM |
| 577 |
cebix |
1.1 |
if (TwentyFourBitAddressing) { |
| 578 |
|
|
map_banks(&ram24_bank, RAMBaseMac >> 16, ram_size >> 16); |
| 579 |
|
|
map_banks(&rom24_bank, ROMBaseMac >> 16, ROMSize >> 16); |
| 580 |
|
|
} else { |
| 581 |
|
|
map_banks(&ram_bank, RAMBaseMac >> 16, ram_size >> 16); |
| 582 |
|
|
map_banks(&rom_bank, ROMBaseMac >> 16, ROMSize >> 16); |
| 583 |
|
|
} |
| 584 |
|
|
|
| 585 |
cebix |
1.2 |
// Map frame buffer |
| 586 |
cebix |
1.1 |
switch (MacFrameLayout) { |
| 587 |
|
|
case FLAYOUT_DIRECT: |
| 588 |
|
|
map_banks(&frame_direct_bank, MacFrameBaseMac >> 16, (MacFrameSize >> 16) + 1); |
| 589 |
|
|
break; |
| 590 |
|
|
case FLAYOUT_HOST_555: |
| 591 |
|
|
map_banks(&frame_host_555_bank, MacFrameBaseMac >> 16, (MacFrameSize >> 16) + 1); |
| 592 |
|
|
break; |
| 593 |
|
|
case FLAYOUT_HOST_565: |
| 594 |
|
|
map_banks(&frame_host_565_bank, MacFrameBaseMac >> 16, (MacFrameSize >> 16) + 1); |
| 595 |
|
|
break; |
| 596 |
|
|
case FLAYOUT_HOST_888: |
| 597 |
|
|
map_banks(&frame_host_888_bank, MacFrameBaseMac >> 16, (MacFrameSize >> 16) + 1); |
| 598 |
|
|
break; |
| 599 |
|
|
} |
| 600 |
|
|
} |
| 601 |
|
|
|
| 602 |
|
|
void map_banks(addrbank *bank, int start, int size) |
| 603 |
|
|
{ |
| 604 |
|
|
int bnr; |
| 605 |
|
|
unsigned long int hioffs = 0, endhioffs = 0x100; |
| 606 |
|
|
|
| 607 |
|
|
if (start >= 0x100) { |
| 608 |
|
|
for (bnr = start; bnr < start + size; bnr++) |
| 609 |
|
|
put_mem_bank (bnr << 16, bank); |
| 610 |
|
|
return; |
| 611 |
|
|
} |
| 612 |
|
|
if (TwentyFourBitAddressing) endhioffs = 0x10000; |
| 613 |
|
|
for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100) |
| 614 |
|
|
for (bnr = start; bnr < start+size; bnr++) |
| 615 |
|
|
put_mem_bank((bnr + hioffs) << 16, bank); |
| 616 |
|
|
} |
| 617 |
gbeauche |
1.3 |
|
| 618 |
|
|
#endif /* !REAL_ADDRESSING && !DIRECT_ADDRESSING */ |
| 619 |
|
|
|
