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root/cebix/BasiliskII/src/uae_cpu/m68k.h

Comparing BasiliskII/src/uae_cpu/m68k.h (file contents):
Revision 1.4 by cebix, 1999-10-28T16:52:32Z vs.
Revision 1.8 by asvitkine, 2012-03-30T01:25:46Z

#	Line 1 | Line 1
1	<	/*
2	<	* UAE - The Un*x Amiga Emulator
3	<	*
4	<	* MC68000 emulation - machine dependent bits
5	<	*
6	<	* Copyright 1996 Bernd Schmidt
7	<	*/
8	<
9	<	#if defined(__i386__) && defined(X86_ASSEMBLY)
10	<
1	>	/*
2	>	* UAE - The Un*x Amiga Emulator
3	>	*
4	>	* MC68000 emulation - machine dependent bits
5	>	*
6	>	* Copyright 1996 Bernd Schmidt
7	>	*
8	>	* This program is free software; you can redistribute it and/or modify
9	>	* it under the terms of the GNU General Public License as published by
10	>	* the Free Software Foundation; either version 2 of the License, or
11	>	* (at your option) any later version.
12	>	*
13	>	* This program is distributed in the hope that it will be useful,
14	>	* but WITHOUT ANY WARRANTY; without even the implied warranty of
15	>	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16	>	* GNU General Public License for more details.
17	>	*
18	>	* You should have received a copy of the GNU General Public License
19	>	* along with this program; if not, write to the Free Software
20	>	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21	>	*/
22	>
23	>	#ifndef M68K_FLAGS_H
24	>	#define M68K_FLAGS_H
25	>
26	>	#ifdef OPTIMIZED_FLAGS
27	>
28	>	#if (defined(__i386__) && defined(X86_ASSEMBLY)) || (defined(__x86_64__) && defined(X86_64_ASSEMBLY))
29	>
30	>	#ifndef SAHF_SETO_PROFITABLE
31	>
32	>	/* PUSH/POP instructions are naturally 64-bit sized on x86-64, thus
33	>	unsigned long hereunder is either 64-bit or 32-bit wide depending
34	>	on the target.  */
35		struct flag_struct {
36	<	unsigned int cznv;
37	<	unsigned int x;
36	>	unsigned long cznv;
37	>	unsigned long x;
38		};
39
40	<	#define SET_ZFLG(y) (regflags.cznv = (regflags.cznv & ~0x40) | (((y) & 1) << 6))
41	<	#define SET_CFLG(y) (regflags.cznv = (regflags.cznv & ~1) | ((y) & 1))
42	<	#define SET_VFLG(y) (regflags.cznv = (regflags.cznv & ~0x800) | (((y) & 1) << 11))
43	<	#define SET_NFLG(y) (regflags.cznv = (regflags.cznv & ~0x80) | (((y) & 1) << 7))
44	<	#define SET_XFLG(y) (regflags.x = (y))
45	<
46	<	#define GET_ZFLG ((regflags.cznv >> 6) & 1)
47	<	#define GET_CFLG (regflags.cznv & 1)
48	<	#define GET_VFLG ((regflags.cznv >> 11) & 1)
49	<	#define GET_NFLG ((regflags.cznv >> 7) & 1)
50	<	#define GET_XFLG (regflags.x & 1)
40	>	#define FLAGVAL_Z       0x40
41	>	#define FLAGVAL_N       0x80
42	>
43	>	#define SET_ZFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x40) | (((y) & 1) << 6))
44	>	#define SET_CFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~1) | ((y) & 1))
45	>	#define SET_VFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x800) | (((y) & 1) << 11))
46	>	#define SET_NFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x80) | (((y) & 1) << 7))
47	>	#define SET_XFLG(y)     (regflags.x = (y))
48	>
49	>	#define GET_ZFLG        ((regflags.cznv >> 6) & 1)
50	>	#define GET_CFLG        (regflags.cznv & 1)
51	>	#define GET_VFLG        ((regflags.cznv >> 11) & 1)
52	>	#define GET_NFLG        ((regflags.cznv >> 7) & 1)
53	>	#define GET_XFLG        (regflags.x & 1)
54	>
55	>	#define CLEAR_CZNV      (regflags.cznv = 0)
56	>	#define GET_CZNV        (regflags.cznv)
57	>	#define IOR_CZNV(X)     (regflags.cznv |= (X))
58	>	#define SET_CZNV(X)     (regflags.cznv = (X))
59
60	<	#define CLEAR_CZNV (regflags.cznv = 0)
29	<	#define COPY_CARRY (regflags.x = regflags.cznv)
60	>	#define COPY_CARRY      (regflags.x = regflags.cznv)
61
62		extern struct flag_struct regflags __asm__ ("regflags");
63
#	Line 58 | Line 89 | static __inline__ int cctrue(int cc)
89		return 0;
90		}
91
92	<	#define x86_flag_testl(v) \
93	<	__asm__ __volatile__ ("testl %1,%1\n\t" \
94	<	"pushfl\n\t" \
95	<	"popl %0\n\t" \
92	>	#define optflag_testl(v) \
93	>	__asm__ __volatile__ ("andl %1,%1\n\t" \
94	>	"pushf\n\t" \
95	>	"pop %0\n\t" \
96		: "=r" (regflags.cznv) : "r" (v) : "cc")
97
98	<	#define x86_flag_testw(v) \
99	<	__asm__ __volatile__ ("testw %w1,%w1\n\t" \
100	<	"pushfl\n\t" \
101	<	"popl %0\n\t" \
98	>	#define optflag_testw(v) \
99	>	__asm__ __volatile__ ("andw %w1,%w1\n\t" \
100	>	"pushf\n\t" \
101	>	"pop %0\n\t" \
102		: "=r" (regflags.cznv) : "r" (v) : "cc")
103
104	<	#define x86_flag_testb(v) \
105	<	__asm__ __volatile__ ("testb %b1,%b1\n\t" \
106	<	"pushfl\n\t" \
107	<	"popl %0\n\t" \
104	>	#define optflag_testb(v) \
105	>	__asm__ __volatile__ ("andb %b1,%b1\n\t" \
106	>	"pushf\n\t" \
107	>	"pop %0\n\t" \
108		: "=r" (regflags.cznv) : "q" (v) : "cc")
109
110	<	#define x86_flag_addl(v, s, d) do { \
110	>	#define optflag_addl(v, s, d) do { \
111		__asm__ __volatile__ ("addl %k2,%k1\n\t" \
112	<	"pushfl\n\t" \
113	<	"popl %0\n\t" \
112	>	"pushf\n\t" \
113	>	"pop %0\n\t" \
114		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
115		COPY_CARRY; \
116		} while (0)
117
118	<	#define x86_flag_addw(v, s, d) do { \
118	>	#define optflag_addw(v, s, d) do { \
119		__asm__ __volatile__ ("addw %w2,%w1\n\t" \
120	<	"pushfl\n\t" \
121	<	"popl %0\n\t" \
120	>	"pushf\n\t" \
121	>	"pop %0\n\t" \
122		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
123		COPY_CARRY; \
124		} while (0)
125
126	<	#define x86_flag_addb(v, s, d) do { \
126	>	#define optflag_addb(v, s, d) do { \
127		__asm__ __volatile__ ("addb %b2,%b1\n\t" \
128	<	"pushfl\n\t" \
129	<	"popl %0\n\t" \
128	>	"pushf\n\t" \
129	>	"pop %0\n\t" \
130		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
131		COPY_CARRY; \
132		} while (0)
133
134	<	#define x86_flag_subl(v, s, d) do { \
134	>	#define optflag_subl(v, s, d) do { \
135		__asm__ __volatile__ ("subl %k2,%k1\n\t" \
136	<	"pushfl\n\t" \
137	<	"popl %0\n\t" \
136	>	"pushf\n\t" \
137	>	"pop %0\n\t" \
138		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
139		COPY_CARRY; \
140		} while (0)
141
142	<	#define x86_flag_subw(v, s, d) do { \
142	>	#define optflag_subw(v, s, d) do { \
143		__asm__ __volatile__ ("subw %w2,%w1\n\t" \
144	<	"pushfl\n\t" \
145	<	"popl %0\n\t" \
144	>	"pushf\n\t" \
145	>	"pop %0\n\t" \
146		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
147		COPY_CARRY; \
148		} while (0)
149
150	<	#define x86_flag_subb(v, s, d) do { \
150	>	#define optflag_subb(v, s, d) do { \
151		__asm__ __volatile__ ("subb %b2,%b1\n\t" \
152	<	"pushfl\n\t" \
153	<	"popl %0\n\t" \
152	>	"pushf\n\t" \
153	>	"pop %0\n\t" \
154		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
155		COPY_CARRY; \
156		} while (0)
157
158	<	#define x86_flag_cmpl(s, d) \
158	>	#define optflag_cmpl(s, d) \
159		__asm__ __volatile__ ("cmpl %k1,%k2\n\t" \
160	<	"pushfl\n\t" \
161	<	"popl %0\n\t" \
160	>	"pushf\n\t" \
161	>	"pop %0\n\t" \
162		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
163
164	<	#define x86_flag_cmpw(s, d) \
164	>	#define optflag_cmpw(s, d) \
165		__asm__ __volatile__ ("cmpw %w1,%w2\n\t" \
166	<	"pushfl\n\t" \
167	<	"popl %0\n\t" \
166	>	"pushf\n\t" \
167	>	"pop %0\n\t" \
168		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
169
170	<	#define x86_flag_cmpb(s, d) \
170	>	#define optflag_cmpb(s, d) \
171		__asm__ __volatile__ ("cmpb %b1,%b2\n\t" \
172	<	"pushfl\n\t" \
173	<	"popl %0\n\t" \
172	>	"pushf\n\t" \
173	>	"pop %0\n\t" \
174		: "=r" (regflags.cznv) : "qmi" (s), "q" (d) : "cc")
175
176	+	#else
177	+
178	+	struct flag_struct {
179	+	uae_u32 cznv;
180	+	uae_u32 x;
181	+	};
182	+
183	+	#define FLAGVAL_Z       0x4000
184	+	#define FLAGVAL_N       0x8000
185	+
186	+	#define SET_ZFLG(y)     (regflags.cznv = (regflags.cznv & ~0x4000) | (((y) & 1) << 14))
187	+	#define SET_CFLG(y)     (regflags.cznv = (regflags.cznv & ~0x100) | (((y) & 1) << 8))
188	+	#define SET_VFLG(y)     (regflags.cznv = (regflags.cznv & ~0x1) | (((y) & 1)))
189	+	#define SET_NFLG(y)     (regflags.cznv = (regflags.cznv & ~0x8000) | (((y) & 1) << 15))
190	+	#define SET_XFLG(y)     (regflags.x = (y))
191	+
192	+	#define GET_ZFLG        ((regflags.cznv >> 14) & 1)
193	+	#define GET_CFLG        ((regflags.cznv >> 8) & 1)
194	+	#define GET_VFLG        ((regflags.cznv >> 0) & 1)
195	+	#define GET_NFLG        ((regflags.cznv >> 15) & 1)
196	+	#define GET_XFLG        (regflags.x & 1)
197	+
198	+	#define CLEAR_CZNV      (regflags.cznv = 0)
199	+	#define GET_CZNV        (regflags.cznv)
200	+	#define IOR_CZNV(X)     (regflags.cznv |= (X))
201	+	#define SET_CZNV(X)     (regflags.cznv = (X))
202	+
203	+	#define COPY_CARRY      (regflags.x = (regflags.cznv)>>8)
204	+
205	+	extern struct flag_struct regflags __asm__ ("regflags");
206	+
207	+	static __inline__ int cctrue(int cc)
208	+	{
209	+	uae_u32 cznv = regflags.cznv;
210	+	switch(cc){
211	+	case 0: return 1;                       /* T */
212	+	case 1: return 0;                       /* F */
213	+	case 2: return (cznv & 0x4100) == 0; /* !GET_CFLG && !GET_ZFLG;  HI */
214	+	case 3: return (cznv & 0x4100) != 0; /* GET_CFLG || GET_ZFLG;    LS */
215	+	case 4: return (cznv & 0x100) == 0;  /* !GET_CFLG;               CC */
216	+	case 5: return (cznv & 0x100) != 0;  /* GET_CFLG;                CS */
217	+	case 6: return (cznv & 0x4000) == 0; /* !GET_ZFLG;               NE */
218	+	case 7: return (cznv & 0x4000) != 0; /* GET_ZFLG;                EQ */
219	+	case 8: return (cznv & 0x01) == 0;   /* !GET_VFLG;               VC */
220	+	case 9: return (cznv & 0x01) != 0;   /* GET_VFLG;                VS */
221	+	case 10:return (cznv & 0x8000) == 0; /* !GET_NFLG;               PL */
222	+	case 11:return (cznv & 0x8000) != 0; /* GET_NFLG;                MI */
223	+	case 12:return (((cznv << 15) ^ cznv) & 0x8000) == 0; /* GET_NFLG == GET_VFLG;             GE */
224	+	case 13:return (((cznv << 15) ^ cznv) & 0x8000) != 0;/* GET_NFLG != GET_VFLG;             LT */
225	+	case 14:
226	+	cznv &= 0xc001;
227	+	return (((cznv << 15) ^ cznv) & 0xc000) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG);  GT */
228	+	case 15:
229	+	cznv &= 0xc001;
230	+	return (((cznv << 15) ^ cznv) & 0xc000) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG);   LE */
231	+	}
232	+	abort();
233	+	return 0;
234	+	}
235	+
236	+	/* Manually emit LAHF instruction so that 64-bit assemblers can grok it */
237	+	#if defined __x86_64__ && defined __GNUC__
238	+	#define ASM_LAHF ".byte 0x9f"
239	+	#else
240	+	#define ASM_LAHF "lahf"
241	+	#endif
242	+
243	+	/* Is there any way to do this without declaring *all* memory clobbered?
244	+	I.e. any way to tell gcc that some byte-sized value is in %al? */
245	+	#define optflag_testl(v) \
246	+	__asm__ __volatile__ ("andl %0,%0\n\t" \
247	+	ASM_LAHF "\n\t" \
248	+	"seto %%al\n\t" \
249	+	"movb %%al,regflags\n\t" \
250	+	"movb %%ah,regflags+1\n\t" \
251	+	: : "r" (v) : "%eax","cc","memory")
252	+
253	+	#define optflag_testw(v) \
254	+	__asm__ __volatile__ ("andw %w0,%w0\n\t" \
255	+	ASM_LAHF "\n\t" \
256	+	"seto %%al\n\t" \
257	+	"movb %%al,regflags\n\t" \
258	+	"movb %%ah,regflags+1\n\t" \
259	+	: : "r" (v) : "%eax","cc","memory")
260	+
261	+	#define optflag_testb(v) \
262	+	__asm__ __volatile__ ("andb %b0,%b0\n\t" \
263	+	ASM_LAHF "\n\t" \
264	+	"seto %%al\n\t" \
265	+	"movb %%al,regflags\n\t" \
266	+	"movb %%ah,regflags+1\n\t" \
267	+	: : "q" (v) : "%eax","cc","memory")
268	+
269	+	#define optflag_addl(v, s, d) do { \
270	+	__asm__ __volatile__ ("addl %k1,%k0\n\t" \
271	+	ASM_LAHF "\n\t" \
272	+	"seto %%al\n\t" \
273	+	"movb %%al,regflags\n\t" \
274	+	"movb %%ah,regflags+1\n\t" \
275	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
276	+	COPY_CARRY; \
277	+	} while (0)
278	+
279	+	#define optflag_addw(v, s, d) do { \
280	+	__asm__ __volatile__ ("addw %w1,%w0\n\t" \
281	+	ASM_LAHF "\n\t" \
282	+	"seto %%al\n\t" \
283	+	"movb %%al,regflags\n\t" \
284	+	"movb %%ah,regflags+1\n\t" \
285	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
286	+	COPY_CARRY; \
287	+	} while (0)
288	+
289	+	#define optflag_addb(v, s, d) do { \
290	+	__asm__ __volatile__ ("addb %b1,%b0\n\t" \
291	+	ASM_LAHF "\n\t" \
292	+	"seto %%al\n\t" \
293	+	"movb %%al,regflags\n\t" \
294	+	"movb %%ah,regflags+1\n\t" \
295	+	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
296	+	COPY_CARRY; \
297	+	} while (0)
298	+
299	+	#define optflag_subl(v, s, d) do { \
300	+	__asm__ __volatile__ ("subl %k1,%k0\n\t" \
301	+	ASM_LAHF "\n\t" \
302	+	"seto %%al\n\t" \
303	+	"movb %%al,regflags\n\t" \
304	+	"movb %%ah,regflags+1\n\t" \
305	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
306	+	COPY_CARRY; \
307	+	} while (0)
308	+
309	+	#define optflag_subw(v, s, d) do { \
310	+	__asm__ __volatile__ ("subw %w1,%w0\n\t" \
311	+	ASM_LAHF "\n\t" \
312	+	"seto %%al\n\t" \
313	+	"movb %%al,regflags\n\t" \
314	+	"movb %%ah,regflags+1\n\t" \
315	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
316	+	COPY_CARRY; \
317	+	} while (0)
318	+
319	+	#define optflag_subb(v, s, d) do { \
320	+	__asm__ __volatile__ ("subb %b1,%b0\n\t" \
321	+	ASM_LAHF "\n\t" \
322	+	"seto %%al\n\t" \
323	+	"movb %%al,regflags\n\t" \
324	+	"movb %%ah,regflags+1\n\t" \
325	+	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
326	+	COPY_CARRY; \
327	+	} while (0)
328	+
329	+	#define optflag_cmpl(s, d) \
330	+	__asm__ __volatile__ ("cmpl %k0,%k1\n\t" \
331	+	ASM_LAHF "\n\t" \
332	+	"seto %%al\n\t" \
333	+	"movb %%al,regflags\n\t" \
334	+	"movb %%ah,regflags+1\n\t" \
335	+	: : "rmi" (s), "r" (d) : "%eax","cc","memory")
336	+
337	+	#define optflag_cmpw(s, d) \
338	+	__asm__ __volatile__ ("cmpw %w0,%w1\n\t" \
339	+	ASM_LAHF "\n\t" \
340	+	"seto %%al\n\t" \
341	+	"movb %%al,regflags\n\t" \
342	+	"movb %%ah,regflags+1\n\t" \
343	+	: : "rmi" (s), "r" (d) : "%eax","cc","memory");
344	+
345	+	#define optflag_cmpb(s, d) \
346	+	__asm__ __volatile__ ("cmpb %b0,%b1\n\t" \
347	+	ASM_LAHF "\n\t" \
348	+	"seto %%al\n\t" \
349	+	"movb %%al,regflags\n\t" \
350	+	"movb %%ah,regflags+1\n\t" \
351	+	: : "qmi" (s), "q" (d) : "%eax","cc","memory")
352	+
353	+	#endif
354	+
355		#elif defined(__sparc__) && (defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY))
356
357		struct flag_struct {
#	Line 151 | Line 361 | struct flag_struct {
361
362		extern struct flag_struct regflags;
363
364	<	#define SET_ZFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x04) | (((y) & 1) << 2))
365	<	#define SET_CFLG(y) (regflags.nzvc = (regflags.nzvc & ~1) | ((y) & 1))
366	<	#define SET_VFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x02) | (((y) & 1) << 1))
367	<	#define SET_NFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x08) | (((y) & 1) << 3))
368	<	#define SET_XFLG(y) (regflags.x = (y))
369	<
370	<	#define GET_ZFLG ((regflags.nzvc >> 2) & 1)
371	<	#define GET_CFLG (regflags.nzvc & 1)
372	<	#define GET_VFLG ((regflags.nzvc >> 1) & 1)
373	<	#define GET_NFLG ((regflags.nzvc >> 3) & 1)
374	<	#define GET_XFLG (regflags.x & 1)
364	>	#define FLAGVAL_Z       0x04
365	>	#define FLAGVAL_N       0x08
366	>
367	>	#define SET_ZFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x04) | (((y) & 1) << 2))
368	>	#define SET_CFLG(y)     (regflags.nzvc = (regflags.nzvc & ~1) | ((y) & 1))
369	>	#define SET_VFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x02) | (((y) & 1) << 1))
370	>	#define SET_NFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x08) | (((y) & 1) << 3))
371	>	#define SET_XFLG(y)     (regflags.x = (y))
372	>
373	>	#define GET_ZFLG        ((regflags.nzvc >> 2) & 1)
374	>	#define GET_CFLG        (regflags.nzvc & 1)
375	>	#define GET_VFLG        ((regflags.nzvc >> 1) & 1)
376	>	#define GET_NFLG        ((regflags.nzvc >> 3) & 1)
377	>	#define GET_XFLG        (regflags.x & 1)
378	>
379	>	#define CLEAR_CZNV      (regflags.nzvc = 0)
380	>	#define GET_CZNV        (reflags.nzvc)
381	>	#define IOR_CZNV(X)     (refglags.nzvc |= (X))
382	>	#define SET_CZNV(X)     (regflags.nzvc = (X))
383
166	–	#define CLEAR_CZNV (regflags.nzvc = 0)
384		#define COPY_CARRY (regflags.x = regflags.nzvc)
385
386		static __inline__ int cctrue(int cc)
#	Line 787 | Line 1004 | static inline uae_u32 sparc_v9_flag_addx
1004
1005		#endif /* SPARC_V9_ASSEMBLY */
1006
1007	+	#endif
1008	+
1009		#else
1010
1011		struct flag_struct {
#	Line 805 | Line 1024 | extern struct flag_struct regflags;
1024		#define VFLG (regflags.v)
1025		#define XFLG (regflags.x)
1026
1027	+	#define SET_CFLG(x) (CFLG = (x))
1028	+	#define SET_NFLG(x) (NFLG = (x))
1029	+	#define SET_VFLG(x) (VFLG = (x))
1030	+	#define SET_ZFLG(x) (ZFLG = (x))
1031	+	#define SET_XFLG(x) (XFLG = (x))
1032	+
1033	+	#define GET_CFLG CFLG
1034	+	#define GET_NFLG NFLG
1035	+	#define GET_VFLG VFLG
1036	+	#define GET_ZFLG ZFLG
1037	+	#define GET_XFLG XFLG
1038	+
1039	+	#define CLEAR_CZNV do { \
1040	+	SET_CFLG (0); \
1041	+	SET_ZFLG (0); \
1042	+	SET_NFLG (0); \
1043	+	SET_VFLG (0); \
1044	+	} while (0)
1045	+
1046	+	#define COPY_CARRY (SET_XFLG (GET_CFLG))
1047	+
1048		static __inline__ int cctrue(const int cc)
1049		{
1050		switch(cc){
#	Line 828 | Line 1068 | static __inline__ int cctrue(const int c
1068		return 0;
1069		}
1070
1071	<	#endif
1071	>	#endif /* OPTIMIZED_FLAGS */
1072	>
1073	>	#endif /* M68K_FLAGS_H */

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