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root/cebix/BasiliskII/src/uae_cpu/m68k.h

Comparing BasiliskII/src/uae_cpu/m68k.h (file contents):
Revision 1.3 by cebix, 1999-10-28T16:00:26Z vs.
Revision 1.8 by asvitkine, 2012-03-30T01:25:46Z

#	Line 1 | Line 1
1	<	/*
2	<	* UAE - The Un*x Amiga Emulator
3	<	*
4	<	* MC68000 emulation - machine dependent bits
5	<	*
6	<	* Copyright 1996 Bernd Schmidt
7	<	*/
8	<
9	<	#if defined(__i386__) && defined(X86_ASSEMBLY)
10	<
1	>	/*
2	>	* UAE - The Un*x Amiga Emulator
3	>	*
4	>	* MC68000 emulation - machine dependent bits
5	>	*
6	>	* Copyright 1996 Bernd Schmidt
7	>	*
8	>	* This program is free software; you can redistribute it and/or modify
9	>	* it under the terms of the GNU General Public License as published by
10	>	* the Free Software Foundation; either version 2 of the License, or
11	>	* (at your option) any later version.
12	>	*
13	>	* This program is distributed in the hope that it will be useful,
14	>	* but WITHOUT ANY WARRANTY; without even the implied warranty of
15	>	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16	>	* GNU General Public License for more details.
17	>	*
18	>	* You should have received a copy of the GNU General Public License
19	>	* along with this program; if not, write to the Free Software
20	>	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21	>	*/
22	>
23	>	#ifndef M68K_FLAGS_H
24	>	#define M68K_FLAGS_H
25	>
26	>	#ifdef OPTIMIZED_FLAGS
27	>
28	>	#if (defined(__i386__) && defined(X86_ASSEMBLY)) || (defined(__x86_64__) && defined(X86_64_ASSEMBLY))
29	>
30	>	#ifndef SAHF_SETO_PROFITABLE
31	>
32	>	/* PUSH/POP instructions are naturally 64-bit sized on x86-64, thus
33	>	unsigned long hereunder is either 64-bit or 32-bit wide depending
34	>	on the target.  */
35		struct flag_struct {
36	<	unsigned int cznv;
37	<	unsigned int x;
36	>	unsigned long cznv;
37	>	unsigned long x;
38		};
39
40	<	#define SET_ZFLG(y) (regflags.cznv = (regflags.cznv & ~0x40) | (((y) & 1) << 6))
41	<	#define SET_CFLG(y) (regflags.cznv = (regflags.cznv & ~1) | ((y) & 1))
18	<	#define SET_VFLG(y) (regflags.cznv = (regflags.cznv & ~0x800) | (((y) & 1) << 11))
19	<	#define SET_NFLG(y) (regflags.cznv = (regflags.cznv & ~0x80) | (((y) & 1) << 7))
20	<	#define SET_XFLG(y) (regflags.x = (y))
21	<
22	<	#define GET_ZFLG ((regflags.cznv >> 6) & 1)
23	<	#define GET_CFLG (regflags.cznv & 1)
24	<	#define GET_VFLG ((regflags.cznv >> 11) & 1)
25	<	#define GET_NFLG ((regflags.cznv >> 7) & 1)
26	<	#define GET_XFLG (regflags.x & 1)
40	>	#define FLAGVAL_Z       0x40
41	>	#define FLAGVAL_N       0x80
42
43	<	#define CLEAR_CZNV (regflags.cznv = 0)
44	<	#define COPY_CARRY (regflags.x = regflags.cznv)
43	>	#define SET_ZFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x40) | (((y) & 1) << 6))
44	>	#define SET_CFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~1) | ((y) & 1))
45	>	#define SET_VFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x800) | (((y) & 1) << 11))
46	>	#define SET_NFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x80) | (((y) & 1) << 7))
47	>	#define SET_XFLG(y)     (regflags.x = (y))
48	>
49	>	#define GET_ZFLG        ((regflags.cznv >> 6) & 1)
50	>	#define GET_CFLG        (regflags.cznv & 1)
51	>	#define GET_VFLG        ((regflags.cznv >> 11) & 1)
52	>	#define GET_NFLG        ((regflags.cznv >> 7) & 1)
53	>	#define GET_XFLG        (regflags.x & 1)
54	>
55	>	#define CLEAR_CZNV      (regflags.cznv = 0)
56	>	#define GET_CZNV        (regflags.cznv)
57	>	#define IOR_CZNV(X)     (regflags.cznv |= (X))
58	>	#define SET_CZNV(X)     (regflags.cznv = (X))
59	>
60	>	#define COPY_CARRY      (regflags.x = regflags.cznv)
61
62		extern struct flag_struct regflags __asm__ ("regflags");
63
#	Line 58 | Line 89 | static __inline__ int cctrue(int cc)
89		return 0;
90		}
91
92	<	#define x86_flag_testl(v) \
93	<	__asm__ __volatile__ ("testl %1,%1\n\t" \
94	<	"pushfl\n\t" \
95	<	"popl %0\n\t" \
92	>	#define optflag_testl(v) \
93	>	__asm__ __volatile__ ("andl %1,%1\n\t" \
94	>	"pushf\n\t" \
95	>	"pop %0\n\t" \
96		: "=r" (regflags.cznv) : "r" (v) : "cc")
97
98	<	#define x86_flag_testw(v) \
99	<	__asm__ __volatile__ ("testw %w1,%w1\n\t" \
100	<	"pushfl\n\t" \
101	<	"popl %0\n\t" \
98	>	#define optflag_testw(v) \
99	>	__asm__ __volatile__ ("andw %w1,%w1\n\t" \
100	>	"pushf\n\t" \
101	>	"pop %0\n\t" \
102		: "=r" (regflags.cznv) : "r" (v) : "cc")
103
104	<	#define x86_flag_testb(v) \
105	<	__asm__ __volatile__ ("testb %b1,%b1\n\t" \
106	<	"pushfl\n\t" \
107	<	"popl %0\n\t" \
104	>	#define optflag_testb(v) \
105	>	__asm__ __volatile__ ("andb %b1,%b1\n\t" \
106	>	"pushf\n\t" \
107	>	"pop %0\n\t" \
108		: "=r" (regflags.cznv) : "q" (v) : "cc")
109
110	<	#define x86_flag_addl(v, s, d) do { \
110	>	#define optflag_addl(v, s, d) do { \
111		__asm__ __volatile__ ("addl %k2,%k1\n\t" \
112	<	"pushfl\n\t" \
113	<	"popl %0\n\t" \
112	>	"pushf\n\t" \
113	>	"pop %0\n\t" \
114		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
115		COPY_CARRY; \
116		} while (0)
117
118	<	#define x86_flag_addw(v, s, d) do { \
118	>	#define optflag_addw(v, s, d) do { \
119		__asm__ __volatile__ ("addw %w2,%w1\n\t" \
120	<	"pushfl\n\t" \
121	<	"popl %0\n\t" \
120	>	"pushf\n\t" \
121	>	"pop %0\n\t" \
122		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
123		COPY_CARRY; \
124		} while (0)
125
126	<	#define x86_flag_addb(v, s, d) do { \
126	>	#define optflag_addb(v, s, d) do { \
127		__asm__ __volatile__ ("addb %b2,%b1\n\t" \
128	<	"pushfl\n\t" \
129	<	"popl %0\n\t" \
128	>	"pushf\n\t" \
129	>	"pop %0\n\t" \
130		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
131		COPY_CARRY; \
132		} while (0)
133
134	<	#define x86_flag_subl(v, s, d) do { \
134	>	#define optflag_subl(v, s, d) do { \
135		__asm__ __volatile__ ("subl %k2,%k1\n\t" \
136	<	"pushfl\n\t" \
137	<	"popl %0\n\t" \
136	>	"pushf\n\t" \
137	>	"pop %0\n\t" \
138		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
139		COPY_CARRY; \
140		} while (0)
141
142	<	#define x86_flag_subw(v, s, d) do { \
142	>	#define optflag_subw(v, s, d) do { \
143		__asm__ __volatile__ ("subw %w2,%w1\n\t" \
144	<	"pushfl\n\t" \
145	<	"popl %0\n\t" \
144	>	"pushf\n\t" \
145	>	"pop %0\n\t" \
146		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
147		COPY_CARRY; \
148		} while (0)
149
150	<	#define x86_flag_subb(v, s, d) do { \
150	>	#define optflag_subb(v, s, d) do { \
151		__asm__ __volatile__ ("subb %b2,%b1\n\t" \
152	<	"pushfl\n\t" \
153	<	"popl %0\n\t" \
152	>	"pushf\n\t" \
153	>	"pop %0\n\t" \
154		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
155		COPY_CARRY; \
156		} while (0)
157
158	<	#define x86_flag_cmpl(s, d) \
158	>	#define optflag_cmpl(s, d) \
159		__asm__ __volatile__ ("cmpl %k1,%k2\n\t" \
160	<	"pushfl\n\t" \
161	<	"popl %0\n\t" \
160	>	"pushf\n\t" \
161	>	"pop %0\n\t" \
162		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
163
164	<	#define x86_flag_cmpw(s, d) \
164	>	#define optflag_cmpw(s, d) \
165		__asm__ __volatile__ ("cmpw %w1,%w2\n\t" \
166	<	"pushfl\n\t" \
167	<	"popl %0\n\t" \
166	>	"pushf\n\t" \
167	>	"pop %0\n\t" \
168		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
169
170	<	#define x86_flag_cmpb(s, d) \
170	>	#define optflag_cmpb(s, d) \
171		__asm__ __volatile__ ("cmpb %b1,%b2\n\t" \
172	<	"pushfl\n\t" \
173	<	"popl %0\n\t" \
172	>	"pushf\n\t" \
173	>	"pop %0\n\t" \
174		: "=r" (regflags.cznv) : "qmi" (s), "q" (d) : "cc")
175
176	<	#elif defined(__sparc__) && (defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY))
176	>	#else
177
178		struct flag_struct {
179	<	union {
180	<	unsigned short  all;
150	<	unsigned char   bytes[2];
151	<	};
179	>	uae_u32 cznv;
180	>	uae_u32 x;
181		};
182
183	<	typedef unsigned short *        flags_addr;
184	<	extern struct flag_struct       regflags;
156	<	#define M68K_FLAGS_ADDR         ((flags_addr)(&regflags.all))
157	<	#define M68K_FLAGS_NZVC         regflags.bytes[1]
158	<	#define M68K_FLAGS_X            regflags.bytes[0]
183	>	#define FLAGVAL_Z       0x4000
184	>	#define FLAGVAL_N       0x8000
185
186	<	#if 0
186	>	#define SET_ZFLG(y)     (regflags.cznv = (regflags.cznv & ~0x4000) | (((y) & 1) << 14))
187	>	#define SET_CFLG(y)     (regflags.cznv = (regflags.cznv & ~0x100) | (((y) & 1) << 8))
188	>	#define SET_VFLG(y)     (regflags.cznv = (regflags.cznv & ~0x1) | (((y) & 1)))
189	>	#define SET_NFLG(y)     (regflags.cznv = (regflags.cznv & ~0x8000) | (((y) & 1) << 15))
190	>	#define SET_XFLG(y)     (regflags.x = (y))
191	>
192	>	#define GET_ZFLG        ((regflags.cznv >> 14) & 1)
193	>	#define GET_CFLG        ((regflags.cznv >> 8) & 1)
194	>	#define GET_VFLG        ((regflags.cznv >> 0) & 1)
195	>	#define GET_NFLG        ((regflags.cznv >> 15) & 1)
196	>	#define GET_XFLG        (regflags.x & 1)
197	>
198	>	#define CLEAR_CZNV      (regflags.cznv = 0)
199	>	#define GET_CZNV        (regflags.cznv)
200	>	#define IOR_CZNV(X)     (regflags.cznv |= (X))
201	>	#define SET_CZNV(X)     (regflags.cznv = (X))
202
203	<	#define SET_ZFLG(y)     (M68K_FLAGS_NZVC = (M68K_FLAGS_NZVC & ~0x01) | ((y) & 1))
204	<	#define SET_CFLG(y)     (M68K_FLAGS_NZVC = (M68K_FLAGS_NZVC & ~0x02) | (((y) & 1) << 1))
205	<	#define SET_XFLG(y)     (M68K_FLAGS_X = ((y) & 1) << 1)
165	<	#define SET_VFLG(y)     (M68K_FLAGS_NZVC = (M68K_FLAGS_NZVC & ~0x10) | (((y) & 1) << 4))
166	<	#define SET_NFLG(y)     (M68K_FLAGS_NZVC = (M68K_FLAGS_NZVC & ~0x80) | (((y) & 1) << 7))
167	<
168	<	#define GET_ZFLG        (M68K_FLAGS_NZVC & 1)
169	<	#define GET_CFLG        ((M68K_FLAGS_NZVC >> 1) & 1)
170	<	#define GET_XFLG        ((M68K_FLAGS_X >> 1) & 1)
171	<	#define GET_VFLG        ((M68K_FLAGS_NZVC >> 4) & 1)
172	<	#define GET_NFLG        ((M68K_FLAGS_NZVC >> 7) & 1)
203	>	#define COPY_CARRY      (regflags.x = (regflags.cznv)>>8)
204	>
205	>	extern struct flag_struct regflags __asm__ ("regflags");
206
207	<	#define CLEAR_CZNV      (M68K_FLAGS_NZVC = 0)
208	<	#define COPY_CARRY      (M68K_FLAGS_X = M68K_FLAGS_NZVC)
207	>	static __inline__ int cctrue(int cc)
208	>	{
209	>	uae_u32 cznv = regflags.cznv;
210	>	switch(cc){
211	>	case 0: return 1;                       /* T */
212	>	case 1: return 0;                       /* F */
213	>	case 2: return (cznv & 0x4100) == 0; /* !GET_CFLG && !GET_ZFLG;  HI */
214	>	case 3: return (cznv & 0x4100) != 0; /* GET_CFLG || GET_ZFLG;    LS */
215	>	case 4: return (cznv & 0x100) == 0;  /* !GET_CFLG;               CC */
216	>	case 5: return (cznv & 0x100) != 0;  /* GET_CFLG;                CS */
217	>	case 6: return (cznv & 0x4000) == 0; /* !GET_ZFLG;               NE */
218	>	case 7: return (cznv & 0x4000) != 0; /* GET_ZFLG;                EQ */
219	>	case 8: return (cznv & 0x01) == 0;   /* !GET_VFLG;               VC */
220	>	case 9: return (cznv & 0x01) != 0;   /* GET_VFLG;                VS */
221	>	case 10:return (cznv & 0x8000) == 0; /* !GET_NFLG;               PL */
222	>	case 11:return (cznv & 0x8000) != 0; /* GET_NFLG;                MI */
223	>	case 12:return (((cznv << 15) ^ cznv) & 0x8000) == 0; /* GET_NFLG == GET_VFLG;             GE */
224	>	case 13:return (((cznv << 15) ^ cznv) & 0x8000) != 0;/* GET_NFLG != GET_VFLG;             LT */
225	>	case 14:
226	>	cznv &= 0xc001;
227	>	return (((cznv << 15) ^ cznv) & 0xc000) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG);  GT */
228	>	case 15:
229	>	cznv &= 0xc001;
230	>	return (((cznv << 15) ^ cznv) & 0xc000) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG);   LE */
231	>	}
232	>	abort();
233	>	return 0;
234	>	}
235
236	+	/* Manually emit LAHF instruction so that 64-bit assemblers can grok it */
237	+	#if defined __x86_64__ && defined __GNUC__
238	+	#define ASM_LAHF ".byte 0x9f"
239		#else
240	+	#define ASM_LAHF "lahf"
241	+	#endif
242	+
243	+	/* Is there any way to do this without declaring *all* memory clobbered?
244	+	I.e. any way to tell gcc that some byte-sized value is in %al? */
245	+	#define optflag_testl(v) \
246	+	__asm__ __volatile__ ("andl %0,%0\n\t" \
247	+	ASM_LAHF "\n\t" \
248	+	"seto %%al\n\t" \
249	+	"movb %%al,regflags\n\t" \
250	+	"movb %%ah,regflags+1\n\t" \
251	+	: : "r" (v) : "%eax","cc","memory")
252	+
253	+	#define optflag_testw(v) \
254	+	__asm__ __volatile__ ("andw %w0,%w0\n\t" \
255	+	ASM_LAHF "\n\t" \
256	+	"seto %%al\n\t" \
257	+	"movb %%al,regflags\n\t" \
258	+	"movb %%ah,regflags+1\n\t" \
259	+	: : "r" (v) : "%eax","cc","memory")
260	+
261	+	#define optflag_testb(v) \
262	+	__asm__ __volatile__ ("andb %b0,%b0\n\t" \
263	+	ASM_LAHF "\n\t" \
264	+	"seto %%al\n\t" \
265	+	"movb %%al,regflags\n\t" \
266	+	"movb %%ah,regflags+1\n\t" \
267	+	: : "q" (v) : "%eax","cc","memory")
268	+
269	+	#define optflag_addl(v, s, d) do { \
270	+	__asm__ __volatile__ ("addl %k1,%k0\n\t" \
271	+	ASM_LAHF "\n\t" \
272	+	"seto %%al\n\t" \
273	+	"movb %%al,regflags\n\t" \
274	+	"movb %%ah,regflags+1\n\t" \
275	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
276	+	COPY_CARRY; \
277	+	} while (0)
278	+
279	+	#define optflag_addw(v, s, d) do { \
280	+	__asm__ __volatile__ ("addw %w1,%w0\n\t" \
281	+	ASM_LAHF "\n\t" \
282	+	"seto %%al\n\t" \
283	+	"movb %%al,regflags\n\t" \
284	+	"movb %%ah,regflags+1\n\t" \
285	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
286	+	COPY_CARRY; \
287	+	} while (0)
288	+
289	+	#define optflag_addb(v, s, d) do { \
290	+	__asm__ __volatile__ ("addb %b1,%b0\n\t" \
291	+	ASM_LAHF "\n\t" \
292	+	"seto %%al\n\t" \
293	+	"movb %%al,regflags\n\t" \
294	+	"movb %%ah,regflags+1\n\t" \
295	+	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
296	+	COPY_CARRY; \
297	+	} while (0)
298	+
299	+	#define optflag_subl(v, s, d) do { \
300	+	__asm__ __volatile__ ("subl %k1,%k0\n\t" \
301	+	ASM_LAHF "\n\t" \
302	+	"seto %%al\n\t" \
303	+	"movb %%al,regflags\n\t" \
304	+	"movb %%ah,regflags+1\n\t" \
305	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
306	+	COPY_CARRY; \
307	+	} while (0)
308
309	<	#define M68K_FLAGS_ALL          regflags.all
309	>	#define optflag_subw(v, s, d) do { \
310	>	__asm__ __volatile__ ("subw %w1,%w0\n\t" \
311	>	ASM_LAHF "\n\t" \
312	>	"seto %%al\n\t" \
313	>	"movb %%al,regflags\n\t" \
314	>	"movb %%ah,regflags+1\n\t" \
315	>	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
316	>	COPY_CARRY; \
317	>	} while (0)
318
319	<	#define SET_ZFLG(y)     (M68K_FLAGS_ALL = (M68K_FLAGS_ALL & ~0x01) | ((y) & 1))
320	<	#define SET_CFLG(y)     (M68K_FLAGS_ALL = (M68K_FLAGS_ALL & ~0x02) | (((y) & 1) << 1))
321	<	#define SET_XFLG(y)     (M68K_FLAGS_ALL = (M68K_FLAGS_ALL & ~0x200)| (((y) & 1) << 9))
322	<	#define SET_VFLG(y)     (M68K_FLAGS_ALL = (M68K_FLAGS_ALL & ~0x10) | (((y) & 1) << 4))
323	<	#define SET_NFLG(y)     (M68K_FLAGS_ALL = (M68K_FLAGS_ALL & ~0x80) | (((y) & 1) << 7))
324	<
325	<	#define GET_ZFLG        (M68K_FLAGS_ALL & 1)
326	<	#define GET_CFLG        ((M68K_FLAGS_ALL >> 1) & 1)
327	<	#define GET_XFLG        ((M68K_FLAGS_ALL >> 9) & 1)
190	<	#define GET_VFLG        ((M68K_FLAGS_ALL >> 4) & 1)
191	<	#define GET_NFLG        ((M68K_FLAGS_ALL >> 7) & 1)
319	>	#define optflag_subb(v, s, d) do { \
320	>	__asm__ __volatile__ ("subb %b1,%b0\n\t" \
321	>	ASM_LAHF "\n\t" \
322	>	"seto %%al\n\t" \
323	>	"movb %%al,regflags\n\t" \
324	>	"movb %%ah,regflags+1\n\t" \
325	>	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
326	>	COPY_CARRY; \
327	>	} while (0)
328
329	<	#define CLEAR_CZNV      (M68K_FLAGS_NZVC = 0)
330	<	#define COPY_CARRY      (M68K_FLAGS_X = M68K_FLAGS_NZVC)
329	>	#define optflag_cmpl(s, d) \
330	>	__asm__ __volatile__ ("cmpl %k0,%k1\n\t" \
331	>	ASM_LAHF "\n\t" \
332	>	"seto %%al\n\t" \
333	>	"movb %%al,regflags\n\t" \
334	>	"movb %%ah,regflags+1\n\t" \
335	>	: : "rmi" (s), "r" (d) : "%eax","cc","memory")
336	>
337	>	#define optflag_cmpw(s, d) \
338	>	__asm__ __volatile__ ("cmpw %w0,%w1\n\t" \
339	>	ASM_LAHF "\n\t" \
340	>	"seto %%al\n\t" \
341	>	"movb %%al,regflags\n\t" \
342	>	"movb %%ah,regflags+1\n\t" \
343	>	: : "rmi" (s), "r" (d) : "%eax","cc","memory");
344	>
345	>	#define optflag_cmpb(s, d) \
346	>	__asm__ __volatile__ ("cmpb %b0,%b1\n\t" \
347	>	ASM_LAHF "\n\t" \
348	>	"seto %%al\n\t" \
349	>	"movb %%al,regflags\n\t" \
350	>	"movb %%ah,regflags+1\n\t" \
351	>	: : "qmi" (s), "q" (d) : "%eax","cc","memory")
352
353		#endif
354
355	+	#elif defined(__sparc__) && (defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY))
356	+
357	+	struct flag_struct {
358	+	unsigned char nzvc;
359	+	unsigned char x;
360	+	};
361	+
362	+	extern struct flag_struct regflags;
363	+
364	+	#define FLAGVAL_Z       0x04
365	+	#define FLAGVAL_N       0x08
366	+
367	+	#define SET_ZFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x04) | (((y) & 1) << 2))
368	+	#define SET_CFLG(y)     (regflags.nzvc = (regflags.nzvc & ~1) | ((y) & 1))
369	+	#define SET_VFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x02) | (((y) & 1) << 1))
370	+	#define SET_NFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x08) | (((y) & 1) << 3))
371	+	#define SET_XFLG(y)     (regflags.x = (y))
372	+
373	+	#define GET_ZFLG        ((regflags.nzvc >> 2) & 1)
374	+	#define GET_CFLG        (regflags.nzvc & 1)
375	+	#define GET_VFLG        ((regflags.nzvc >> 1) & 1)
376	+	#define GET_NFLG        ((regflags.nzvc >> 3) & 1)
377	+	#define GET_XFLG        (regflags.x & 1)
378	+
379	+	#define CLEAR_CZNV      (regflags.nzvc = 0)
380	+	#define GET_CZNV        (reflags.nzvc)
381	+	#define IOR_CZNV(X)     (refglags.nzvc |= (X))
382	+	#define SET_CZNV(X)     (regflags.nzvc = (X))
383	+
384	+	#define COPY_CARRY (regflags.x = regflags.nzvc)
385	+
386		static __inline__ int cctrue(int cc)
387		{
388	<	uae_u32 nzvc = M68K_FLAGS_NZVC;
388	>	uae_u32 nzvc = regflags.nzvc;
389		switch(cc){
390	<	case 0: return 1;                                          /* T */
391	<	case 1: return 0;                                          /* F */
392	<	case 2: return (nzvc & 0x03) == 0;         /* !GET_CFLG && !GET_ZFLG;  HI */
393	<	case 3: return (nzvc & 0x03) != 0;         /* GET_CFLG || GET_ZFLG;    LS */
394	<	case 4: return (nzvc & 0x02) == 0;         /* !GET_CFLG;               CC */
395	<	case 5: return (nzvc & 0x02) != 0;         /* GET_CFLG;                CS */
396	<	case 6: return (nzvc & 0x01) == 0;         /* !GET_ZFLG;               NE */
397	<	case 7: return (nzvc & 0x01) != 0;         /* GET_ZFLG;                EQ */
398	<	case 8: return (nzvc & 0x10) == 0;         /* !GET_VFLG;               VC */
399	<	case 9: return (nzvc & 0x10) != 0;         /* GET_VFLG;                VS */
400	<	case 10:return (nzvc & 0x80) == 0;         /* !GET_NFLG;               PL */
401	<	case 11:return (nzvc & 0x80) != 0;         /* GET_NFLG;                MI */
402	<	case 12:return (((nzvc << 3) ^ nzvc) & 0x80) == 0; /* GET_NFLG == GET_VFLG;             GE */
403	<	case 13:return (((nzvc << 3) ^ nzvc) & 0x80) != 0; /* GET_NFLG != GET_VFLG;             LT */
390	>	case 0: return 1;                       /* T */
391	>	case 1: return 0;                       /* F */
392	>	case 2: return (nzvc & 0x05) == 0; /* !GET_CFLG && !GET_ZFLG;  HI */
393	>	case 3: return (nzvc & 0x05) != 0; /* GET_CFLG || GET_ZFLG;    LS */
394	>	case 4: return (nzvc & 1) == 0;        /* !GET_CFLG;               CC */
395	>	case 5: return (nzvc & 1) != 0;           /* GET_CFLG;                CS */
396	>	case 6: return (nzvc & 0x04) == 0; /* !GET_ZFLG;               NE */
397	>	case 7: return (nzvc & 0x04) != 0; /* GET_ZFLG;                EQ */
398	>	case 8: return (nzvc & 0x02) == 0;/* !GET_VFLG;               VC */
399	>	case 9: return (nzvc & 0x02) != 0;/* GET_VFLG;                VS */
400	>	case 10:return (nzvc & 0x08) == 0; /* !GET_NFLG;               PL */
401	>	case 11:return (nzvc & 0x08) != 0; /* GET_NFLG;                MI */
402	>	case 12:return (((nzvc << 2) ^ nzvc) & 0x08) == 0; /* GET_NFLG == GET_VFLG;             GE */
403	>	case 13:return (((nzvc << 2) ^ nzvc) & 0x08) != 0;/* GET_NFLG != GET_VFLG;             LT */
404		case 14:
405	<	/*      N--V--CZ shifted by 3 leads to V--CZ--- */
406	<	return (((nzvc << 3) ^ nzvc) & 0x88) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG);  GT */
405	>	nzvc &= 0x0e;
406	>	return (((nzvc << 2) ^ nzvc) & 0x0c) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG);  GT */
407		case 15:
408	<	return (((nzvc << 3) ^ nzvc) & 0x88) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG);   LE */
408	>	nzvc &= 0x0e;
409	>	return (((nzvc << 2) ^ nzvc) & 0x0c) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG);   LE */
410		}
411		return 0;
412		}
413
414		#ifdef SPARC_V8_ASSEMBLY
415
416	<	static inline char *str_flags(void)
228	<	{
229	<	static char str[8];
230	<	sprintf(str, "%c%c%c%c%c",
231	<	GET_XFLG ? 'X' : '-',
232	<	GET_NFLG ? 'N' : '-',
233	<	GET_ZFLG ? 'Z' : '-',
234	<	GET_VFLG ? 'V' : '-',
235	<	GET_CFLG ? 'C' : '-'
236	<	);
237	<	return str;
238	<	}
239	<
240	<	static inline uae_u32 sparc_v8_flag_add_8(flags_addr pflags, uae_u32 src, uae_u32 dst)
416	>	static inline uae_u32 sparc_v8_flag_add_8(flag_struct *flags, uae_u32 src, uae_u32 dst)
417		{
418		uae_u32 value;
419		__asm__ ("\n"
420		"       sll             %2, 24, %%o0\n"
421		"       sll             %3, 24, %%o1\n"
422		"       addcc   %%o0, %%o1, %%o0\n"
423	<	"       subx    %%g0, %%g0, %%o1\n"
424	<	"       srl             %%o0, 24, %0            ! 8-bit result\n"
425	<	"       and             %%o1, 0x202, %%o1       ! X, C flags\n"
426	<	"       and             %0, 0x80, %%o0\n"
427	<	"       or              %%o1, %%o0, %%o1        ! N flag\n"
428	<	"       subcc   %%g0, %0, %%g0\n"
429	<	"       subx    %%o1, -1, %%o1          ! Z flag\n"
423	>	"       addx    %%g0, %%g0, %%o1        ! X,C flags\n"
424	>	"       srl             %%o0, 24, %0\n"
425	>	"       stb             %%o1, [%1 + 1]\n"
426	>	"       bl,a    .+8\n"
427	>	"       or              %%o1, 0x08, %%o1        ! N flag\n"
428	>	"       bz,a    .+8\n"
429	>	"       or              %%o1, 0x04, %%o1        ! Z flag\n"
430		"       bvs,a   .+8\n"
431	<	"       or              %%o1, 0x10, %%o1        ! V flag\n"
432	<	"       sth             %%o1, [%1]\n"
431	>	"       or              %%o1, 0x02, %%o1        ! V flag\n"
432	>	"       stb             %%o1, [%1]\n"
433		:       "=&r" (value)
434	<	:       "r" (pflags), "r" (dst), "r" (src), "0" (value)
434	>	:       "r" (flags), "r" (dst), "r" (src)
435		:       "cc", "o0", "o1"
436		);
261	–
262	–	//      printf("%d + %d = %d (flags = %s)\n", dst, src, value, str_flags());
437		return value;
438		}
439
440	<	static inline uae_u32 sparc_v8_flag_add_16(flags_addr pflags, uae_u32 src, uae_u32 dst)
440	>	static inline uae_u32 sparc_v8_flag_add_16(flag_struct *flags, uae_u32 src, uae_u32 dst)
441		{
442		uae_u32 value;
443		__asm__ ("\n"
444		"       sll             %2, 16, %%o0\n"
445		"       sll             %3, 16, %%o1\n"
446		"       addcc   %%o0, %%o1, %%o0\n"
447	<	"       subx    %%g0, %%g0, %%o1\n"
448	<	"       srl             %%o0, 16, %0            ! 16-bit result\n"
449	<	"       and             %%o1, 0x202, %%o1       ! X, C flags\n"
450	<	"       sra             %%o0, 24, %%o0\n"
451	<	"       and             %%o0, 0x80, %%o0\n"
452	<	"       or              %%o1, %%o0, %%o1        ! N flag\n"
453	<	"       subcc   %%g0, %0, %%g0\n"
280	<	"       subx    %%o1, -1, %%o1          ! Z flag\n"
447	>	"       addx    %%g0, %%g0, %%o1        ! X,C flags\n"
448	>	"       srl             %%o0, 16, %0\n"
449	>	"       stb             %%o1, [%1 + 1]\n"
450	>	"       bl,a    .+8\n"
451	>	"       or              %%o1, 0x08, %%o1        ! N flag\n"
452	>	"       bz,a    .+8\n"
453	>	"       or              %%o1, 0x04, %%o1        ! Z flag\n"
454		"       bvs,a   .+8\n"
455	<	"       or              %%o1, 0x10, %%o1        ! V flag\n"
456	<	"       sth             %%o1, [%1]\n"
455	>	"       or              %%o1, 0x02, %%o1        ! V flag\n"
456	>	"       stb             %%o1, [%1]\n"
457		:       "=&r" (value)
458	<	:       "r" (pflags), "r" (dst), "r" (src), "0" (value)
458	>	:       "r" (flags), "r" (dst), "r" (src)
459		:       "cc", "o0", "o1"
460		);
461		return value;
462		}
463
464	<	static inline uae_u32 sparc_v8_flag_add_32(flags_addr pflags, uae_u32 src, uae_u32 dst)
464	>	static inline uae_u32 sparc_v8_flag_add_32(flag_struct *flags, uae_u32 src, uae_u32 dst)
465		{
466		uae_u32 value;
467		__asm__ ("\n"
468		"       addcc   %2, %3, %0\n"
469	<	"       subx    %%g0, %%g0, %%o0\n"
470	<	"       sra             %0, 24, %%o1\n"
471	<	"       and             %%o0, 0x202, %%o0       ! X, C flags\n"
472	<	"       and             %%o1, 0x80, %%o1\n"
473	<	"       or              %%o0, %%o1, %%o0        ! N flag\n"
474	<	"       subcc   %%g0, %0, %%g0\n"
302	<	"       subx    %%o0, -1, %%o0          ! Z flag\n"
469	>	"       addx    %%g0, %%g0, %%o0        ! X,C flags\n"
470	>	"       stb             %%o0, [%1 + 1]\n"
471	>	"       bl,a    .+8\n"
472	>	"       or              %%o0, 0x08, %%o0        ! N flag\n"
473	>	"       bz,a    .+8\n"
474	>	"       or              %%o0, 0x04, %%o0        ! Z flag\n"
475		"       bvs,a   .+8\n"
476	<	"       or              %%o0, 0x10, %%o0        ! V flag\n"
477	<	"       sth             %%o0, [%1]\n"
476	>	"       or              %%o0, 0x02, %%o0        ! V flag\n"
477	>	"       stb             %%o0, [%1]\n"
478		:       "=&r" (value)
479	<	:       "r" (pflags), "r" (dst), "r" (src), "0" (value)
480	<	:       "cc", "o0", "o1"
479	>	:       "r" (flags), "r" (dst), "r" (src)
480	>	:       "cc", "o0"
481		);
482		return value;
483		}
#	Line 439 | Line 611 | static inline void sparc_v8_flag_cmp_32(
611		);
612		}
613
614	+	static inline uae_u32 sparc_v8_flag_addx_8(flag_struct *flags, uae_u32 src, uae_u32 dst)
615	+	{
616	+	uae_u32 value;
617	+	__asm__ ("\n"
618	+	"       ldub    [%1 + 1], %%o1          ! Get the X Flag\n"
619	+	"       subcc   %%g0, %%o1, %%g0        ! Set the SPARC carry flag, if X set\n"
620	+	"       addxcc  %2, %3, %0\n"
621	+	:       "=&r" (value)
622	+	:       "r" (flags), "r" (dst), "r" (src)
623	+	:       "cc", "o0", "o1"
624	+	);
625	+	return value;
626	+	}
627	+
628	+	#if 0
629	+	VERY SLOW...
630	+	static inline uae_u32 sparc_v8_flag_addx_8(flag_struct *flags, uae_u32 src, uae_u32 dst)
631	+	{
632	+	uae_u32 value;
633	+	__asm__ ("\n"
634	+	"       sll             %2, 24, %%o0\n"
635	+	"       sll             %3, 24, %%o1\n"
636	+	"       addcc   %%o0, %%o1, %%o0\n"
637	+	"       addx    %%g0, %%g0, %%o1        ! X,C flags\n"
638	+	"       bvs,a   .+8\n"
639	+	"       or              %%o1, 0x02, %%o1        ! V flag\n"
640	+	"       ldub    [%1 + 1], %%o2\n"
641	+	"       subcc   %%g0, %%o2, %%g0\n"
642	+	"       addx    %%g0, %%g0, %%o2\n"
643	+	"       sll             %%o2, 24, %%o2\n"
644	+	"       addcc   %%o0, %%o2, %%o0\n"
645	+	"       srl             %%o0, 24, %0\n"
646	+	"       addx    %%g0, %%g0, %%o2\n"
647	+	"       or              %%o1, %%o2, %%o1        ! update X,C flags\n"
648	+	"       bl,a    .+8\n"
649	+	"       or              %%o1, 0x08, %%o1        ! N flag\n"
650	+	"       ldub    [%1], %%o0                      ! retreive the old NZVC flags (XXX)\n"
651	+	"       bvs,a   .+8\n"
652	+	"       or              %%o1, 0x02, %%o1        ! update V flag\n"
653	+	"       and             %%o0, 0x04, %%o0        ! (XXX) but keep only Z flag\n"
654	+	"       and             %%o1, 1, %%o2           ! keep C flag in %%o2\n"
655	+	"       bnz,a   .+8\n"
656	+	"       or              %%g0, %%g0, %%o0        ! Z flag cleared if non-zero result\n"
657	+	"       stb             %%o2, [%1 + 1]          ! store the X flag\n"
658	+	"       or              %%o1, %%o0, %%o1\n"
659	+	"       stb             %%o1, [%1]\n"
660	+	:       "=&r" (value)
661	+	:       "r" (flags), "r" (dst), "r" (src)
662	+	:       "cc", "o0", "o1", "o2"
663	+	);
664	+	return value;
665	+	}
666	+	#endif
667	+
668	+	static inline uae_u32 sparc_v8_flag_addx_32(flag_struct *flags, uae_u32 src, uae_u32 dst)
669	+	{
670	+	uae_u32 value;
671	+	__asm__ ("\n"
672	+	"       ldub    [%1 + 1], %%o0          ! Get the X Flag\n"
673	+	"       subcc   %%g0, %%o0, %%g0        ! Set the SPARC carry flag, if X set\n"
674	+	"       addxcc  %2, %3, %0\n"
675	+	"       ldub    [%1], %%o0                      ! retreive the old NZVC flags\n"
676	+	"       and             %%o0, 0x04, %%o0        ! but keep only Z flag\n"
677	+	"       addx    %%o0, %%g0, %%o0        ! X,C flags\n"
678	+	"       bl,a    .+8\n"
679	+	"       or              %%o0, 0x08, %%o0        ! N flag\n"
680	+	"       bvs,a   .+8\n"
681	+	"       or              %%o0, 0x02, %%o0        ! V flag\n"
682	+	"       bnz,a   .+8\n"
683	+	"       and             %%o0, 0x0B, %%o0        ! Z flag cleared if result is non-zero\n"
684	+	"       stb             %%o0, [%1]\n"
685	+	"       stb             %%o0, [%1 + 1]\n"
686	+	:       "=&r" (value)
687	+	:       "r" (flags), "r" (dst), "r" (src)
688	+	:       "cc", "o0"
689	+	);
690	+	return value;
691	+	}
692	+
693		#endif /* SPARC_V8_ASSEMBLY */
694
695		#ifdef SPARC_V9_ASSEMBLY
#	Line 753 | Line 1004 | static inline uae_u32 sparc_v9_flag_addx
1004
1005		#endif /* SPARC_V9_ASSEMBLY */
1006
1007	+	#endif
1008	+
1009		#else
1010
1011		struct flag_struct {
#	Line 771 | Line 1024 | extern struct flag_struct regflags;
1024		#define VFLG (regflags.v)
1025		#define XFLG (regflags.x)
1026
1027	+	#define SET_CFLG(x) (CFLG = (x))
1028	+	#define SET_NFLG(x) (NFLG = (x))
1029	+	#define SET_VFLG(x) (VFLG = (x))
1030	+	#define SET_ZFLG(x) (ZFLG = (x))
1031	+	#define SET_XFLG(x) (XFLG = (x))
1032	+
1033	+	#define GET_CFLG CFLG
1034	+	#define GET_NFLG NFLG
1035	+	#define GET_VFLG VFLG
1036	+	#define GET_ZFLG ZFLG
1037	+	#define GET_XFLG XFLG
1038	+
1039	+	#define CLEAR_CZNV do { \
1040	+	SET_CFLG (0); \
1041	+	SET_ZFLG (0); \
1042	+	SET_NFLG (0); \
1043	+	SET_VFLG (0); \
1044	+	} while (0)
1045	+
1046	+	#define COPY_CARRY (SET_XFLG (GET_CFLG))
1047	+
1048		static __inline__ int cctrue(const int cc)
1049		{
1050		switch(cc){
#	Line 794 | Line 1068 | static __inline__ int cctrue(const int c
1068		return 0;
1069		}
1070
1071	<	#endif
1071	>	#endif /* OPTIMIZED_FLAGS */
1072	>
1073	>	#endif /* M68K_FLAGS_H */

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