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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.6
Committed: 1999-10-28T15:33:20Z (25 years, 1 month ago) by cebix
Content type: text/plain
Branch: MAIN
Changes since 1.5: +25 -5 lines
Log Message:
- added some 68040 instructions: CINV, CPUSH, MOVE16 (Ax)+,(Ay)+, MOVEC regs,
  and FPU state frames; enough to boot MacOS
- CPU type can be selected in GTK prefs editor

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation generator
5 *
6 * This is a fairly stupid program that generates a lot of case labels that
7 * can be #included in a switch statement.
8 * As an alternative, it can generate functions that handle specific
9 * MC68000 instructions, plus a prototype header file and a function pointer
10 * array to look up the function for an opcode.
11 * Error checking is bad, an illegal table68k file will cause the program to
12 * call abort().
13 * The generated code is sometimes sub-optimal, an optimizing compiler should
14 * take care of this.
15 *
16 * Copyright 1995, 1996 Bernd Schmidt
17 */
18
19 #include <ctype.h>
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23
24 #include "sysdeps.h"
25 #include "readcpu.h"
26
27 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28 #define SPARC_ASSEMBLY 0
29 #endif
30
31 #define BOOL_TYPE "int"
32
33 static FILE *headerfile;
34 static FILE *stblfile;
35
36 static int using_prefetch;
37 static int using_exception_3;
38 static int cpu_level;
39
40 /* For the current opcode, the next lower level that will have different code.
41 * Initialized to -1 for each opcode. If it remains unchanged, indicates we
42 * are done with that opcode. */
43 static int next_cpu_level;
44
45 static int *opcode_map;
46 static int *opcode_next_clev;
47 static int *opcode_last_postfix;
48 static unsigned long *counts;
49
50 static void read_counts (void)
51 {
52 FILE *file;
53 unsigned long opcode, count, total;
54 char name[20];
55 int nr = 0;
56 memset (counts, 0, 65536 * sizeof *counts);
57
58 file = fopen ("frequent.68k", "r");
59 if (file) {
60 fscanf (file, "Total: %lu\n", &total);
61 while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
62 opcode_next_clev[nr] = 4;
63 opcode_last_postfix[nr] = -1;
64 opcode_map[nr++] = opcode;
65 counts[opcode] = count;
66 }
67 fclose (file);
68 }
69 if (nr == nr_cpuop_funcs)
70 return;
71 for (opcode = 0; opcode < 0x10000; opcode++) {
72 if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
73 && counts[opcode] == 0)
74 {
75 opcode_next_clev[nr] = 4;
76 opcode_last_postfix[nr] = -1;
77 opcode_map[nr++] = opcode;
78 counts[opcode] = count;
79 }
80 }
81 if (nr != nr_cpuop_funcs)
82 abort ();
83 }
84
85 static char endlabelstr[80];
86 static int endlabelno = 0;
87 static int need_endlabel;
88
89 static int n_braces = 0;
90 static int m68k_pc_offset = 0;
91 static int insn_n_cycles;
92
93 static void start_brace (void)
94 {
95 n_braces++;
96 printf ("{");
97 }
98
99 static void close_brace (void)
100 {
101 assert (n_braces > 0);
102 n_braces--;
103 printf ("}");
104 }
105
106 static void finish_braces (void)
107 {
108 while (n_braces > 0)
109 close_brace ();
110 }
111
112 static void pop_braces (int to)
113 {
114 while (n_braces > to)
115 close_brace ();
116 }
117
118 static int bit_size (int size)
119 {
120 switch (size) {
121 case sz_byte: return 8;
122 case sz_word: return 16;
123 case sz_long: return 32;
124 default: abort ();
125 }
126 return 0;
127 }
128
129 static const char *bit_mask (int size)
130 {
131 switch (size) {
132 case sz_byte: return "0xff";
133 case sz_word: return "0xffff";
134 case sz_long: return "0xffffffff";
135 default: abort ();
136 }
137 return 0;
138 }
139
140 static const char *gen_nextilong (void)
141 {
142 static char buffer[80];
143 int r = m68k_pc_offset;
144 m68k_pc_offset += 4;
145
146 insn_n_cycles += 4;
147
148 if (using_prefetch)
149 sprintf (buffer, "get_ilong_prefetch(%d)", r);
150 else
151 sprintf (buffer, "get_ilong(%d)", r);
152 return buffer;
153 }
154
155 static const char *gen_nextiword (void)
156 {
157 static char buffer[80];
158 int r = m68k_pc_offset;
159 m68k_pc_offset += 2;
160
161 insn_n_cycles += 2;
162
163 if (using_prefetch)
164 sprintf (buffer, "get_iword_prefetch(%d)", r);
165 else
166 sprintf (buffer, "get_iword(%d)", r);
167 return buffer;
168 }
169
170 static const char *gen_nextibyte (void)
171 {
172 static char buffer[80];
173 int r = m68k_pc_offset;
174 m68k_pc_offset += 2;
175
176 insn_n_cycles += 2;
177
178 if (using_prefetch)
179 sprintf (buffer, "get_ibyte_prefetch(%d)", r);
180 else
181 sprintf (buffer, "get_ibyte(%d)", r);
182 return buffer;
183 }
184
185 static void fill_prefetch_0 (void)
186 {
187 if (using_prefetch)
188 printf ("fill_prefetch_0 ();\n");
189 }
190
191 static void fill_prefetch_2 (void)
192 {
193 if (using_prefetch)
194 printf ("fill_prefetch_2 ();\n");
195 }
196
197 static void swap_opcode (void)
198 {
199 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
200 printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
201 printf ("#endif\n");
202 }
203
204 static void sync_m68k_pc (void)
205 {
206 if (m68k_pc_offset == 0)
207 return;
208 printf ("m68k_incpc(%d);\n", m68k_pc_offset);
209 switch (m68k_pc_offset) {
210 case 0:
211 /*fprintf (stderr, "refilling prefetch at 0\n"); */
212 break;
213 case 2:
214 fill_prefetch_2 ();
215 break;
216 default:
217 fill_prefetch_0 ();
218 break;
219 }
220 m68k_pc_offset = 0;
221 }
222
223 /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224 * the calling routine handles Apdi and Aipi modes. */
225 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
226 {
227 start_brace ();
228 switch (mode) {
229 case Dreg:
230 if (movem)
231 abort ();
232 if (getv == 1)
233 switch (size) {
234 case sz_byte:
235 #ifdef AMIGA
236 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
237 /* if it is not done like that: */
238 printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
239 #else
240 printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
241 #endif
242 break;
243 case sz_word:
244 #ifdef AMIGA
245 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
246 #else
247 printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
248 #endif
249 break;
250 case sz_long:
251 printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
252 break;
253 default:
254 abort ();
255 }
256 return;
257 case Areg:
258 if (movem)
259 abort ();
260 if (getv == 1)
261 switch (size) {
262 case sz_word:
263 printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
264 break;
265 case sz_long:
266 printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
267 break;
268 default:
269 abort ();
270 }
271 return;
272 case Aind:
273 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
274 break;
275 case Aipi:
276 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
277 break;
278 case Apdi:
279 switch (size) {
280 case sz_byte:
281 if (movem)
282 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
283 else
284 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
285 break;
286 case sz_word:
287 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
288 break;
289 case sz_long:
290 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
291 break;
292 default:
293 abort ();
294 }
295 break;
296 case Ad16:
297 printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
298 break;
299 case Ad8r:
300 if (cpu_level > 1) {
301 if (next_cpu_level < 1)
302 next_cpu_level = 1;
303 sync_m68k_pc ();
304 start_brace ();
305 printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
306 } else
307 printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
308
309 break;
310 case PC16:
311 printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
312 printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
313 break;
314 case PC8r:
315 if (cpu_level > 1) {
316 if (next_cpu_level < 1)
317 next_cpu_level = 1;
318 sync_m68k_pc ();
319 start_brace ();
320 printf ("\tuaecptr tmppc = m68k_getpc();\n");
321 printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
322 } else {
323 printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
324 printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
325 }
326
327 break;
328 case absw:
329 printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
330 break;
331 case absl:
332 printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
333 break;
334 case imm:
335 if (getv != 1)
336 abort ();
337 switch (size) {
338 case sz_byte:
339 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
340 break;
341 case sz_word:
342 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
343 break;
344 case sz_long:
345 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
346 break;
347 default:
348 abort ();
349 }
350 return;
351 case imm0:
352 if (getv != 1)
353 abort ();
354 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
355 return;
356 case imm1:
357 if (getv != 1)
358 abort ();
359 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
360 return;
361 case imm2:
362 if (getv != 1)
363 abort ();
364 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
365 return;
366 case immi:
367 if (getv != 1)
368 abort ();
369 printf ("\tuae_u32 %s = %s;\n", name, reg);
370 return;
371 default:
372 abort ();
373 }
374
375 /* We get here for all non-reg non-immediate addressing modes to
376 * actually fetch the value. */
377
378 if (using_exception_3 && getv != 0 && size != sz_byte) {
379 printf ("\tif ((%sa & 1) != 0) {\n", name);
380 printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
381 printf ("\t\tlast_op_for_exception_3 = opcode;\n");
382 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
383 printf ("\t\tException(3, 0);\n");
384 printf ("\t\tgoto %s;\n", endlabelstr);
385 printf ("\t}\n");
386 need_endlabel = 1;
387 start_brace ();
388 }
389
390 if (getv == 1) {
391 switch (size) {
392 case sz_byte: insn_n_cycles += 2; break;
393 case sz_word: insn_n_cycles += 2; break;
394 case sz_long: insn_n_cycles += 4; break;
395 default: abort ();
396 }
397 start_brace ();
398 switch (size) {
399 case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
400 case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
401 case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
402 default: abort ();
403 }
404 }
405
406 /* We now might have to fix up the register for pre-dec or post-inc
407 * addressing modes. */
408 if (!movem)
409 switch (mode) {
410 case Aipi:
411 switch (size) {
412 case sz_byte:
413 printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
414 break;
415 case sz_word:
416 printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
417 break;
418 case sz_long:
419 printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
420 break;
421 default:
422 abort ();
423 }
424 break;
425 case Apdi:
426 printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
427 break;
428 default:
429 break;
430 }
431 }
432
433 static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
434 {
435 switch (mode) {
436 case Dreg:
437 switch (size) {
438 case sz_byte:
439 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
440 break;
441 case sz_word:
442 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
443 break;
444 case sz_long:
445 printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
446 break;
447 default:
448 abort ();
449 }
450 break;
451 case Areg:
452 switch (size) {
453 case sz_word:
454 fprintf (stderr, "Foo\n");
455 printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
456 break;
457 case sz_long:
458 printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
459 break;
460 default:
461 abort ();
462 }
463 break;
464 case Aind:
465 case Aipi:
466 case Apdi:
467 case Ad16:
468 case Ad8r:
469 case absw:
470 case absl:
471 case PC16:
472 case PC8r:
473 if (using_prefetch)
474 sync_m68k_pc ();
475 switch (size) {
476 case sz_byte:
477 insn_n_cycles += 2;
478 printf ("\tput_byte(%sa,%s);\n", to, from);
479 break;
480 case sz_word:
481 insn_n_cycles += 2;
482 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
483 abort ();
484 printf ("\tput_word(%sa,%s);\n", to, from);
485 break;
486 case sz_long:
487 insn_n_cycles += 4;
488 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
489 abort ();
490 printf ("\tput_long(%sa,%s);\n", to, from);
491 break;
492 default:
493 abort ();
494 }
495 break;
496 case imm:
497 case imm0:
498 case imm1:
499 case imm2:
500 case immi:
501 abort ();
502 break;
503 default:
504 abort ();
505 }
506 }
507
508 static void genmovemel (uae_u16 opcode)
509 {
510 char getcode[100];
511 int size = table68k[opcode].size == sz_long ? 4 : 2;
512
513 if (table68k[opcode].size == sz_long) {
514 strcpy (getcode, "get_long(srca)");
515 } else {
516 strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
517 }
518
519 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
520 printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
521 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
522 start_brace ();
523 printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
524 getcode, size);
525 printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
526 getcode, size);
527
528 if (table68k[opcode].dmode == Aipi)
529 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
530 }
531
532 static void genmovemle (uae_u16 opcode)
533 {
534 char putcode[100];
535 int size = table68k[opcode].size == sz_long ? 4 : 2;
536 if (table68k[opcode].size == sz_long) {
537 strcpy (putcode, "put_long(srca,");
538 } else {
539 strcpy (putcode, "put_word(srca,");
540 }
541
542 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
543 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
544 if (using_prefetch)
545 sync_m68k_pc ();
546
547 start_brace ();
548 if (table68k[opcode].dmode == Apdi) {
549 printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
550 printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
551 size, putcode);
552 printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
553 size, putcode);
554 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
555 } else {
556 printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
557 printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
558 putcode, size);
559 printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
560 putcode, size);
561 }
562 }
563
564 static void duplicate_carry (void)
565 {
566 printf ("\tCOPY_CARRY;\n");
567 }
568
569 typedef enum {
570 flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
571 flag_av, flag_sv
572 } flagtypes;
573
574 static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
575 {
576 char vstr[100], sstr[100], dstr[100];
577 char usstr[100], udstr[100];
578 char unsstr[100], undstr[100];
579
580 switch (size) {
581 case sz_byte:
582 strcpy (vstr, "((uae_s8)(");
583 strcpy (usstr, "((uae_u8)(");
584 break;
585 case sz_word:
586 strcpy (vstr, "((uae_s16)(");
587 strcpy (usstr, "((uae_u16)(");
588 break;
589 case sz_long:
590 strcpy (vstr, "((uae_s32)(");
591 strcpy (usstr, "((uae_u32)(");
592 break;
593 default:
594 abort ();
595 }
596 strcpy (unsstr, usstr);
597
598 strcpy (sstr, vstr);
599 strcpy (dstr, vstr);
600 strcat (vstr, value);
601 strcat (vstr, "))");
602 strcat (dstr, dst);
603 strcat (dstr, "))");
604 strcat (sstr, src);
605 strcat (sstr, "))");
606
607 strcpy (udstr, usstr);
608 strcat (udstr, dst);
609 strcat (udstr, "))");
610 strcat (usstr, src);
611 strcat (usstr, "))");
612
613 strcpy (undstr, unsstr);
614 strcat (unsstr, "-");
615 strcat (undstr, "~");
616 strcat (undstr, dst);
617 strcat (undstr, "))");
618 strcat (unsstr, src);
619 strcat (unsstr, "))");
620
621 switch (type) {
622 case flag_logical_noclobber:
623 case flag_logical:
624 case flag_zn:
625 case flag_av:
626 case flag_sv:
627 case flag_addx:
628 case flag_subx:
629 break;
630
631 case flag_add:
632 start_brace ();
633 printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
634 break;
635 case flag_sub:
636 case flag_cmp:
637 start_brace ();
638 printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
639 break;
640 }
641
642 switch (type) {
643 case flag_logical_noclobber:
644 case flag_logical:
645 case flag_zn:
646 break;
647
648 case flag_add:
649 case flag_sub:
650 case flag_addx:
651 case flag_subx:
652 case flag_cmp:
653 case flag_av:
654 case flag_sv:
655 start_brace ();
656 printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
657 printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
658 printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
659 break;
660 }
661
662 switch (type) {
663 case flag_logical:
664 printf ("\tCLEAR_CZNV;\n");
665 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
666 printf ("\tSET_NFLG (%s < 0);\n", vstr);
667 break;
668 case flag_logical_noclobber:
669 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
670 printf ("\tSET_NFLG (%s < 0);\n", vstr);
671 break;
672 case flag_av:
673 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
674 break;
675 case flag_sv:
676 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
677 break;
678 case flag_zn:
679 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
680 printf ("\tSET_NFLG (%s < 0);\n", vstr);
681 break;
682 case flag_add:
683 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
684 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
685 printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
686 duplicate_carry ();
687 printf ("\tSET_NFLG (flgn != 0);\n");
688 break;
689 case flag_sub:
690 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
691 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
692 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
693 duplicate_carry ();
694 printf ("\tSET_NFLG (flgn != 0);\n");
695 break;
696 case flag_addx:
697 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
698 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
699 duplicate_carry ();
700 break;
701 case flag_subx:
702 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
703 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
704 duplicate_carry ();
705 break;
706 case flag_cmp:
707 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
708 printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
709 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
710 printf ("\tSET_NFLG (flgn != 0);\n");
711 break;
712 }
713 }
714
715 static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
716 {
717 #ifdef SPARC_V8_ASSEMBLY
718 switch(type)
719 {
720 case flag_add:
721 start_brace();
722 printf("\tuae_u32 %s;\n", value);
723 switch(size)
724 {
725 case sz_byte:
726 printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
727 break;
728 case sz_word:
729 printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
730 break;
731 case sz_long:
732 printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
733 break;
734 }
735 return;
736
737 case flag_sub:
738 start_brace();
739 printf("\tuae_u32 %s;\n", value);
740 switch(size)
741 {
742 case sz_byte:
743 printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
744 break;
745 case sz_word:
746 printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
747 break;
748 case sz_long:
749 printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
750 break;
751 }
752 return;
753
754 case flag_cmp:
755 switch(size)
756 {
757 case sz_byte:
758 // printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
759 break;
760 case sz_word:
761 // printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
762 break;
763 case sz_long:
764 #if 1
765 printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
766 return;
767 #endif
768 break;
769 }
770 // return;
771 break;
772 }
773 #elif defined(SPARC_V9_ASSEMBLY)
774 switch(type)
775 {
776 case flag_add:
777 start_brace();
778 printf("\tuae_u32 %s;\n", value);
779 switch(size)
780 {
781 case sz_byte:
782 printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
783 break;
784 case sz_word:
785 printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
786 break;
787 case sz_long:
788 printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
789 break;
790 }
791 return;
792
793 case flag_sub:
794 start_brace();
795 printf("\tuae_u32 %s;\n", value);
796 switch(size)
797 {
798 case sz_byte:
799 printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
800 break;
801 case sz_word:
802 printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
803 break;
804 case sz_long:
805 printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
806 break;
807 }
808 return;
809
810 case flag_cmp:
811 switch(size)
812 {
813 case sz_byte:
814 printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
815 break;
816 case sz_word:
817 printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
818 break;
819 case sz_long:
820 printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
821 break;
822 }
823 return;
824
825 case flag_logical:
826 if (strcmp(value, "0") == 0) {
827 printf("\tregflags.nzvc = 0x04;\n");
828 } else {
829 switch(size) {
830 case sz_byte:
831 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
832 break;
833 case sz_word:
834 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
835 break;
836 case sz_long:
837 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
838 break;
839 }
840 }
841 return;
842
843 #if 0
844 case flag_logical_noclobber:
845 printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
846 if (strcmp(value, "0") == 0) {
847 printf("\tregflags.nzvc = old_flags | 0x04;\n");
848 } else {
849 switch(size) {
850 case sz_byte:
851 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
852 break;
853 case sz_word:
854 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
855 break;
856 case sz_long:
857 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
858 break;
859 }
860 printf("\tregflags.nzvc |= old_flags;\n");
861 }
862 printf("\t}\n");
863 return;
864 #endif
865 }
866 #elif defined(X86_ASSEMBLY)
867 switch (type) {
868 case flag_add:
869 case flag_sub:
870 start_brace ();
871 printf ("\tuae_u32 %s;\n", value);
872 break;
873
874 default:
875 break;
876 }
877
878 /* At least some of those casts are fairly important! */
879 switch (type) {
880 case flag_logical_noclobber:
881 printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
882 if (strcmp (value, "0") == 0) {
883 printf ("\tregflags.cznv = olcznv | 64;\n");
884 } else {
885 switch (size) {
886 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
887 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
888 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
889 }
890 printf ("\tregflags.cznv |= oldcznv;\n");
891 }
892 printf ("\t}\n");
893 return;
894 case flag_logical:
895 if (strcmp (value, "0") == 0) {
896 printf ("\tregflags.cznv = 64;\n");
897 } else {
898 switch (size) {
899 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
900 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
901 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
902 }
903 }
904 return;
905
906 case flag_add:
907 switch (size) {
908 case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
909 case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
910 case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
911 }
912 return;
913
914 case flag_sub:
915 switch (size) {
916 case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
917 case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
918 case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
919 }
920 return;
921
922 case flag_cmp:
923 switch (size) {
924 case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
925 case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
926 case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
927 }
928 return;
929
930 default:
931 break;
932 }
933 #elif defined(M68K_FLAG_OPT)
934 /* sam: here I'm cloning what X86_ASSEMBLY does */
935 #define EXT(size) (size==sz_byte?"b":(size==sz_word?"w":"l"))
936 #define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
937 switch (type) {
938 case flag_add:
939 case flag_sub:
940 start_brace ();
941 printf ("\tuae_u32 %s;\n", value);
942 break;
943
944 default:
945 break;
946 }
947
948 switch (type) {
949 case flag_logical:
950 if (strcmp (value, "0") == 0) {
951 printf ("\t*(uae_u16 *)&regflags = 4;\n"); /* Z = 1 */
952 } else {
953 printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
954 EXT (size), CAST (size), value);
955 }
956 return;
957
958 case flag_add:
959 printf ("\t{uae_u16 ccr;\n");
960 printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
961 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
962 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
963 return;
964
965 case flag_sub:
966 printf ("\t{uae_u16 ccr;\n");
967 printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
968 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
969 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
970 return;
971
972 case flag_cmp:
973 printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
974 EXT (size), CAST (size), src, CAST (size), dst);
975 return;
976
977 default:
978 break;
979 }
980 #elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
981 /*
982 * This is new. Might be quite buggy.
983 */
984 switch (type) {
985 case flag_av:
986 case flag_sv:
987 case flag_zn:
988 case flag_addx:
989 case flag_subx:
990 break;
991
992 case flag_logical:
993 if (strcmp (value, "0") == 0) {
994 /* v=c=n=0 z=1 */
995 printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
996 return;
997 } else {
998 start_brace ();
999 switch (size) {
1000 case sz_byte:
1001 printf ("\tUBYTE ccr;\n");
1002 printf ("\tULONG shift;\n");
1003 printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1004 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
1005 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1006 return;
1007 case sz_word:
1008 printf ("\tUBYTE ccr;\n");
1009 printf ("\tULONG shift;\n");
1010 printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1011 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
1012 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1013 return;
1014 case sz_long:
1015 printf ("\tUBYTE ccr;\n");
1016 printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1017 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
1018 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1019 return;
1020 }
1021 }
1022 break;
1023 case flag_add:
1024 if (strcmp (dst, "0") == 0) {
1025 printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
1026 } else {
1027 start_brace ();
1028 switch (size) {
1029 case sz_byte:
1030 printf ("\tULONG ccr, shift, %s;\n", value);
1031 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1032 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1033 printf ("\t*(ULONG*)&regflags = ccr;\n");
1034 return;
1035 case sz_word:
1036 printf ("\tULONG ccr, shift, %s;\n", value);
1037 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1038 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1039 printf ("\t*(ULONG*)&regflags = ccr;\n");
1040 return;
1041 case sz_long:
1042 printf ("\tULONG ccr, %s;\n", value);
1043 printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1044 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1045 printf ("\t*(ULONG*)&regflags = ccr;\n");
1046 return;
1047 }
1048 }
1049 break;
1050 case flag_sub:
1051 if (strcmp (dst, "0") == 0) {
1052 printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1053 } else {
1054 start_brace ();
1055 switch (size) {
1056 case sz_byte:
1057 printf ("\tULONG ccr, shift, %s;\n", value);
1058 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1059 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1060 printf ("\t*(ULONG*)&regflags = ccr;\n");
1061 return;
1062 case sz_word:
1063 printf ("\tULONG ccr, shift, %s;\n", value);
1064 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1065 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1066 printf ("\t*(ULONG*)&regflags = ccr;\n");
1067 return;
1068 case sz_long:
1069 printf ("\tULONG ccr, %s;\n", value);
1070 printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1071 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1072 printf ("\t*(ULONG*)&regflags = ccr;\n");
1073 return;
1074 }
1075 }
1076 break;
1077 case flag_cmp:
1078 if (strcmp (dst, "0") == 0) {
1079 printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1080 } else {
1081 start_brace ();
1082 switch (size) {
1083 case sz_byte:
1084 printf ("\tULONG shift, ccr;\n");
1085 printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1086 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1087 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1088 return;
1089 case sz_word:
1090 printf ("\tULONG shift, ccr;\n");
1091 printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1092 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1093 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1094 return;
1095 case sz_long:
1096 printf ("\tULONG ccr;\n");
1097 printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1098 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1099 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1100 /*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1101 return;
1102 }
1103 }
1104 break;
1105 }
1106 #endif
1107 genflags_normal (type, size, value, src, dst);
1108 }
1109
1110 static void force_range_for_rox (const char *var, wordsizes size)
1111 {
1112 /* Could do a modulo operation here... which one is faster? */
1113 switch (size) {
1114 case sz_long:
1115 printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
1116 break;
1117 case sz_word:
1118 printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
1119 printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
1120 break;
1121 case sz_byte:
1122 printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
1123 printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
1124 printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
1125 break;
1126 }
1127 }
1128
1129 static const char *cmask (wordsizes size)
1130 {
1131 switch (size) {
1132 case sz_byte: return "0x80";
1133 case sz_word: return "0x8000";
1134 case sz_long: return "0x80000000";
1135 default: abort ();
1136 }
1137 }
1138
1139 static int source_is_imm1_8 (struct instr *i)
1140 {
1141 return i->stype == 3;
1142 }
1143
1144 static void gen_opcode (unsigned long int opcode)
1145 {
1146 struct instr *curi = table68k + opcode;
1147 insn_n_cycles = 2;
1148
1149 start_brace ();
1150 #if 0
1151 printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
1152 #endif
1153 m68k_pc_offset = 2;
1154 switch (curi->plev) {
1155 case 0: /* not privileged */
1156 break;
1157 case 1: /* unprivileged only on 68000 */
1158 if (cpu_level == 0)
1159 break;
1160 if (next_cpu_level < 0)
1161 next_cpu_level = 0;
1162
1163 /* fall through */
1164 case 2: /* priviledged */
1165 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1166 need_endlabel = 1;
1167 start_brace ();
1168 break;
1169 case 3: /* privileged if size == word */
1170 if (curi->size == sz_byte)
1171 break;
1172 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1173 need_endlabel = 1;
1174 start_brace ();
1175 break;
1176 }
1177 switch (curi->mnemo) {
1178 case i_OR:
1179 case i_AND:
1180 case i_EOR:
1181 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1182 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1183 printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
1184 genflags (flag_logical, curi->size, "src", "", "");
1185 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1186 break;
1187 case i_ORSR:
1188 case i_EORSR:
1189 printf ("\tMakeSR();\n");
1190 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1191 if (curi->size == sz_byte) {
1192 printf ("\tsrc &= 0xFF;\n");
1193 }
1194 printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1195 printf ("\tMakeFromSR();\n");
1196 break;
1197 case i_ANDSR:
1198 printf ("\tMakeSR();\n");
1199 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1200 if (curi->size == sz_byte) {
1201 printf ("\tsrc |= 0xFF00;\n");
1202 }
1203 printf ("\tregs.sr &= src;\n");
1204 printf ("\tMakeFromSR();\n");
1205 break;
1206 case i_SUB:
1207 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1208 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1209 start_brace ();
1210 genflags (flag_sub, curi->size, "newv", "src", "dst");
1211 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1212 break;
1213 case i_SUBA:
1214 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1215 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1216 start_brace ();
1217 printf ("\tuae_u32 newv = dst - src;\n");
1218 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1219 break;
1220 case i_SUBX:
1221 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1222 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1223 start_brace ();
1224 printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
1225 genflags (flag_subx, curi->size, "newv", "src", "dst");
1226 genflags (flag_zn, curi->size, "newv", "", "");
1227 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1228 break;
1229 case i_SBCD:
1230 /* Let's hope this works... */
1231 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1232 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1233 start_brace ();
1234 printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1235 printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1236 printf ("\tuae_u16 newv;\n");
1237 printf ("\tint cflg;\n");
1238 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1239 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1240 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1241 duplicate_carry ();
1242 printf ("\tif (cflg) newv -= 0x60;\n");
1243 genflags (flag_zn, curi->size, "newv", "", "");
1244 genflags (flag_sv, curi->size, "newv", "src", "dst");
1245 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1246 break;
1247 case i_ADD:
1248 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1249 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1250 start_brace ();
1251 genflags (flag_add, curi->size, "newv", "src", "dst");
1252 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1253 break;
1254 case i_ADDA:
1255 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1256 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1257 start_brace ();
1258 printf ("\tuae_u32 newv = dst + src;\n");
1259 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1260 break;
1261 case i_ADDX:
1262 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1263 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1264 start_brace ();
1265 printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1266 genflags (flag_addx, curi->size, "newv", "src", "dst");
1267 genflags (flag_zn, curi->size, "newv", "", "");
1268 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1269 break;
1270 case i_ABCD:
1271 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1272 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1273 start_brace ();
1274 printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1275 printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1276 printf ("\tuae_u16 newv;\n");
1277 printf ("\tint cflg;\n");
1278 printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
1279 printf ("\tnewv = newv_hi + newv_lo;");
1280 printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1281 duplicate_carry ();
1282 printf ("\tif (cflg) newv += 0x60;\n");
1283 genflags (flag_zn, curi->size, "newv", "", "");
1284 genflags (flag_sv, curi->size, "newv", "src", "dst");
1285 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1286 break;
1287 case i_NEG:
1288 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1289 start_brace ();
1290 genflags (flag_sub, curi->size, "dst", "src", "0");
1291 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1292 break;
1293 case i_NEGX:
1294 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1295 start_brace ();
1296 printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1297 genflags (flag_subx, curi->size, "newv", "src", "0");
1298 genflags (flag_zn, curi->size, "newv", "", "");
1299 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1300 break;
1301 case i_NBCD:
1302 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1303 start_brace ();
1304 printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1305 printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1306 printf ("\tuae_u16 newv;\n");
1307 printf ("\tint cflg;\n");
1308 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1309 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1310 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1311 duplicate_carry();
1312 printf ("\tif (cflg) newv -= 0x60;\n");
1313 genflags (flag_zn, curi->size, "newv", "", "");
1314 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1315 break;
1316 case i_CLR:
1317 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1318 genflags (flag_logical, curi->size, "0", "", "");
1319 genastore ("0", curi->smode, "srcreg", curi->size, "src");
1320 break;
1321 case i_NOT:
1322 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1323 start_brace ();
1324 printf ("\tuae_u32 dst = ~src;\n");
1325 genflags (flag_logical, curi->size, "dst", "", "");
1326 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1327 break;
1328 case i_TST:
1329 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1330 genflags (flag_logical, curi->size, "src", "", "");
1331 break;
1332 case i_BTST:
1333 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1334 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1335 if (curi->size == sz_byte)
1336 printf ("\tsrc &= 7;\n");
1337 else
1338 printf ("\tsrc &= 31;\n");
1339 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1340 break;
1341 case i_BCHG:
1342 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1343 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1344 if (curi->size == sz_byte)
1345 printf ("\tsrc &= 7;\n");
1346 else
1347 printf ("\tsrc &= 31;\n");
1348 printf ("\tdst ^= (1 << src);\n");
1349 printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1350 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1351 break;
1352 case i_BCLR:
1353 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1354 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1355 if (curi->size == sz_byte)
1356 printf ("\tsrc &= 7;\n");
1357 else
1358 printf ("\tsrc &= 31;\n");
1359 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1360 printf ("\tdst &= ~(1 << src);\n");
1361 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1362 break;
1363 case i_BSET:
1364 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1365 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1366 if (curi->size == sz_byte)
1367 printf ("\tsrc &= 7;\n");
1368 else
1369 printf ("\tsrc &= 31;\n");
1370 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1371 printf ("\tdst |= (1 << src);\n");
1372 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1373 break;
1374 case i_CMPM:
1375 case i_CMP:
1376 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1377 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1378 start_brace ();
1379 genflags (flag_cmp, curi->size, "newv", "src", "dst");
1380 break;
1381 case i_CMPA:
1382 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1383 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1384 start_brace ();
1385 genflags (flag_cmp, sz_long, "newv", "src", "dst");
1386 break;
1387 /* The next two are coded a little unconventional, but they are doing
1388 * weird things... */
1389 case i_MVPRM:
1390 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1391
1392 printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1393 if (curi->size == sz_word) {
1394 printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1395 } else {
1396 printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1397 printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1398 }
1399 break;
1400 case i_MVPMR:
1401 printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1402 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1403 if (curi->size == sz_word) {
1404 printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1405 } else {
1406 printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1407 printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1408 }
1409 genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1410 break;
1411 case i_MOVE:
1412 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1413 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1414 genflags (flag_logical, curi->size, "src", "", "");
1415 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1416 break;
1417 case i_MOVEA:
1418 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1419 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1420 if (curi->size == sz_word) {
1421 printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1422 } else {
1423 printf ("\tuae_u32 val = src;\n");
1424 }
1425 genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1426 break;
1427 case i_MVSR2:
1428 genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1429 printf ("\tMakeSR();\n");
1430 if (curi->size == sz_byte)
1431 genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1432 else
1433 genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1434 break;
1435 case i_MV2SR:
1436 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1437 if (curi->size == sz_byte)
1438 printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1439 else {
1440 printf ("\tregs.sr = src;\n");
1441 }
1442 printf ("\tMakeFromSR();\n");
1443 break;
1444 case i_SWAP:
1445 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1446 start_brace ();
1447 printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1448 genflags (flag_logical, sz_long, "dst", "", "");
1449 genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1450 break;
1451 case i_EXG:
1452 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1453 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1454 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1455 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1456 break;
1457 case i_EXT:
1458 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1459 start_brace ();
1460 switch (curi->size) {
1461 case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1462 case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1463 case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1464 default: abort ();
1465 }
1466 genflags (flag_logical,
1467 curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1468 genastore ("dst", curi->smode, "srcreg",
1469 curi->size == sz_word ? sz_word : sz_long, "src");
1470 break;
1471 case i_MVMEL:
1472 genmovemel (opcode);
1473 break;
1474 case i_MVMLE:
1475 genmovemle (opcode);
1476 break;
1477 case i_TRAP:
1478 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1479 sync_m68k_pc ();
1480 printf ("\tException(src+32,0);\n");
1481 m68k_pc_offset = 0;
1482 break;
1483 case i_MVR2USP:
1484 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1485 printf ("\tregs.usp = src;\n");
1486 break;
1487 case i_MVUSP2R:
1488 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1489 genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1490 break;
1491 case i_RESET:
1492 break;
1493 case i_NOP:
1494 break;
1495 case i_STOP:
1496 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1497 printf ("\tregs.sr = src;\n");
1498 printf ("\tMakeFromSR();\n");
1499 printf ("\tm68k_setstopped(1);\n");
1500 break;
1501 case i_RTE:
1502 if (cpu_level == 0) {
1503 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1504 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1505 printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1506 fill_prefetch_0 ();
1507 printf ("\tMakeFromSR();\n");
1508 } else {
1509 int old_brace_level = n_braces;
1510 if (next_cpu_level < 0)
1511 next_cpu_level = 0;
1512 printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1513 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1514 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1515 genamode (Aipi, "7", sz_word, "format", 1, 0);
1516 printf ("\tnewsr = sr; newpc = pc;\n");
1517 printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1518 printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1519 printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1520 printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1521 printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1522 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1523 printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1524 printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1525 printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1526 printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1527 printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1528 pop_braces (old_brace_level);
1529 printf ("\tregs.sr = newsr; MakeFromSR();\n");
1530 printf ("\tm68k_setpc_rte(newpc);\n");
1531 fill_prefetch_0 ();
1532 need_endlabel = 1;
1533 }
1534 /* PC is set and prefetch filled. */
1535 m68k_pc_offset = 0;
1536 break;
1537 case i_RTD:
1538 printf ("\tcompiler_flush_jsr_stack();\n");
1539 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1540 genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1541 printf ("\tm68k_areg(regs, 7) += offs;\n");
1542 printf ("\tm68k_setpc_rte(pc);\n");
1543 fill_prefetch_0 ();
1544 /* PC is set and prefetch filled. */
1545 m68k_pc_offset = 0;
1546 break;
1547 case i_LINK:
1548 genamode (Apdi, "7", sz_long, "old", 2, 0);
1549 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1550 genastore ("src", Apdi, "7", sz_long, "old");
1551 genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1552 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1553 printf ("\tm68k_areg(regs, 7) += offs;\n");
1554 break;
1555 case i_UNLK:
1556 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1557 printf ("\tm68k_areg(regs, 7) = src;\n");
1558 genamode (Aipi, "7", sz_long, "old", 1, 0);
1559 genastore ("old", curi->smode, "srcreg", curi->size, "src");
1560 break;
1561 case i_RTS:
1562 printf ("\tm68k_do_rts();\n");
1563 fill_prefetch_0 ();
1564 m68k_pc_offset = 0;
1565 break;
1566 case i_TRAPV:
1567 sync_m68k_pc ();
1568 printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1569 need_endlabel = 1;
1570 break;
1571 case i_RTR:
1572 printf ("\tcompiler_flush_jsr_stack();\n");
1573 printf ("\tMakeSR();\n");
1574 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1575 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1576 printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1577 printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1578 fill_prefetch_0 ();
1579 printf ("\tMakeFromSR();\n");
1580 m68k_pc_offset = 0;
1581 break;
1582 case i_JSR:
1583 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1584 printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1585 fill_prefetch_0 ();
1586 m68k_pc_offset = 0;
1587 break;
1588 case i_JMP:
1589 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1590 printf ("\tm68k_setpc(srca);\n");
1591 fill_prefetch_0 ();
1592 m68k_pc_offset = 0;
1593 break;
1594 case i_BSR:
1595 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1596 printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1597 if (using_exception_3) {
1598 printf ("\tif (src & 1) {\n");
1599 printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1600 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1601 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1602 printf ("\t}\n");
1603 need_endlabel = 1;
1604 }
1605 printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1606 fill_prefetch_0 ();
1607 m68k_pc_offset = 0;
1608 break;
1609 case i_Bcc:
1610 if (curi->size == sz_long) {
1611 if (cpu_level < 2) {
1612 printf ("\tm68k_incpc(2);\n");
1613 printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1614 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1615 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1616 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1617 need_endlabel = 1;
1618 } else {
1619 if (next_cpu_level < 1)
1620 next_cpu_level = 1;
1621 }
1622 }
1623 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1624 printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1625 if (using_exception_3) {
1626 printf ("\tif (src & 1) {\n");
1627 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1628 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1629 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1630 printf ("\t}\n");
1631 need_endlabel = 1;
1632 }
1633 #ifdef USE_COMPILER
1634 printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1635 #else
1636 printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1637 #endif
1638 fill_prefetch_0 ();
1639 printf ("\tgoto %s;\n", endlabelstr);
1640 printf ("didnt_jump:;\n");
1641 need_endlabel = 1;
1642 break;
1643 case i_LEA:
1644 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1645 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1646 genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1647 break;
1648 case i_PEA:
1649 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1650 genamode (Apdi, "7", sz_long, "dst", 2, 0);
1651 genastore ("srca", Apdi, "7", sz_long, "dst");
1652 break;
1653 case i_DBcc:
1654 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1655 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1656
1657 printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1658 genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1659
1660 printf ("\t\tif (src) {\n");
1661 if (using_exception_3) {
1662 printf ("\t\t\tif (offs & 1) {\n");
1663 printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1664 printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1665 printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1666 printf ("\t\t}\n");
1667 need_endlabel = 1;
1668 }
1669 #ifdef USE_COMPILER
1670 printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1671 #else
1672 printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1673 #endif
1674 fill_prefetch_0 ();
1675 printf ("\t\tgoto %s;\n", endlabelstr);
1676 printf ("\t\t}\n");
1677 printf ("\t}\n");
1678 need_endlabel = 1;
1679 break;
1680 case i_Scc:
1681 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1682 start_brace ();
1683 printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1684 genastore ("val", curi->smode, "srcreg", curi->size, "src");
1685 break;
1686 case i_DIVU:
1687 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1688 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1689 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1690 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1691 printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1692 printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1693 /* The N flag appears to be set each time there is an overflow.
1694 * Weird. */
1695 printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1696 genflags (flag_logical, sz_word, "newv", "", "");
1697 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1698 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1699 printf ("\t}\n");
1700 printf ("\t}\n");
1701 insn_n_cycles += 68;
1702 need_endlabel = 1;
1703 break;
1704 case i_DIVS:
1705 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1706 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1707 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1708 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1709 printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1710 printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1711 printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1712 printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1713 genflags (flag_logical, sz_word, "newv", "", "");
1714 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1715 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1716 printf ("\t}\n");
1717 printf ("\t}\n");
1718 insn_n_cycles += 72;
1719 need_endlabel = 1;
1720 break;
1721 case i_MULU:
1722 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1723 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1724 start_brace ();
1725 printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1726 genflags (flag_logical, sz_long, "newv", "", "");
1727 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1728 insn_n_cycles += 32;
1729 break;
1730 case i_MULS:
1731 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1732 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1733 start_brace ();
1734 printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1735 genflags (flag_logical, sz_long, "newv", "", "");
1736 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1737 insn_n_cycles += 32;
1738 break;
1739 case i_CHK:
1740 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1741 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1742 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1743 printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1744 printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1745 need_endlabel = 1;
1746 break;
1747
1748 case i_CHK2:
1749 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1750 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1751 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1752 printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1753 switch (curi->size) {
1754 case sz_byte:
1755 printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1756 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1757 break;
1758 case sz_word:
1759 printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1760 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1761 break;
1762 case sz_long:
1763 printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1764 break;
1765 default:
1766 abort ();
1767 }
1768 printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1769 printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1770 printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1771 need_endlabel = 1;
1772 break;
1773
1774 case i_ASR:
1775 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1776 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1777 start_brace ();
1778 switch (curi->size) {
1779 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1780 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1781 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1782 default: abort ();
1783 }
1784 printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1785 printf ("\tcnt &= 63;\n");
1786 printf ("\tCLEAR_CZNV;\n");
1787 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1788 printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1789 printf ("\t\tSET_CFLG (sign);\n");
1790 duplicate_carry ();
1791 if (source_is_imm1_8 (curi))
1792 printf ("\t} else {\n");
1793 else
1794 printf ("\t} else if (cnt > 0) {\n");
1795 printf ("\t\tval >>= cnt - 1;\n");
1796 printf ("\t\tSET_CFLG (val & 1);\n");
1797 duplicate_carry ();
1798 printf ("\t\tval >>= 1;\n");
1799 printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1800 bit_mask (curi->size),
1801 bit_size (curi->size));
1802 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1803 printf ("\t}\n");
1804 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1805 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1806 break;
1807 case i_ASL:
1808 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1809 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1810 start_brace ();
1811 switch (curi->size) {
1812 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1813 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1814 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1815 default: abort ();
1816 }
1817 printf ("\tcnt &= 63;\n");
1818 printf ("\tCLEAR_CZNV;\n");
1819 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1820 printf ("\t\tSET_VFLG (val != 0);\n");
1821 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1822 bit_size (curi->size));
1823 duplicate_carry ();
1824 printf ("\t\tval = 0;\n");
1825 if (source_is_imm1_8 (curi))
1826 printf ("\t} else {\n");
1827 else
1828 printf ("\t} else if (cnt > 0) {\n");
1829 printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1830 bit_mask (curi->size),
1831 bit_size (curi->size) - 1,
1832 bit_mask (curi->size));
1833 printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1834 printf ("\t\tval <<= cnt - 1;\n");
1835 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1836 duplicate_carry ();
1837 printf ("\t\tval <<= 1;\n");
1838 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1839 printf ("\t}\n");
1840 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1841 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1842 break;
1843 case i_LSR:
1844 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1845 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1846 start_brace ();
1847 switch (curi->size) {
1848 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1849 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1850 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1851 default: abort ();
1852 }
1853 printf ("\tcnt &= 63;\n");
1854 printf ("\tCLEAR_CZNV;\n");
1855 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1856 printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1857 bit_size (curi->size), bit_size (curi->size) - 1);
1858 duplicate_carry ();
1859 printf ("\t\tval = 0;\n");
1860 if (source_is_imm1_8 (curi))
1861 printf ("\t} else {\n");
1862 else
1863 printf ("\t} else if (cnt > 0) {\n");
1864 printf ("\t\tval >>= cnt - 1;\n");
1865 printf ("\t\tSET_CFLG (val & 1);\n");
1866 duplicate_carry ();
1867 printf ("\t\tval >>= 1;\n");
1868 printf ("\t}\n");
1869 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1870 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1871 break;
1872 case i_LSL:
1873 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1874 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1875 start_brace ();
1876 switch (curi->size) {
1877 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1878 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1879 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1880 default: abort ();
1881 }
1882 printf ("\tcnt &= 63;\n");
1883 printf ("\tCLEAR_CZNV;\n");
1884 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1885 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1886 bit_size (curi->size));
1887 duplicate_carry ();
1888 printf ("\t\tval = 0;\n");
1889 if (source_is_imm1_8 (curi))
1890 printf ("\t} else {\n");
1891 else
1892 printf ("\t} else if (cnt > 0) {\n");
1893 printf ("\t\tval <<= (cnt - 1);\n");
1894 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1895 duplicate_carry ();
1896 printf ("\t\tval <<= 1;\n");
1897 printf ("\tval &= %s;\n", bit_mask (curi->size));
1898 printf ("\t}\n");
1899 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1900 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1901 break;
1902 case i_ROL:
1903 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1904 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1905 start_brace ();
1906 switch (curi->size) {
1907 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1908 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1909 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1910 default: abort ();
1911 }
1912 printf ("\tcnt &= 63;\n");
1913 printf ("\tCLEAR_CZNV;\n");
1914 if (source_is_imm1_8 (curi))
1915 printf ("{");
1916 else
1917 printf ("\tif (cnt > 0) {\n");
1918 printf ("\tuae_u32 loval;\n");
1919 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1920 printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1921 printf ("\tval <<= cnt;\n");
1922 printf ("\tval |= loval;\n");
1923 printf ("\tval &= %s;\n", bit_mask (curi->size));
1924 printf ("\tSET_CFLG (val & 1);\n");
1925 printf ("}\n");
1926 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1927 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1928 break;
1929 case i_ROR:
1930 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1931 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1932 start_brace ();
1933 switch (curi->size) {
1934 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1935 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1936 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1937 default: abort ();
1938 }
1939 printf ("\tcnt &= 63;\n");
1940 printf ("\tCLEAR_CZNV;\n");
1941 if (source_is_imm1_8 (curi))
1942 printf ("{");
1943 else
1944 printf ("\tif (cnt > 0) {");
1945 printf ("\tuae_u32 hival;\n");
1946 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1947 printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1948 printf ("\tval >>= cnt;\n");
1949 printf ("\tval |= hival;\n");
1950 printf ("\tval &= %s;\n", bit_mask (curi->size));
1951 printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1952 printf ("\t}\n");
1953 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1954 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1955 break;
1956 case i_ROXL:
1957 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1958 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1959 start_brace ();
1960 switch (curi->size) {
1961 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1962 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1963 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1964 default: abort ();
1965 }
1966 printf ("\tcnt &= 63;\n");
1967 printf ("\tCLEAR_CZNV;\n");
1968 if (! source_is_imm1_8 (curi))
1969 force_range_for_rox ("cnt", curi->size);
1970 if (source_is_imm1_8 (curi))
1971 printf ("{");
1972 else
1973 printf ("\tif (cnt > 0) {\n");
1974 printf ("\tcnt--;\n");
1975 printf ("\t{\n\tuae_u32 carry;\n");
1976 printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1977 printf ("\tcarry = loval & 1;\n");
1978 printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1979 printf ("\tSET_XFLG (carry);\n");
1980 printf ("\tval &= %s;\n", bit_mask (curi->size));
1981 printf ("\t} }\n");
1982 printf ("\tSET_CFLG (GET_XFLG);\n");
1983 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1984 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1985 break;
1986 case i_ROXR:
1987 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1988 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1989 start_brace ();
1990 switch (curi->size) {
1991 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1992 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1993 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1994 default: abort ();
1995 }
1996 printf ("\tcnt &= 63;\n");
1997 printf ("\tCLEAR_CZNV;\n");
1998 if (! source_is_imm1_8 (curi))
1999 force_range_for_rox ("cnt", curi->size);
2000 if (source_is_imm1_8 (curi))
2001 printf ("{");
2002 else
2003 printf ("\tif (cnt > 0) {\n");
2004 printf ("\tcnt--;\n");
2005 printf ("\t{\n\tuae_u32 carry;\n");
2006 printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
2007 printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
2008 printf ("\tval >>= cnt;\n");
2009 printf ("\tcarry = val & 1;\n");
2010 printf ("\tval >>= 1;\n");
2011 printf ("\tval |= hival;\n");
2012 printf ("\tSET_XFLG (carry);\n");
2013 printf ("\tval &= %s;\n", bit_mask (curi->size));
2014 printf ("\t} }\n");
2015 printf ("\tSET_CFLG (GET_XFLG);\n");
2016 genflags (flag_logical_noclobber, curi->size, "val", "", "");
2017 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2018 break;
2019 case i_ASRW:
2020 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2021 start_brace ();
2022 switch (curi->size) {
2023 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2024 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2025 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2026 default: abort ();
2027 }
2028 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2029 printf ("\tuae_u32 cflg = val & 1;\n");
2030 printf ("\tval = (val >> 1) | sign;\n");
2031 genflags (flag_logical, curi->size, "val", "", "");
2032 printf ("\tSET_CFLG (cflg);\n");
2033 duplicate_carry ();
2034 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2035 break;
2036 case i_ASLW:
2037 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2038 start_brace ();
2039 switch (curi->size) {
2040 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2041 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2042 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2043 default: abort ();
2044 }
2045 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2046 printf ("\tuae_u32 sign2;\n");
2047 printf ("\tval <<= 1;\n");
2048 genflags (flag_logical, curi->size, "val", "", "");
2049 printf ("\tsign2 = %s & val;\n", cmask (curi->size));
2050 printf ("\tSET_CFLG (sign != 0);\n");
2051 duplicate_carry ();
2052
2053 printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
2054 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2055 break;
2056 case i_LSRW:
2057 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2058 start_brace ();
2059 switch (curi->size) {
2060 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2061 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2062 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2063 default: abort ();
2064 }
2065 printf ("\tuae_u32 carry = val & 1;\n");
2066 printf ("\tval >>= 1;\n");
2067 genflags (flag_logical, curi->size, "val", "", "");
2068 printf ("SET_CFLG (carry);\n");
2069 duplicate_carry ();
2070 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2071 break;
2072 case i_LSLW:
2073 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2074 start_brace ();
2075 switch (curi->size) {
2076 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2077 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2078 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2079 default: abort ();
2080 }
2081 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2082 printf ("\tval <<= 1;\n");
2083 genflags (flag_logical, curi->size, "val", "", "");
2084 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2085 duplicate_carry ();
2086 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2087 break;
2088 case i_ROLW:
2089 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2090 start_brace ();
2091 switch (curi->size) {
2092 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2093 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2094 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2095 default: abort ();
2096 }
2097 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2098 printf ("\tval <<= 1;\n");
2099 printf ("\tif (carry) val |= 1;\n");
2100 genflags (flag_logical, curi->size, "val", "", "");
2101 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2102 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2103 break;
2104 case i_RORW:
2105 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2106 start_brace ();
2107 switch (curi->size) {
2108 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2109 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2110 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2111 default: abort ();
2112 }
2113 printf ("\tuae_u32 carry = val & 1;\n");
2114 printf ("\tval >>= 1;\n");
2115 printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2116 genflags (flag_logical, curi->size, "val", "", "");
2117 printf ("SET_CFLG (carry);\n");
2118 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2119 break;
2120 case i_ROXLW:
2121 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2122 start_brace ();
2123 switch (curi->size) {
2124 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2125 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2126 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2127 default: abort ();
2128 }
2129 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2130 printf ("\tval <<= 1;\n");
2131 printf ("\tif (GET_XFLG) val |= 1;\n");
2132 genflags (flag_logical, curi->size, "val", "", "");
2133 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2134 duplicate_carry ();
2135 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2136 break;
2137 case i_ROXRW:
2138 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2139 start_brace ();
2140 switch (curi->size) {
2141 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2142 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2143 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2144 default: abort ();
2145 }
2146 printf ("\tuae_u32 carry = val & 1;\n");
2147 printf ("\tval >>= 1;\n");
2148 printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2149 genflags (flag_logical, curi->size, "val", "", "");
2150 printf ("SET_CFLG (carry);\n");
2151 duplicate_carry ();
2152 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2153 break;
2154 case i_MOVEC2:
2155 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2156 start_brace ();
2157 printf ("\tint regno = (src >> 12) & 15;\n");
2158 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2159 printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
2160 break;
2161 case i_MOVE2C:
2162 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2163 start_brace ();
2164 printf ("\tint regno = (src >> 12) & 15;\n");
2165 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2166 printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
2167 break;
2168 case i_CAS:
2169 {
2170 int old_brace_level;
2171 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2172 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2173 start_brace ();
2174 printf ("\tint ru = (src >> 6) & 7;\n");
2175 printf ("\tint rc = src & 7;\n");
2176 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2177 printf ("\tif (GET_ZFLG)");
2178 old_brace_level = n_braces;
2179 start_brace ();
2180 genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2181 pop_braces (old_brace_level);
2182 printf ("else");
2183 start_brace ();
2184 printf ("m68k_dreg(regs, rc) = dst;\n");
2185 pop_braces (old_brace_level);
2186 }
2187 break;
2188 case i_CAS2:
2189 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2190 printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2191 printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2192 if (curi->size == sz_word) {
2193 int old_brace_level = n_braces;
2194 printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2195 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2196 printf ("\tif (GET_ZFLG) {\n");
2197 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2198 printf ("\tif (GET_ZFLG) {\n");
2199 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2200 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2201 printf ("\t}}\n");
2202 pop_braces (old_brace_level);
2203 printf ("\tif (! GET_ZFLG) {\n");
2204 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2205 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2206 printf ("\t}\n");
2207 } else {
2208 int old_brace_level = n_braces;
2209 printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2210 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2211 printf ("\tif (GET_ZFLG) {\n");
2212 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2213 printf ("\tif (GET_ZFLG) {\n");
2214 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2215 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2216 printf ("\t}}\n");
2217 pop_braces (old_brace_level);
2218 printf ("\tif (! GET_ZFLG) {\n");
2219 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2220 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2221 printf ("\t}\n");
2222 }
2223 break;
2224 case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2225 {
2226 int old_brace_level;
2227 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2228 printf ("\tif (extra & 0x800)\n");
2229 old_brace_level = n_braces;
2230 start_brace ();
2231 printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2232 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2233 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2234 pop_braces (old_brace_level);
2235 printf ("else");
2236 start_brace ();
2237 genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2238 printf ("\tif (extra & 0x8000) {\n");
2239 switch (curi->size) {
2240 case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2241 case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2242 case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2243 default: abort ();
2244 }
2245 printf ("\t} else {\n");
2246 genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2247 printf ("\t}\n");
2248 pop_braces (old_brace_level);
2249 }
2250 break;
2251 case i_BKPT: /* only needed for hardware emulators */
2252 sync_m68k_pc ();
2253 printf ("\top_illg(opcode);\n");
2254 break;
2255 case i_CALLM: /* not present in 68030 */
2256 sync_m68k_pc ();
2257 printf ("\top_illg(opcode);\n");
2258 break;
2259 case i_RTM: /* not present in 68030 */
2260 sync_m68k_pc ();
2261 printf ("\top_illg(opcode);\n");
2262 break;
2263 case i_TRAPcc:
2264 if (curi->smode != am_unknown && curi->smode != am_illg)
2265 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2266 printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2267 need_endlabel = 1;
2268 break;
2269 case i_DIVL:
2270 sync_m68k_pc ();
2271 start_brace ();
2272 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2273 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2274 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2275 sync_m68k_pc ();
2276 printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2277 break;
2278 case i_MULL:
2279 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2280 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2281 sync_m68k_pc ();
2282 printf ("\tm68k_mull(opcode, dst, extra);\n");
2283 break;
2284 case i_BFTST:
2285 case i_BFEXTU:
2286 case i_BFCHG:
2287 case i_BFEXTS:
2288 case i_BFCLR:
2289 case i_BFFFO:
2290 case i_BFSET:
2291 case i_BFINS:
2292 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2293 genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2294 start_brace ();
2295 printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2296 printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2297 if (curi->dmode == Dreg) {
2298 printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2299 } else {
2300 printf ("\tuae_u32 tmp,bf0,bf1;\n");
2301 printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2302 printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2303 printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2304 }
2305 printf ("\ttmp >>= (32 - width);\n");
2306 printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2307 printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2308 switch (curi->mnemo) {
2309 case i_BFTST:
2310 break;
2311 case i_BFEXTU:
2312 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2313 break;
2314 case i_BFCHG:
2315 printf ("\ttmp = ~tmp;\n");
2316 break;
2317 case i_BFEXTS:
2318 printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2319 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2320 break;
2321 case i_BFCLR:
2322 printf ("\ttmp = 0;\n");
2323 break;
2324 case i_BFFFO:
2325 printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2326 printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2327 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2328 break;
2329 case i_BFSET:
2330 printf ("\ttmp = 0xffffffff;\n");
2331 break;
2332 case i_BFINS:
2333 printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2334 break;
2335 default:
2336 break;
2337 }
2338 if (curi->mnemo == i_BFCHG
2339 || curi->mnemo == i_BFCLR
2340 || curi->mnemo == i_BFSET
2341 || curi->mnemo == i_BFINS)
2342 {
2343 printf ("\ttmp <<= (32 - width);\n");
2344 if (curi->dmode == Dreg) {
2345 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2346 printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2347 printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2348 printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2349 printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2350 } else {
2351 printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2352 printf ("\t\t(tmp >> (offset & 7)) |\n");
2353 printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2354 printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2355 printf ("\tput_long(dsta,bf0 );\n");
2356 printf ("\tif (((offset & 7) + width) > 32) {\n");
2357 printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2358 printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2359 printf ("\t\tput_byte(dsta+4,bf1);\n");
2360 printf ("\t}\n");
2361 }
2362 }
2363 break;
2364 case i_PACK:
2365 if (curi->smode == Dreg) {
2366 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2367 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2368 } else {
2369 printf ("\tuae_u16 val;\n");
2370 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2371 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2372 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2373 printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2374 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2375 printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2376 }
2377 break;
2378 case i_UNPK:
2379 if (curi->smode == Dreg) {
2380 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2381 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2382 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2383 } else {
2384 printf ("\tuae_u16 val;\n");
2385 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2386 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2387 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2388 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2389 printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2390 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2391 printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2392 }
2393 break;
2394 case i_TAS:
2395 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2396 genflags (flag_logical, curi->size, "src", "", "");
2397 printf ("\tsrc |= 0x80;\n");
2398 genastore ("src", curi->smode, "srcreg", curi->size, "src");
2399 break;
2400 case i_FPP:
2401 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2402 sync_m68k_pc ();
2403 swap_opcode ();
2404 printf ("\tfpp_opp(opcode,extra);\n");
2405 break;
2406 case i_FDBcc:
2407 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2408 sync_m68k_pc ();
2409 swap_opcode ();
2410 printf ("\tfdbcc_opp(opcode,extra);\n");
2411 break;
2412 case i_FScc:
2413 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2414 sync_m68k_pc ();
2415 swap_opcode ();
2416 printf ("\tfscc_opp(opcode,extra);\n");
2417 break;
2418 case i_FTRAPcc:
2419 sync_m68k_pc ();
2420 start_brace ();
2421 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2422 if (curi->smode != am_unknown && curi->smode != am_illg)
2423 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2424 sync_m68k_pc ();
2425 swap_opcode ();
2426 printf ("\tftrapcc_opp(opcode,oldpc);\n");
2427 break;
2428 case i_FBcc:
2429 sync_m68k_pc ();
2430 start_brace ();
2431 printf ("\tuaecptr pc = m68k_getpc();\n");
2432 genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2433 sync_m68k_pc ();
2434 swap_opcode ();
2435 printf ("\tfbcc_opp(opcode,pc,extra);\n");
2436 break;
2437 case i_FSAVE:
2438 sync_m68k_pc ();
2439 swap_opcode ();
2440 printf ("\tfsave_opp(opcode);\n");
2441 break;
2442 case i_FRESTORE:
2443 sync_m68k_pc ();
2444 swap_opcode ();
2445 printf ("\tfrestore_opp(opcode);\n");
2446 break;
2447 case i_CINVL:
2448 case i_CINVP:
2449 case i_CINVA:
2450 case i_CPUSHL:
2451 case i_CPUSHP:
2452 case i_CPUSHA:
2453 break;
2454 case i_MOVE16:
2455 printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2456 printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2457 printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2458 printf ("\tput_long(memd, get_long(mems));\n");
2459 printf ("\tput_long(memd+4, get_long(mems+4));\n");
2460 printf ("\tput_long(memd+8, get_long(mems+8));\n");
2461 printf ("\tput_long(memd+12, get_long(mems+12));\n");
2462 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2463 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2464 break;
2465 case i_MMUOP:
2466 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2467 sync_m68k_pc ();
2468 swap_opcode ();
2469 printf ("\tmmu_op(opcode,extra);\n");
2470 break;
2471 default:
2472 abort ();
2473 break;
2474 }
2475 finish_braces ();
2476 sync_m68k_pc ();
2477 }
2478
2479 static void generate_includes (FILE * f)
2480 {
2481 fprintf (f, "#include \"sysdeps.h\"\n");
2482 fprintf (f, "#include \"m68k.h\"\n");
2483 fprintf (f, "#include \"memory.h\"\n");
2484 fprintf (f, "#include \"readcpu.h\"\n");
2485 fprintf (f, "#include \"newcpu.h\"\n");
2486 fprintf (f, "#include \"compiler.h\"\n");
2487 fprintf (f, "#include \"cputbl.h\"\n");
2488 }
2489
2490 static int postfix;
2491
2492 static void generate_one_opcode (int rp)
2493 {
2494 int i;
2495 uae_u16 smsk, dmsk;
2496 long int opcode = opcode_map[rp];
2497
2498 if (table68k[opcode].mnemo == i_ILLG
2499 || table68k[opcode].clev > cpu_level)
2500 return;
2501
2502 for (i = 0; lookuptab[i].name[0]; i++) {
2503 if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2504 break;
2505 }
2506
2507 if (table68k[opcode].handler != -1)
2508 return;
2509
2510 if (opcode_next_clev[rp] != cpu_level) {
2511 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2512 opcode, lookuptab[i].name);
2513 return;
2514 }
2515 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2516 fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2517 printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2518
2519 switch (table68k[opcode].stype) {
2520 case 0: smsk = 7; break;
2521 case 1: smsk = 255; break;
2522 case 2: smsk = 15; break;
2523 case 3: smsk = 7; break;
2524 case 4: smsk = 7; break;
2525 case 5: smsk = 63; break;
2526 default: abort ();
2527 }
2528 dmsk = 7;
2529
2530 next_cpu_level = -1;
2531 if (table68k[opcode].suse
2532 && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2533 && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2534 && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2535 && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2536 {
2537 if (table68k[opcode].spos == -1) {
2538 if (((int) table68k[opcode].sreg) >= 128)
2539 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2540 else
2541 printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2542 } else {
2543 char source[100];
2544 int pos = table68k[opcode].spos;
2545
2546 #if 0
2547 /* Check that we can do the little endian optimization safely. */
2548 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2549 abort ();
2550 #endif
2551 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2552
2553 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2554 sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2555 pos ^ 8, 8 - pos, dmsk);
2556 else if (pos != 8)
2557 sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2558 else
2559 sprintf (source, "(opcode & %d)", smsk);
2560
2561 if (table68k[opcode].stype == 3)
2562 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2563 else if (table68k[opcode].stype == 1)
2564 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2565 else
2566 printf ("\tuae_u32 srcreg = %s;\n", source);
2567
2568 printf ("#else\n");
2569
2570 if (pos)
2571 sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2572 else
2573 sprintf (source, "(opcode & %d)", smsk);
2574
2575 if (table68k[opcode].stype == 3)
2576 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2577 else if (table68k[opcode].stype == 1)
2578 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2579 else
2580 printf ("\tuae_u32 srcreg = %s;\n", source);
2581
2582 printf ("#endif\n");
2583 }
2584 }
2585 if (table68k[opcode].duse
2586 /* Yes, the dmode can be imm, in case of LINK or DBcc */
2587 && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2588 && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2589 && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2590 {
2591 if (table68k[opcode].dpos == -1) {
2592 if (((int) table68k[opcode].dreg) >= 128)
2593 printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2594 else
2595 printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2596 } else {
2597 int pos = table68k[opcode].dpos;
2598 #if 0
2599 /* Check that we can do the little endian optimization safely. */
2600 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2601 abort ();
2602 #endif
2603 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2604
2605 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2606 printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2607 pos ^ 8, 8 - pos, dmsk);
2608 else if (pos != 8)
2609 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2610 pos ^ 8, dmsk);
2611 else
2612 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2613
2614 printf ("#else\n");
2615
2616 if (pos)
2617 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2618 pos, dmsk);
2619 else
2620 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2621
2622 printf ("#endif\n");
2623 }
2624 }
2625 need_endlabel = 0;
2626 endlabelno++;
2627 sprintf (endlabelstr, "endlabel%d", endlabelno);
2628 gen_opcode (opcode);
2629 if (need_endlabel)
2630 printf ("%s: ;\n", endlabelstr);
2631 printf ("return %d;\n", insn_n_cycles);
2632 printf ("}\n");
2633 opcode_next_clev[rp] = next_cpu_level;
2634 opcode_last_postfix[rp] = postfix;
2635 }
2636
2637 static void generate_func (void)
2638 {
2639 int i, j, rp;
2640
2641 using_prefetch = 0;
2642 using_exception_3 = 0;
2643 for (i = 0; i < 6; i++) {
2644 cpu_level = 4 - i;
2645 if (i == 5) {
2646 cpu_level = 0;
2647 using_prefetch = 1;
2648 using_exception_3 = 1;
2649 for (rp = 0; rp < nr_cpuop_funcs; rp++)
2650 opcode_next_clev[rp] = 0;
2651 }
2652 postfix = i;
2653 fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2654
2655 /* sam: this is for people with low memory (eg. me :)) */
2656 printf ("\n"
2657 "#if !defined(PART_1) && !defined(PART_2) && "
2658 "!defined(PART_3) && !defined(PART_4) && "
2659 "!defined(PART_5) && !defined(PART_6) && "
2660 "!defined(PART_7) && !defined(PART_8)"
2661 "\n"
2662 "#define PART_1 1\n"
2663 "#define PART_2 1\n"
2664 "#define PART_3 1\n"
2665 "#define PART_4 1\n"
2666 "#define PART_5 1\n"
2667 "#define PART_6 1\n"
2668 "#define PART_7 1\n"
2669 "#define PART_8 1\n"
2670 "#endif\n\n");
2671
2672 rp = 0;
2673 for(j=1;j<=8;++j) {
2674 int k = (j*nr_cpuop_funcs)/8;
2675 printf ("#ifdef PART_%d\n",j);
2676 for (; rp < k; rp++)
2677 generate_one_opcode (rp);
2678 printf ("#endif\n\n");
2679 }
2680
2681 fprintf (stblfile, "{ 0, 0, 0 }};\n");
2682 }
2683 }
2684
2685 int main (int argc, char **argv)
2686 {
2687 read_table68k ();
2688 do_merges ();
2689
2690 opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2691 opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2692 opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2693 counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2694 read_counts ();
2695
2696 /* It would be a lot nicer to put all in one file (we'd also get rid of
2697 * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2698 * I don't dare to touch the 68k version. */
2699
2700 headerfile = fopen ("cputbl.h", "wb");
2701 stblfile = fopen ("cpustbl.cpp", "wb");
2702 freopen ("cpuemu.cpp", "wb", stdout);
2703
2704 generate_includes (stdout);
2705 generate_includes (stblfile);
2706
2707 generate_func ();
2708
2709 free (table68k);
2710 return 0;
2711 }