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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.7
Committed: 1999-10-28T16:00:23Z (24 years, 8 months ago) by cebix
Content type: text/plain
Branch: MAIN
Changes since 1.6: +3 -39 lines
Log Message:
- new SPARC optimizations from Gwenole

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation generator
5 *
6 * This is a fairly stupid program that generates a lot of case labels that
7 * can be #included in a switch statement.
8 * As an alternative, it can generate functions that handle specific
9 * MC68000 instructions, plus a prototype header file and a function pointer
10 * array to look up the function for an opcode.
11 * Error checking is bad, an illegal table68k file will cause the program to
12 * call abort().
13 * The generated code is sometimes sub-optimal, an optimizing compiler should
14 * take care of this.
15 *
16 * Copyright 1995, 1996 Bernd Schmidt
17 */
18
19 #include <ctype.h>
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23
24 #include "sysdeps.h"
25 #include "readcpu.h"
26
27 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28 #define SPARC_ASSEMBLY 0
29 #endif
30
31 #define BOOL_TYPE "int"
32
33 static FILE *headerfile;
34 static FILE *stblfile;
35
36 static int using_prefetch;
37 static int using_exception_3;
38 static int cpu_level;
39
40 /* For the current opcode, the next lower level that will have different code.
41 * Initialized to -1 for each opcode. If it remains unchanged, indicates we
42 * are done with that opcode. */
43 static int next_cpu_level;
44
45 static int *opcode_map;
46 static int *opcode_next_clev;
47 static int *opcode_last_postfix;
48 static unsigned long *counts;
49
50 static void read_counts (void)
51 {
52 FILE *file;
53 unsigned long opcode, count, total;
54 char name[20];
55 int nr = 0;
56 memset (counts, 0, 65536 * sizeof *counts);
57
58 file = fopen ("frequent.68k", "r");
59 if (file) {
60 fscanf (file, "Total: %lu\n", &total);
61 while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
62 opcode_next_clev[nr] = 4;
63 opcode_last_postfix[nr] = -1;
64 opcode_map[nr++] = opcode;
65 counts[opcode] = count;
66 }
67 fclose (file);
68 }
69 if (nr == nr_cpuop_funcs)
70 return;
71 for (opcode = 0; opcode < 0x10000; opcode++) {
72 if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
73 && counts[opcode] == 0)
74 {
75 opcode_next_clev[nr] = 4;
76 opcode_last_postfix[nr] = -1;
77 opcode_map[nr++] = opcode;
78 counts[opcode] = count;
79 }
80 }
81 if (nr != nr_cpuop_funcs)
82 abort ();
83 }
84
85 static char endlabelstr[80];
86 static int endlabelno = 0;
87 static int need_endlabel;
88
89 static int n_braces = 0;
90 static int m68k_pc_offset = 0;
91 static int insn_n_cycles;
92
93 static void start_brace (void)
94 {
95 n_braces++;
96 printf ("{");
97 }
98
99 static void close_brace (void)
100 {
101 assert (n_braces > 0);
102 n_braces--;
103 printf ("}");
104 }
105
106 static void finish_braces (void)
107 {
108 while (n_braces > 0)
109 close_brace ();
110 }
111
112 static void pop_braces (int to)
113 {
114 while (n_braces > to)
115 close_brace ();
116 }
117
118 static int bit_size (int size)
119 {
120 switch (size) {
121 case sz_byte: return 8;
122 case sz_word: return 16;
123 case sz_long: return 32;
124 default: abort ();
125 }
126 return 0;
127 }
128
129 static const char *bit_mask (int size)
130 {
131 switch (size) {
132 case sz_byte: return "0xff";
133 case sz_word: return "0xffff";
134 case sz_long: return "0xffffffff";
135 default: abort ();
136 }
137 return 0;
138 }
139
140 static const char *gen_nextilong (void)
141 {
142 static char buffer[80];
143 int r = m68k_pc_offset;
144 m68k_pc_offset += 4;
145
146 insn_n_cycles += 4;
147
148 if (using_prefetch)
149 sprintf (buffer, "get_ilong_prefetch(%d)", r);
150 else
151 sprintf (buffer, "get_ilong(%d)", r);
152 return buffer;
153 }
154
155 static const char *gen_nextiword (void)
156 {
157 static char buffer[80];
158 int r = m68k_pc_offset;
159 m68k_pc_offset += 2;
160
161 insn_n_cycles += 2;
162
163 if (using_prefetch)
164 sprintf (buffer, "get_iword_prefetch(%d)", r);
165 else
166 sprintf (buffer, "get_iword(%d)", r);
167 return buffer;
168 }
169
170 static const char *gen_nextibyte (void)
171 {
172 static char buffer[80];
173 int r = m68k_pc_offset;
174 m68k_pc_offset += 2;
175
176 insn_n_cycles += 2;
177
178 if (using_prefetch)
179 sprintf (buffer, "get_ibyte_prefetch(%d)", r);
180 else
181 sprintf (buffer, "get_ibyte(%d)", r);
182 return buffer;
183 }
184
185 static void fill_prefetch_0 (void)
186 {
187 if (using_prefetch)
188 printf ("fill_prefetch_0 ();\n");
189 }
190
191 static void fill_prefetch_2 (void)
192 {
193 if (using_prefetch)
194 printf ("fill_prefetch_2 ();\n");
195 }
196
197 static void swap_opcode (void)
198 {
199 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
200 printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
201 printf ("#endif\n");
202 }
203
204 static void sync_m68k_pc (void)
205 {
206 if (m68k_pc_offset == 0)
207 return;
208 printf ("m68k_incpc(%d);\n", m68k_pc_offset);
209 switch (m68k_pc_offset) {
210 case 0:
211 /*fprintf (stderr, "refilling prefetch at 0\n"); */
212 break;
213 case 2:
214 fill_prefetch_2 ();
215 break;
216 default:
217 fill_prefetch_0 ();
218 break;
219 }
220 m68k_pc_offset = 0;
221 }
222
223 /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224 * the calling routine handles Apdi and Aipi modes. */
225 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
226 {
227 start_brace ();
228 switch (mode) {
229 case Dreg:
230 if (movem)
231 abort ();
232 if (getv == 1)
233 switch (size) {
234 case sz_byte:
235 #ifdef AMIGA
236 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
237 /* if it is not done like that: */
238 printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
239 #else
240 printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
241 #endif
242 break;
243 case sz_word:
244 #ifdef AMIGA
245 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
246 #else
247 printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
248 #endif
249 break;
250 case sz_long:
251 printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
252 break;
253 default:
254 abort ();
255 }
256 return;
257 case Areg:
258 if (movem)
259 abort ();
260 if (getv == 1)
261 switch (size) {
262 case sz_word:
263 printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
264 break;
265 case sz_long:
266 printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
267 break;
268 default:
269 abort ();
270 }
271 return;
272 case Aind:
273 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
274 break;
275 case Aipi:
276 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
277 break;
278 case Apdi:
279 switch (size) {
280 case sz_byte:
281 if (movem)
282 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
283 else
284 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
285 break;
286 case sz_word:
287 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
288 break;
289 case sz_long:
290 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
291 break;
292 default:
293 abort ();
294 }
295 break;
296 case Ad16:
297 printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
298 break;
299 case Ad8r:
300 if (cpu_level > 1) {
301 if (next_cpu_level < 1)
302 next_cpu_level = 1;
303 sync_m68k_pc ();
304 start_brace ();
305 printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
306 } else
307 printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
308
309 break;
310 case PC16:
311 printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
312 printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
313 break;
314 case PC8r:
315 if (cpu_level > 1) {
316 if (next_cpu_level < 1)
317 next_cpu_level = 1;
318 sync_m68k_pc ();
319 start_brace ();
320 printf ("\tuaecptr tmppc = m68k_getpc();\n");
321 printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
322 } else {
323 printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
324 printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
325 }
326
327 break;
328 case absw:
329 printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
330 break;
331 case absl:
332 printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
333 break;
334 case imm:
335 if (getv != 1)
336 abort ();
337 switch (size) {
338 case sz_byte:
339 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
340 break;
341 case sz_word:
342 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
343 break;
344 case sz_long:
345 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
346 break;
347 default:
348 abort ();
349 }
350 return;
351 case imm0:
352 if (getv != 1)
353 abort ();
354 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
355 return;
356 case imm1:
357 if (getv != 1)
358 abort ();
359 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
360 return;
361 case imm2:
362 if (getv != 1)
363 abort ();
364 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
365 return;
366 case immi:
367 if (getv != 1)
368 abort ();
369 printf ("\tuae_u32 %s = %s;\n", name, reg);
370 return;
371 default:
372 abort ();
373 }
374
375 /* We get here for all non-reg non-immediate addressing modes to
376 * actually fetch the value. */
377
378 if (using_exception_3 && getv != 0 && size != sz_byte) {
379 printf ("\tif ((%sa & 1) != 0) {\n", name);
380 printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
381 printf ("\t\tlast_op_for_exception_3 = opcode;\n");
382 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
383 printf ("\t\tException(3, 0);\n");
384 printf ("\t\tgoto %s;\n", endlabelstr);
385 printf ("\t}\n");
386 need_endlabel = 1;
387 start_brace ();
388 }
389
390 if (getv == 1) {
391 switch (size) {
392 case sz_byte: insn_n_cycles += 2; break;
393 case sz_word: insn_n_cycles += 2; break;
394 case sz_long: insn_n_cycles += 4; break;
395 default: abort ();
396 }
397 start_brace ();
398 switch (size) {
399 case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
400 case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
401 case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
402 default: abort ();
403 }
404 }
405
406 /* We now might have to fix up the register for pre-dec or post-inc
407 * addressing modes. */
408 if (!movem)
409 switch (mode) {
410 case Aipi:
411 switch (size) {
412 case sz_byte:
413 printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
414 break;
415 case sz_word:
416 printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
417 break;
418 case sz_long:
419 printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
420 break;
421 default:
422 abort ();
423 }
424 break;
425 case Apdi:
426 printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
427 break;
428 default:
429 break;
430 }
431 }
432
433 static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
434 {
435 switch (mode) {
436 case Dreg:
437 switch (size) {
438 case sz_byte:
439 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
440 break;
441 case sz_word:
442 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
443 break;
444 case sz_long:
445 printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
446 break;
447 default:
448 abort ();
449 }
450 break;
451 case Areg:
452 switch (size) {
453 case sz_word:
454 fprintf (stderr, "Foo\n");
455 printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
456 break;
457 case sz_long:
458 printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
459 break;
460 default:
461 abort ();
462 }
463 break;
464 case Aind:
465 case Aipi:
466 case Apdi:
467 case Ad16:
468 case Ad8r:
469 case absw:
470 case absl:
471 case PC16:
472 case PC8r:
473 if (using_prefetch)
474 sync_m68k_pc ();
475 switch (size) {
476 case sz_byte:
477 insn_n_cycles += 2;
478 printf ("\tput_byte(%sa,%s);\n", to, from);
479 break;
480 case sz_word:
481 insn_n_cycles += 2;
482 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
483 abort ();
484 printf ("\tput_word(%sa,%s);\n", to, from);
485 break;
486 case sz_long:
487 insn_n_cycles += 4;
488 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
489 abort ();
490 printf ("\tput_long(%sa,%s);\n", to, from);
491 break;
492 default:
493 abort ();
494 }
495 break;
496 case imm:
497 case imm0:
498 case imm1:
499 case imm2:
500 case immi:
501 abort ();
502 break;
503 default:
504 abort ();
505 }
506 }
507
508 static void genmovemel (uae_u16 opcode)
509 {
510 char getcode[100];
511 int size = table68k[opcode].size == sz_long ? 4 : 2;
512
513 if (table68k[opcode].size == sz_long) {
514 strcpy (getcode, "get_long(srca)");
515 } else {
516 strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
517 }
518
519 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
520 printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
521 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
522 start_brace ();
523 printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
524 getcode, size);
525 printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
526 getcode, size);
527
528 if (table68k[opcode].dmode == Aipi)
529 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
530 }
531
532 static void genmovemle (uae_u16 opcode)
533 {
534 char putcode[100];
535 int size = table68k[opcode].size == sz_long ? 4 : 2;
536 if (table68k[opcode].size == sz_long) {
537 strcpy (putcode, "put_long(srca,");
538 } else {
539 strcpy (putcode, "put_word(srca,");
540 }
541
542 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
543 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
544 if (using_prefetch)
545 sync_m68k_pc ();
546
547 start_brace ();
548 if (table68k[opcode].dmode == Apdi) {
549 printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
550 printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
551 size, putcode);
552 printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
553 size, putcode);
554 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
555 } else {
556 printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
557 printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
558 putcode, size);
559 printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
560 putcode, size);
561 }
562 }
563
564 static void duplicate_carry (void)
565 {
566 printf ("\tCOPY_CARRY;\n");
567 }
568
569 typedef enum {
570 flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
571 flag_av, flag_sv
572 } flagtypes;
573
574 static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
575 {
576 char vstr[100], sstr[100], dstr[100];
577 char usstr[100], udstr[100];
578 char unsstr[100], undstr[100];
579
580 switch (size) {
581 case sz_byte:
582 strcpy (vstr, "((uae_s8)(");
583 strcpy (usstr, "((uae_u8)(");
584 break;
585 case sz_word:
586 strcpy (vstr, "((uae_s16)(");
587 strcpy (usstr, "((uae_u16)(");
588 break;
589 case sz_long:
590 strcpy (vstr, "((uae_s32)(");
591 strcpy (usstr, "((uae_u32)(");
592 break;
593 default:
594 abort ();
595 }
596 strcpy (unsstr, usstr);
597
598 strcpy (sstr, vstr);
599 strcpy (dstr, vstr);
600 strcat (vstr, value);
601 strcat (vstr, "))");
602 strcat (dstr, dst);
603 strcat (dstr, "))");
604 strcat (sstr, src);
605 strcat (sstr, "))");
606
607 strcpy (udstr, usstr);
608 strcat (udstr, dst);
609 strcat (udstr, "))");
610 strcat (usstr, src);
611 strcat (usstr, "))");
612
613 strcpy (undstr, unsstr);
614 strcat (unsstr, "-");
615 strcat (undstr, "~");
616 strcat (undstr, dst);
617 strcat (undstr, "))");
618 strcat (unsstr, src);
619 strcat (unsstr, "))");
620
621 switch (type) {
622 case flag_logical_noclobber:
623 case flag_logical:
624 case flag_zn:
625 case flag_av:
626 case flag_sv:
627 case flag_addx:
628 case flag_subx:
629 break;
630
631 case flag_add:
632 start_brace ();
633 printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
634 break;
635 case flag_sub:
636 case flag_cmp:
637 start_brace ();
638 printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
639 break;
640 }
641
642 switch (type) {
643 case flag_logical_noclobber:
644 case flag_logical:
645 case flag_zn:
646 break;
647
648 case flag_add:
649 case flag_sub:
650 case flag_addx:
651 case flag_subx:
652 case flag_cmp:
653 case flag_av:
654 case flag_sv:
655 start_brace ();
656 printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
657 printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
658 printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
659 break;
660 }
661
662 switch (type) {
663 case flag_logical:
664 printf ("\tCLEAR_CZNV;\n");
665 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
666 printf ("\tSET_NFLG (%s < 0);\n", vstr);
667 break;
668 case flag_logical_noclobber:
669 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
670 printf ("\tSET_NFLG (%s < 0);\n", vstr);
671 break;
672 case flag_av:
673 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
674 break;
675 case flag_sv:
676 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
677 break;
678 case flag_zn:
679 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
680 printf ("\tSET_NFLG (%s < 0);\n", vstr);
681 break;
682 case flag_add:
683 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
684 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
685 printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
686 duplicate_carry ();
687 printf ("\tSET_NFLG (flgn != 0);\n");
688 break;
689 case flag_sub:
690 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
691 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
692 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
693 duplicate_carry ();
694 printf ("\tSET_NFLG (flgn != 0);\n");
695 break;
696 case flag_addx:
697 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
698 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
699 duplicate_carry ();
700 break;
701 case flag_subx:
702 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
703 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
704 duplicate_carry ();
705 break;
706 case flag_cmp:
707 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
708 printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
709 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
710 printf ("\tSET_NFLG (flgn != 0);\n");
711 break;
712 }
713 }
714
715 static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
716 {
717 #ifdef SPARC_V8_ASSEMBLY
718 switch(type)
719 {
720 case flag_add:
721 start_brace();
722 printf("\tuae_u32 %s;\n", value);
723 switch(size)
724 {
725 case sz_byte:
726 printf("\t%s = sparc_v8_flag_add_8(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
727 break;
728 case sz_word:
729 printf("\t%s = sparc_v8_flag_add_16(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
730 break;
731 case sz_long:
732 printf("\t%s = sparc_v8_flag_add_32(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
733 break;
734 }
735 return;
736 }
737 #elif defined(SPARC_V9_ASSEMBLY)
738 switch(type)
739 {
740 case flag_add:
741 start_brace();
742 printf("\tuae_u32 %s;\n", value);
743 switch(size)
744 {
745 case sz_byte:
746 printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
747 break;
748 case sz_word:
749 printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
750 break;
751 case sz_long:
752 printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
753 break;
754 }
755 return;
756
757 case flag_sub:
758 start_brace();
759 printf("\tuae_u32 %s;\n", value);
760 switch(size)
761 {
762 case sz_byte:
763 printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
764 break;
765 case sz_word:
766 printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
767 break;
768 case sz_long:
769 printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
770 break;
771 }
772 return;
773
774 case flag_cmp:
775 switch(size)
776 {
777 case sz_byte:
778 printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
779 break;
780 case sz_word:
781 printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
782 break;
783 case sz_long:
784 printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
785 break;
786 }
787 return;
788
789 case flag_logical:
790 if (strcmp(value, "0") == 0) {
791 printf("\tregflags.nzvc = 0x04;\n");
792 } else {
793 switch(size) {
794 case sz_byte:
795 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
796 break;
797 case sz_word:
798 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
799 break;
800 case sz_long:
801 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
802 break;
803 }
804 }
805 return;
806
807 #if 0
808 case flag_logical_noclobber:
809 printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
810 if (strcmp(value, "0") == 0) {
811 printf("\tregflags.nzvc = old_flags | 0x04;\n");
812 } else {
813 switch(size) {
814 case sz_byte:
815 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
816 break;
817 case sz_word:
818 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
819 break;
820 case sz_long:
821 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
822 break;
823 }
824 printf("\tregflags.nzvc |= old_flags;\n");
825 }
826 printf("\t}\n");
827 return;
828 #endif
829 }
830 #elif defined(X86_ASSEMBLY)
831 switch (type) {
832 case flag_add:
833 case flag_sub:
834 start_brace ();
835 printf ("\tuae_u32 %s;\n", value);
836 break;
837
838 default:
839 break;
840 }
841
842 /* At least some of those casts are fairly important! */
843 switch (type) {
844 case flag_logical_noclobber:
845 printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
846 if (strcmp (value, "0") == 0) {
847 printf ("\tregflags.cznv = olcznv | 64;\n");
848 } else {
849 switch (size) {
850 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
851 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
852 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
853 }
854 printf ("\tregflags.cznv |= oldcznv;\n");
855 }
856 printf ("\t}\n");
857 return;
858 case flag_logical:
859 if (strcmp (value, "0") == 0) {
860 printf ("\tregflags.cznv = 64;\n");
861 } else {
862 switch (size) {
863 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
864 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
865 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
866 }
867 }
868 return;
869
870 case flag_add:
871 switch (size) {
872 case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
873 case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
874 case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
875 }
876 return;
877
878 case flag_sub:
879 switch (size) {
880 case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
881 case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
882 case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
883 }
884 return;
885
886 case flag_cmp:
887 switch (size) {
888 case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
889 case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
890 case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
891 }
892 return;
893
894 default:
895 break;
896 }
897 #elif defined(M68K_FLAG_OPT)
898 /* sam: here I'm cloning what X86_ASSEMBLY does */
899 #define EXT(size) (size==sz_byte?"b":(size==sz_word?"w":"l"))
900 #define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
901 switch (type) {
902 case flag_add:
903 case flag_sub:
904 start_brace ();
905 printf ("\tuae_u32 %s;\n", value);
906 break;
907
908 default:
909 break;
910 }
911
912 switch (type) {
913 case flag_logical:
914 if (strcmp (value, "0") == 0) {
915 printf ("\t*(uae_u16 *)&regflags = 4;\n"); /* Z = 1 */
916 } else {
917 printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
918 EXT (size), CAST (size), value);
919 }
920 return;
921
922 case flag_add:
923 printf ("\t{uae_u16 ccr;\n");
924 printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
925 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
926 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
927 return;
928
929 case flag_sub:
930 printf ("\t{uae_u16 ccr;\n");
931 printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
932 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
933 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
934 return;
935
936 case flag_cmp:
937 printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
938 EXT (size), CAST (size), src, CAST (size), dst);
939 return;
940
941 default:
942 break;
943 }
944 #elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
945 /*
946 * This is new. Might be quite buggy.
947 */
948 switch (type) {
949 case flag_av:
950 case flag_sv:
951 case flag_zn:
952 case flag_addx:
953 case flag_subx:
954 break;
955
956 case flag_logical:
957 if (strcmp (value, "0") == 0) {
958 /* v=c=n=0 z=1 */
959 printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
960 return;
961 } else {
962 start_brace ();
963 switch (size) {
964 case sz_byte:
965 printf ("\tUBYTE ccr;\n");
966 printf ("\tULONG shift;\n");
967 printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
968 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
969 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
970 return;
971 case sz_word:
972 printf ("\tUBYTE ccr;\n");
973 printf ("\tULONG shift;\n");
974 printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
975 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
976 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
977 return;
978 case sz_long:
979 printf ("\tUBYTE ccr;\n");
980 printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
981 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
982 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
983 return;
984 }
985 }
986 break;
987 case flag_add:
988 if (strcmp (dst, "0") == 0) {
989 printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
990 } else {
991 start_brace ();
992 switch (size) {
993 case sz_byte:
994 printf ("\tULONG ccr, shift, %s;\n", value);
995 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
996 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
997 printf ("\t*(ULONG*)&regflags = ccr;\n");
998 return;
999 case sz_word:
1000 printf ("\tULONG ccr, shift, %s;\n", value);
1001 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1002 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1003 printf ("\t*(ULONG*)&regflags = ccr;\n");
1004 return;
1005 case sz_long:
1006 printf ("\tULONG ccr, %s;\n", value);
1007 printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1008 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1009 printf ("\t*(ULONG*)&regflags = ccr;\n");
1010 return;
1011 }
1012 }
1013 break;
1014 case flag_sub:
1015 if (strcmp (dst, "0") == 0) {
1016 printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1017 } else {
1018 start_brace ();
1019 switch (size) {
1020 case sz_byte:
1021 printf ("\tULONG ccr, shift, %s;\n", value);
1022 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1023 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1024 printf ("\t*(ULONG*)&regflags = ccr;\n");
1025 return;
1026 case sz_word:
1027 printf ("\tULONG ccr, shift, %s;\n", value);
1028 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1029 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1030 printf ("\t*(ULONG*)&regflags = ccr;\n");
1031 return;
1032 case sz_long:
1033 printf ("\tULONG ccr, %s;\n", value);
1034 printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1035 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1036 printf ("\t*(ULONG*)&regflags = ccr;\n");
1037 return;
1038 }
1039 }
1040 break;
1041 case flag_cmp:
1042 if (strcmp (dst, "0") == 0) {
1043 printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1044 } else {
1045 start_brace ();
1046 switch (size) {
1047 case sz_byte:
1048 printf ("\tULONG shift, ccr;\n");
1049 printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1050 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1051 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1052 return;
1053 case sz_word:
1054 printf ("\tULONG shift, ccr;\n");
1055 printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1056 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1057 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1058 return;
1059 case sz_long:
1060 printf ("\tULONG ccr;\n");
1061 printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1062 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1063 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1064 /*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1065 return;
1066 }
1067 }
1068 break;
1069 }
1070 #endif
1071 genflags_normal (type, size, value, src, dst);
1072 }
1073
1074 static void force_range_for_rox (const char *var, wordsizes size)
1075 {
1076 /* Could do a modulo operation here... which one is faster? */
1077 switch (size) {
1078 case sz_long:
1079 printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
1080 break;
1081 case sz_word:
1082 printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
1083 printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
1084 break;
1085 case sz_byte:
1086 printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
1087 printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
1088 printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
1089 break;
1090 }
1091 }
1092
1093 static const char *cmask (wordsizes size)
1094 {
1095 switch (size) {
1096 case sz_byte: return "0x80";
1097 case sz_word: return "0x8000";
1098 case sz_long: return "0x80000000";
1099 default: abort ();
1100 }
1101 }
1102
1103 static int source_is_imm1_8 (struct instr *i)
1104 {
1105 return i->stype == 3;
1106 }
1107
1108 static void gen_opcode (unsigned long int opcode)
1109 {
1110 struct instr *curi = table68k + opcode;
1111 insn_n_cycles = 2;
1112
1113 start_brace ();
1114 #if 0
1115 printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
1116 #endif
1117 m68k_pc_offset = 2;
1118 switch (curi->plev) {
1119 case 0: /* not privileged */
1120 break;
1121 case 1: /* unprivileged only on 68000 */
1122 if (cpu_level == 0)
1123 break;
1124 if (next_cpu_level < 0)
1125 next_cpu_level = 0;
1126
1127 /* fall through */
1128 case 2: /* priviledged */
1129 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1130 need_endlabel = 1;
1131 start_brace ();
1132 break;
1133 case 3: /* privileged if size == word */
1134 if (curi->size == sz_byte)
1135 break;
1136 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1137 need_endlabel = 1;
1138 start_brace ();
1139 break;
1140 }
1141 switch (curi->mnemo) {
1142 case i_OR:
1143 case i_AND:
1144 case i_EOR:
1145 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1146 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1147 printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
1148 genflags (flag_logical, curi->size, "src", "", "");
1149 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1150 break;
1151 case i_ORSR:
1152 case i_EORSR:
1153 printf ("\tMakeSR();\n");
1154 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1155 if (curi->size == sz_byte) {
1156 printf ("\tsrc &= 0xFF;\n");
1157 }
1158 printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1159 printf ("\tMakeFromSR();\n");
1160 break;
1161 case i_ANDSR:
1162 printf ("\tMakeSR();\n");
1163 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1164 if (curi->size == sz_byte) {
1165 printf ("\tsrc |= 0xFF00;\n");
1166 }
1167 printf ("\tregs.sr &= src;\n");
1168 printf ("\tMakeFromSR();\n");
1169 break;
1170 case i_SUB:
1171 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1172 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1173 start_brace ();
1174 genflags (flag_sub, curi->size, "newv", "src", "dst");
1175 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1176 break;
1177 case i_SUBA:
1178 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1179 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1180 start_brace ();
1181 printf ("\tuae_u32 newv = dst - src;\n");
1182 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1183 break;
1184 case i_SUBX:
1185 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1186 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1187 start_brace ();
1188 printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
1189 genflags (flag_subx, curi->size, "newv", "src", "dst");
1190 genflags (flag_zn, curi->size, "newv", "", "");
1191 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1192 break;
1193 case i_SBCD:
1194 /* Let's hope this works... */
1195 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1196 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1197 start_brace ();
1198 printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1199 printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1200 printf ("\tuae_u16 newv;\n");
1201 printf ("\tint cflg;\n");
1202 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1203 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1204 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1205 duplicate_carry ();
1206 printf ("\tif (cflg) newv -= 0x60;\n");
1207 genflags (flag_zn, curi->size, "newv", "", "");
1208 genflags (flag_sv, curi->size, "newv", "src", "dst");
1209 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1210 break;
1211 case i_ADD:
1212 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1213 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1214 start_brace ();
1215 genflags (flag_add, curi->size, "newv", "src", "dst");
1216 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1217 break;
1218 case i_ADDA:
1219 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1220 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1221 start_brace ();
1222 printf ("\tuae_u32 newv = dst + src;\n");
1223 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1224 break;
1225 case i_ADDX:
1226 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1227 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1228 start_brace ();
1229 printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1230 genflags (flag_addx, curi->size, "newv", "src", "dst");
1231 genflags (flag_zn, curi->size, "newv", "", "");
1232 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1233 break;
1234 case i_ABCD:
1235 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1236 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1237 start_brace ();
1238 printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1239 printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1240 printf ("\tuae_u16 newv;\n");
1241 printf ("\tint cflg;\n");
1242 printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
1243 printf ("\tnewv = newv_hi + newv_lo;");
1244 printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1245 duplicate_carry ();
1246 printf ("\tif (cflg) newv += 0x60;\n");
1247 genflags (flag_zn, curi->size, "newv", "", "");
1248 genflags (flag_sv, curi->size, "newv", "src", "dst");
1249 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1250 break;
1251 case i_NEG:
1252 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1253 start_brace ();
1254 genflags (flag_sub, curi->size, "dst", "src", "0");
1255 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1256 break;
1257 case i_NEGX:
1258 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1259 start_brace ();
1260 printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1261 genflags (flag_subx, curi->size, "newv", "src", "0");
1262 genflags (flag_zn, curi->size, "newv", "", "");
1263 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1264 break;
1265 case i_NBCD:
1266 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1267 start_brace ();
1268 printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1269 printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1270 printf ("\tuae_u16 newv;\n");
1271 printf ("\tint cflg;\n");
1272 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1273 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1274 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1275 duplicate_carry();
1276 printf ("\tif (cflg) newv -= 0x60;\n");
1277 genflags (flag_zn, curi->size, "newv", "", "");
1278 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1279 break;
1280 case i_CLR:
1281 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1282 genflags (flag_logical, curi->size, "0", "", "");
1283 genastore ("0", curi->smode, "srcreg", curi->size, "src");
1284 break;
1285 case i_NOT:
1286 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1287 start_brace ();
1288 printf ("\tuae_u32 dst = ~src;\n");
1289 genflags (flag_logical, curi->size, "dst", "", "");
1290 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1291 break;
1292 case i_TST:
1293 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1294 genflags (flag_logical, curi->size, "src", "", "");
1295 break;
1296 case i_BTST:
1297 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1298 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1299 if (curi->size == sz_byte)
1300 printf ("\tsrc &= 7;\n");
1301 else
1302 printf ("\tsrc &= 31;\n");
1303 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1304 break;
1305 case i_BCHG:
1306 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1307 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1308 if (curi->size == sz_byte)
1309 printf ("\tsrc &= 7;\n");
1310 else
1311 printf ("\tsrc &= 31;\n");
1312 printf ("\tdst ^= (1 << src);\n");
1313 printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1314 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1315 break;
1316 case i_BCLR:
1317 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1318 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1319 if (curi->size == sz_byte)
1320 printf ("\tsrc &= 7;\n");
1321 else
1322 printf ("\tsrc &= 31;\n");
1323 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1324 printf ("\tdst &= ~(1 << src);\n");
1325 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1326 break;
1327 case i_BSET:
1328 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1329 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1330 if (curi->size == sz_byte)
1331 printf ("\tsrc &= 7;\n");
1332 else
1333 printf ("\tsrc &= 31;\n");
1334 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1335 printf ("\tdst |= (1 << src);\n");
1336 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1337 break;
1338 case i_CMPM:
1339 case i_CMP:
1340 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1341 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1342 start_brace ();
1343 genflags (flag_cmp, curi->size, "newv", "src", "dst");
1344 break;
1345 case i_CMPA:
1346 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1347 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1348 start_brace ();
1349 genflags (flag_cmp, sz_long, "newv", "src", "dst");
1350 break;
1351 /* The next two are coded a little unconventional, but they are doing
1352 * weird things... */
1353 case i_MVPRM:
1354 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1355
1356 printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1357 if (curi->size == sz_word) {
1358 printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1359 } else {
1360 printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1361 printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1362 }
1363 break;
1364 case i_MVPMR:
1365 printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1366 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1367 if (curi->size == sz_word) {
1368 printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1369 } else {
1370 printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1371 printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1372 }
1373 genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1374 break;
1375 case i_MOVE:
1376 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1377 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1378 genflags (flag_logical, curi->size, "src", "", "");
1379 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1380 break;
1381 case i_MOVEA:
1382 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1383 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1384 if (curi->size == sz_word) {
1385 printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1386 } else {
1387 printf ("\tuae_u32 val = src;\n");
1388 }
1389 genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1390 break;
1391 case i_MVSR2:
1392 genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1393 printf ("\tMakeSR();\n");
1394 if (curi->size == sz_byte)
1395 genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1396 else
1397 genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1398 break;
1399 case i_MV2SR:
1400 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1401 if (curi->size == sz_byte)
1402 printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1403 else {
1404 printf ("\tregs.sr = src;\n");
1405 }
1406 printf ("\tMakeFromSR();\n");
1407 break;
1408 case i_SWAP:
1409 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1410 start_brace ();
1411 printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1412 genflags (flag_logical, sz_long, "dst", "", "");
1413 genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1414 break;
1415 case i_EXG:
1416 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1417 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1418 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1419 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1420 break;
1421 case i_EXT:
1422 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1423 start_brace ();
1424 switch (curi->size) {
1425 case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1426 case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1427 case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1428 default: abort ();
1429 }
1430 genflags (flag_logical,
1431 curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1432 genastore ("dst", curi->smode, "srcreg",
1433 curi->size == sz_word ? sz_word : sz_long, "src");
1434 break;
1435 case i_MVMEL:
1436 genmovemel (opcode);
1437 break;
1438 case i_MVMLE:
1439 genmovemle (opcode);
1440 break;
1441 case i_TRAP:
1442 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1443 sync_m68k_pc ();
1444 printf ("\tException(src+32,0);\n");
1445 m68k_pc_offset = 0;
1446 break;
1447 case i_MVR2USP:
1448 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1449 printf ("\tregs.usp = src;\n");
1450 break;
1451 case i_MVUSP2R:
1452 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1453 genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1454 break;
1455 case i_RESET:
1456 break;
1457 case i_NOP:
1458 break;
1459 case i_STOP:
1460 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1461 printf ("\tregs.sr = src;\n");
1462 printf ("\tMakeFromSR();\n");
1463 printf ("\tm68k_setstopped(1);\n");
1464 break;
1465 case i_RTE:
1466 if (cpu_level == 0) {
1467 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1468 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1469 printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1470 fill_prefetch_0 ();
1471 printf ("\tMakeFromSR();\n");
1472 } else {
1473 int old_brace_level = n_braces;
1474 if (next_cpu_level < 0)
1475 next_cpu_level = 0;
1476 printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1477 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1478 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1479 genamode (Aipi, "7", sz_word, "format", 1, 0);
1480 printf ("\tnewsr = sr; newpc = pc;\n");
1481 printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1482 printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1483 printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1484 printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1485 printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1486 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1487 printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1488 printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1489 printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1490 printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1491 printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1492 pop_braces (old_brace_level);
1493 printf ("\tregs.sr = newsr; MakeFromSR();\n");
1494 printf ("\tm68k_setpc_rte(newpc);\n");
1495 fill_prefetch_0 ();
1496 need_endlabel = 1;
1497 }
1498 /* PC is set and prefetch filled. */
1499 m68k_pc_offset = 0;
1500 break;
1501 case i_RTD:
1502 printf ("\tcompiler_flush_jsr_stack();\n");
1503 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1504 genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1505 printf ("\tm68k_areg(regs, 7) += offs;\n");
1506 printf ("\tm68k_setpc_rte(pc);\n");
1507 fill_prefetch_0 ();
1508 /* PC is set and prefetch filled. */
1509 m68k_pc_offset = 0;
1510 break;
1511 case i_LINK:
1512 genamode (Apdi, "7", sz_long, "old", 2, 0);
1513 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1514 genastore ("src", Apdi, "7", sz_long, "old");
1515 genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1516 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1517 printf ("\tm68k_areg(regs, 7) += offs;\n");
1518 break;
1519 case i_UNLK:
1520 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1521 printf ("\tm68k_areg(regs, 7) = src;\n");
1522 genamode (Aipi, "7", sz_long, "old", 1, 0);
1523 genastore ("old", curi->smode, "srcreg", curi->size, "src");
1524 break;
1525 case i_RTS:
1526 printf ("\tm68k_do_rts();\n");
1527 fill_prefetch_0 ();
1528 m68k_pc_offset = 0;
1529 break;
1530 case i_TRAPV:
1531 sync_m68k_pc ();
1532 printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1533 need_endlabel = 1;
1534 break;
1535 case i_RTR:
1536 printf ("\tcompiler_flush_jsr_stack();\n");
1537 printf ("\tMakeSR();\n");
1538 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1539 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1540 printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1541 printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1542 fill_prefetch_0 ();
1543 printf ("\tMakeFromSR();\n");
1544 m68k_pc_offset = 0;
1545 break;
1546 case i_JSR:
1547 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1548 printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1549 fill_prefetch_0 ();
1550 m68k_pc_offset = 0;
1551 break;
1552 case i_JMP:
1553 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1554 printf ("\tm68k_setpc(srca);\n");
1555 fill_prefetch_0 ();
1556 m68k_pc_offset = 0;
1557 break;
1558 case i_BSR:
1559 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1560 printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1561 if (using_exception_3) {
1562 printf ("\tif (src & 1) {\n");
1563 printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1564 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1565 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1566 printf ("\t}\n");
1567 need_endlabel = 1;
1568 }
1569 printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1570 fill_prefetch_0 ();
1571 m68k_pc_offset = 0;
1572 break;
1573 case i_Bcc:
1574 if (curi->size == sz_long) {
1575 if (cpu_level < 2) {
1576 printf ("\tm68k_incpc(2);\n");
1577 printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1578 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1579 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1580 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1581 need_endlabel = 1;
1582 } else {
1583 if (next_cpu_level < 1)
1584 next_cpu_level = 1;
1585 }
1586 }
1587 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1588 printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1589 if (using_exception_3) {
1590 printf ("\tif (src & 1) {\n");
1591 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1592 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1593 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1594 printf ("\t}\n");
1595 need_endlabel = 1;
1596 }
1597 #ifdef USE_COMPILER
1598 printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1599 #else
1600 printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1601 #endif
1602 fill_prefetch_0 ();
1603 printf ("\tgoto %s;\n", endlabelstr);
1604 printf ("didnt_jump:;\n");
1605 need_endlabel = 1;
1606 break;
1607 case i_LEA:
1608 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1609 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1610 genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1611 break;
1612 case i_PEA:
1613 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1614 genamode (Apdi, "7", sz_long, "dst", 2, 0);
1615 genastore ("srca", Apdi, "7", sz_long, "dst");
1616 break;
1617 case i_DBcc:
1618 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1619 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1620
1621 printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1622 genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1623
1624 printf ("\t\tif (src) {\n");
1625 if (using_exception_3) {
1626 printf ("\t\t\tif (offs & 1) {\n");
1627 printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1628 printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1629 printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1630 printf ("\t\t}\n");
1631 need_endlabel = 1;
1632 }
1633 #ifdef USE_COMPILER
1634 printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1635 #else
1636 printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1637 #endif
1638 fill_prefetch_0 ();
1639 printf ("\t\tgoto %s;\n", endlabelstr);
1640 printf ("\t\t}\n");
1641 printf ("\t}\n");
1642 need_endlabel = 1;
1643 break;
1644 case i_Scc:
1645 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1646 start_brace ();
1647 printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1648 genastore ("val", curi->smode, "srcreg", curi->size, "src");
1649 break;
1650 case i_DIVU:
1651 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1652 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1653 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1654 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1655 printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1656 printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1657 /* The N flag appears to be set each time there is an overflow.
1658 * Weird. */
1659 printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1660 genflags (flag_logical, sz_word, "newv", "", "");
1661 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1662 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1663 printf ("\t}\n");
1664 printf ("\t}\n");
1665 insn_n_cycles += 68;
1666 need_endlabel = 1;
1667 break;
1668 case i_DIVS:
1669 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1670 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1671 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1672 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1673 printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1674 printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1675 printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1676 printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1677 genflags (flag_logical, sz_word, "newv", "", "");
1678 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1679 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1680 printf ("\t}\n");
1681 printf ("\t}\n");
1682 insn_n_cycles += 72;
1683 need_endlabel = 1;
1684 break;
1685 case i_MULU:
1686 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1687 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1688 start_brace ();
1689 printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1690 genflags (flag_logical, sz_long, "newv", "", "");
1691 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1692 insn_n_cycles += 32;
1693 break;
1694 case i_MULS:
1695 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1696 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1697 start_brace ();
1698 printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1699 genflags (flag_logical, sz_long, "newv", "", "");
1700 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1701 insn_n_cycles += 32;
1702 break;
1703 case i_CHK:
1704 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1705 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1706 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1707 printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1708 printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1709 need_endlabel = 1;
1710 break;
1711
1712 case i_CHK2:
1713 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1714 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1715 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1716 printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1717 switch (curi->size) {
1718 case sz_byte:
1719 printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1720 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1721 break;
1722 case sz_word:
1723 printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1724 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1725 break;
1726 case sz_long:
1727 printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1728 break;
1729 default:
1730 abort ();
1731 }
1732 printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1733 printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1734 printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1735 need_endlabel = 1;
1736 break;
1737
1738 case i_ASR:
1739 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1740 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1741 start_brace ();
1742 switch (curi->size) {
1743 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1744 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1745 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1746 default: abort ();
1747 }
1748 printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1749 printf ("\tcnt &= 63;\n");
1750 printf ("\tCLEAR_CZNV;\n");
1751 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1752 printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1753 printf ("\t\tSET_CFLG (sign);\n");
1754 duplicate_carry ();
1755 if (source_is_imm1_8 (curi))
1756 printf ("\t} else {\n");
1757 else
1758 printf ("\t} else if (cnt > 0) {\n");
1759 printf ("\t\tval >>= cnt - 1;\n");
1760 printf ("\t\tSET_CFLG (val & 1);\n");
1761 duplicate_carry ();
1762 printf ("\t\tval >>= 1;\n");
1763 printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1764 bit_mask (curi->size),
1765 bit_size (curi->size));
1766 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1767 printf ("\t}\n");
1768 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1769 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1770 break;
1771 case i_ASL:
1772 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1773 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1774 start_brace ();
1775 switch (curi->size) {
1776 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1777 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1778 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1779 default: abort ();
1780 }
1781 printf ("\tcnt &= 63;\n");
1782 printf ("\tCLEAR_CZNV;\n");
1783 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1784 printf ("\t\tSET_VFLG (val != 0);\n");
1785 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1786 bit_size (curi->size));
1787 duplicate_carry ();
1788 printf ("\t\tval = 0;\n");
1789 if (source_is_imm1_8 (curi))
1790 printf ("\t} else {\n");
1791 else
1792 printf ("\t} else if (cnt > 0) {\n");
1793 printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1794 bit_mask (curi->size),
1795 bit_size (curi->size) - 1,
1796 bit_mask (curi->size));
1797 printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1798 printf ("\t\tval <<= cnt - 1;\n");
1799 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1800 duplicate_carry ();
1801 printf ("\t\tval <<= 1;\n");
1802 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1803 printf ("\t}\n");
1804 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1805 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1806 break;
1807 case i_LSR:
1808 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1809 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1810 start_brace ();
1811 switch (curi->size) {
1812 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1813 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1814 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1815 default: abort ();
1816 }
1817 printf ("\tcnt &= 63;\n");
1818 printf ("\tCLEAR_CZNV;\n");
1819 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1820 printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1821 bit_size (curi->size), bit_size (curi->size) - 1);
1822 duplicate_carry ();
1823 printf ("\t\tval = 0;\n");
1824 if (source_is_imm1_8 (curi))
1825 printf ("\t} else {\n");
1826 else
1827 printf ("\t} else if (cnt > 0) {\n");
1828 printf ("\t\tval >>= cnt - 1;\n");
1829 printf ("\t\tSET_CFLG (val & 1);\n");
1830 duplicate_carry ();
1831 printf ("\t\tval >>= 1;\n");
1832 printf ("\t}\n");
1833 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1834 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1835 break;
1836 case i_LSL:
1837 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1838 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1839 start_brace ();
1840 switch (curi->size) {
1841 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1842 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1843 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1844 default: abort ();
1845 }
1846 printf ("\tcnt &= 63;\n");
1847 printf ("\tCLEAR_CZNV;\n");
1848 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1849 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1850 bit_size (curi->size));
1851 duplicate_carry ();
1852 printf ("\t\tval = 0;\n");
1853 if (source_is_imm1_8 (curi))
1854 printf ("\t} else {\n");
1855 else
1856 printf ("\t} else if (cnt > 0) {\n");
1857 printf ("\t\tval <<= (cnt - 1);\n");
1858 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1859 duplicate_carry ();
1860 printf ("\t\tval <<= 1;\n");
1861 printf ("\tval &= %s;\n", bit_mask (curi->size));
1862 printf ("\t}\n");
1863 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1864 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1865 break;
1866 case i_ROL:
1867 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1868 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1869 start_brace ();
1870 switch (curi->size) {
1871 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1872 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1873 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1874 default: abort ();
1875 }
1876 printf ("\tcnt &= 63;\n");
1877 printf ("\tCLEAR_CZNV;\n");
1878 if (source_is_imm1_8 (curi))
1879 printf ("{");
1880 else
1881 printf ("\tif (cnt > 0) {\n");
1882 printf ("\tuae_u32 loval;\n");
1883 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1884 printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1885 printf ("\tval <<= cnt;\n");
1886 printf ("\tval |= loval;\n");
1887 printf ("\tval &= %s;\n", bit_mask (curi->size));
1888 printf ("\tSET_CFLG (val & 1);\n");
1889 printf ("}\n");
1890 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1891 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1892 break;
1893 case i_ROR:
1894 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1895 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1896 start_brace ();
1897 switch (curi->size) {
1898 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1899 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1900 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1901 default: abort ();
1902 }
1903 printf ("\tcnt &= 63;\n");
1904 printf ("\tCLEAR_CZNV;\n");
1905 if (source_is_imm1_8 (curi))
1906 printf ("{");
1907 else
1908 printf ("\tif (cnt > 0) {");
1909 printf ("\tuae_u32 hival;\n");
1910 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1911 printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1912 printf ("\tval >>= cnt;\n");
1913 printf ("\tval |= hival;\n");
1914 printf ("\tval &= %s;\n", bit_mask (curi->size));
1915 printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1916 printf ("\t}\n");
1917 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1918 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1919 break;
1920 case i_ROXL:
1921 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1922 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1923 start_brace ();
1924 switch (curi->size) {
1925 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1926 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1927 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1928 default: abort ();
1929 }
1930 printf ("\tcnt &= 63;\n");
1931 printf ("\tCLEAR_CZNV;\n");
1932 if (! source_is_imm1_8 (curi))
1933 force_range_for_rox ("cnt", curi->size);
1934 if (source_is_imm1_8 (curi))
1935 printf ("{");
1936 else
1937 printf ("\tif (cnt > 0) {\n");
1938 printf ("\tcnt--;\n");
1939 printf ("\t{\n\tuae_u32 carry;\n");
1940 printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1941 printf ("\tcarry = loval & 1;\n");
1942 printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1943 printf ("\tSET_XFLG (carry);\n");
1944 printf ("\tval &= %s;\n", bit_mask (curi->size));
1945 printf ("\t} }\n");
1946 printf ("\tSET_CFLG (GET_XFLG);\n");
1947 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1948 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1949 break;
1950 case i_ROXR:
1951 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1952 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1953 start_brace ();
1954 switch (curi->size) {
1955 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1956 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1957 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1958 default: abort ();
1959 }
1960 printf ("\tcnt &= 63;\n");
1961 printf ("\tCLEAR_CZNV;\n");
1962 if (! source_is_imm1_8 (curi))
1963 force_range_for_rox ("cnt", curi->size);
1964 if (source_is_imm1_8 (curi))
1965 printf ("{");
1966 else
1967 printf ("\tif (cnt > 0) {\n");
1968 printf ("\tcnt--;\n");
1969 printf ("\t{\n\tuae_u32 carry;\n");
1970 printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
1971 printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
1972 printf ("\tval >>= cnt;\n");
1973 printf ("\tcarry = val & 1;\n");
1974 printf ("\tval >>= 1;\n");
1975 printf ("\tval |= hival;\n");
1976 printf ("\tSET_XFLG (carry);\n");
1977 printf ("\tval &= %s;\n", bit_mask (curi->size));
1978 printf ("\t} }\n");
1979 printf ("\tSET_CFLG (GET_XFLG);\n");
1980 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1981 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1982 break;
1983 case i_ASRW:
1984 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1985 start_brace ();
1986 switch (curi->size) {
1987 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1988 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1989 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1990 default: abort ();
1991 }
1992 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1993 printf ("\tuae_u32 cflg = val & 1;\n");
1994 printf ("\tval = (val >> 1) | sign;\n");
1995 genflags (flag_logical, curi->size, "val", "", "");
1996 printf ("\tSET_CFLG (cflg);\n");
1997 duplicate_carry ();
1998 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1999 break;
2000 case i_ASLW:
2001 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2002 start_brace ();
2003 switch (curi->size) {
2004 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2005 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2006 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2007 default: abort ();
2008 }
2009 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2010 printf ("\tuae_u32 sign2;\n");
2011 printf ("\tval <<= 1;\n");
2012 genflags (flag_logical, curi->size, "val", "", "");
2013 printf ("\tsign2 = %s & val;\n", cmask (curi->size));
2014 printf ("\tSET_CFLG (sign != 0);\n");
2015 duplicate_carry ();
2016
2017 printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
2018 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2019 break;
2020 case i_LSRW:
2021 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2022 start_brace ();
2023 switch (curi->size) {
2024 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2025 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2026 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2027 default: abort ();
2028 }
2029 printf ("\tuae_u32 carry = val & 1;\n");
2030 printf ("\tval >>= 1;\n");
2031 genflags (flag_logical, curi->size, "val", "", "");
2032 printf ("SET_CFLG (carry);\n");
2033 duplicate_carry ();
2034 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2035 break;
2036 case i_LSLW:
2037 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2038 start_brace ();
2039 switch (curi->size) {
2040 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2041 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2042 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2043 default: abort ();
2044 }
2045 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2046 printf ("\tval <<= 1;\n");
2047 genflags (flag_logical, curi->size, "val", "", "");
2048 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2049 duplicate_carry ();
2050 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2051 break;
2052 case i_ROLW:
2053 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2054 start_brace ();
2055 switch (curi->size) {
2056 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2057 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2058 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2059 default: abort ();
2060 }
2061 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2062 printf ("\tval <<= 1;\n");
2063 printf ("\tif (carry) val |= 1;\n");
2064 genflags (flag_logical, curi->size, "val", "", "");
2065 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2066 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2067 break;
2068 case i_RORW:
2069 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2070 start_brace ();
2071 switch (curi->size) {
2072 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2073 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2074 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2075 default: abort ();
2076 }
2077 printf ("\tuae_u32 carry = val & 1;\n");
2078 printf ("\tval >>= 1;\n");
2079 printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2080 genflags (flag_logical, curi->size, "val", "", "");
2081 printf ("SET_CFLG (carry);\n");
2082 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2083 break;
2084 case i_ROXLW:
2085 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2086 start_brace ();
2087 switch (curi->size) {
2088 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2089 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2090 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2091 default: abort ();
2092 }
2093 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2094 printf ("\tval <<= 1;\n");
2095 printf ("\tif (GET_XFLG) val |= 1;\n");
2096 genflags (flag_logical, curi->size, "val", "", "");
2097 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2098 duplicate_carry ();
2099 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2100 break;
2101 case i_ROXRW:
2102 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2103 start_brace ();
2104 switch (curi->size) {
2105 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2106 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2107 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2108 default: abort ();
2109 }
2110 printf ("\tuae_u32 carry = val & 1;\n");
2111 printf ("\tval >>= 1;\n");
2112 printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2113 genflags (flag_logical, curi->size, "val", "", "");
2114 printf ("SET_CFLG (carry);\n");
2115 duplicate_carry ();
2116 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2117 break;
2118 case i_MOVEC2:
2119 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2120 start_brace ();
2121 printf ("\tint regno = (src >> 12) & 15;\n");
2122 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2123 printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
2124 break;
2125 case i_MOVE2C:
2126 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2127 start_brace ();
2128 printf ("\tint regno = (src >> 12) & 15;\n");
2129 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2130 printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
2131 break;
2132 case i_CAS:
2133 {
2134 int old_brace_level;
2135 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2136 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2137 start_brace ();
2138 printf ("\tint ru = (src >> 6) & 7;\n");
2139 printf ("\tint rc = src & 7;\n");
2140 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2141 printf ("\tif (GET_ZFLG)");
2142 old_brace_level = n_braces;
2143 start_brace ();
2144 genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2145 pop_braces (old_brace_level);
2146 printf ("else");
2147 start_brace ();
2148 printf ("m68k_dreg(regs, rc) = dst;\n");
2149 pop_braces (old_brace_level);
2150 }
2151 break;
2152 case i_CAS2:
2153 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2154 printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2155 printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2156 if (curi->size == sz_word) {
2157 int old_brace_level = n_braces;
2158 printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2159 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2160 printf ("\tif (GET_ZFLG) {\n");
2161 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2162 printf ("\tif (GET_ZFLG) {\n");
2163 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2164 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2165 printf ("\t}}\n");
2166 pop_braces (old_brace_level);
2167 printf ("\tif (! GET_ZFLG) {\n");
2168 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2169 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2170 printf ("\t}\n");
2171 } else {
2172 int old_brace_level = n_braces;
2173 printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2174 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2175 printf ("\tif (GET_ZFLG) {\n");
2176 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2177 printf ("\tif (GET_ZFLG) {\n");
2178 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2179 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2180 printf ("\t}}\n");
2181 pop_braces (old_brace_level);
2182 printf ("\tif (! GET_ZFLG) {\n");
2183 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2184 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2185 printf ("\t}\n");
2186 }
2187 break;
2188 case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2189 {
2190 int old_brace_level;
2191 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2192 printf ("\tif (extra & 0x800)\n");
2193 old_brace_level = n_braces;
2194 start_brace ();
2195 printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2196 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2197 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2198 pop_braces (old_brace_level);
2199 printf ("else");
2200 start_brace ();
2201 genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2202 printf ("\tif (extra & 0x8000) {\n");
2203 switch (curi->size) {
2204 case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2205 case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2206 case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2207 default: abort ();
2208 }
2209 printf ("\t} else {\n");
2210 genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2211 printf ("\t}\n");
2212 pop_braces (old_brace_level);
2213 }
2214 break;
2215 case i_BKPT: /* only needed for hardware emulators */
2216 sync_m68k_pc ();
2217 printf ("\top_illg(opcode);\n");
2218 break;
2219 case i_CALLM: /* not present in 68030 */
2220 sync_m68k_pc ();
2221 printf ("\top_illg(opcode);\n");
2222 break;
2223 case i_RTM: /* not present in 68030 */
2224 sync_m68k_pc ();
2225 printf ("\top_illg(opcode);\n");
2226 break;
2227 case i_TRAPcc:
2228 if (curi->smode != am_unknown && curi->smode != am_illg)
2229 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2230 printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2231 need_endlabel = 1;
2232 break;
2233 case i_DIVL:
2234 sync_m68k_pc ();
2235 start_brace ();
2236 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2237 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2238 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2239 sync_m68k_pc ();
2240 printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2241 break;
2242 case i_MULL:
2243 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2244 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2245 sync_m68k_pc ();
2246 printf ("\tm68k_mull(opcode, dst, extra);\n");
2247 break;
2248 case i_BFTST:
2249 case i_BFEXTU:
2250 case i_BFCHG:
2251 case i_BFEXTS:
2252 case i_BFCLR:
2253 case i_BFFFO:
2254 case i_BFSET:
2255 case i_BFINS:
2256 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2257 genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2258 start_brace ();
2259 printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2260 printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2261 if (curi->dmode == Dreg) {
2262 printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2263 } else {
2264 printf ("\tuae_u32 tmp,bf0,bf1;\n");
2265 printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2266 printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2267 printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2268 }
2269 printf ("\ttmp >>= (32 - width);\n");
2270 printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2271 printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2272 switch (curi->mnemo) {
2273 case i_BFTST:
2274 break;
2275 case i_BFEXTU:
2276 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2277 break;
2278 case i_BFCHG:
2279 printf ("\ttmp = ~tmp;\n");
2280 break;
2281 case i_BFEXTS:
2282 printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2283 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2284 break;
2285 case i_BFCLR:
2286 printf ("\ttmp = 0;\n");
2287 break;
2288 case i_BFFFO:
2289 printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2290 printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2291 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2292 break;
2293 case i_BFSET:
2294 printf ("\ttmp = 0xffffffff;\n");
2295 break;
2296 case i_BFINS:
2297 printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2298 break;
2299 default:
2300 break;
2301 }
2302 if (curi->mnemo == i_BFCHG
2303 || curi->mnemo == i_BFCLR
2304 || curi->mnemo == i_BFSET
2305 || curi->mnemo == i_BFINS)
2306 {
2307 printf ("\ttmp <<= (32 - width);\n");
2308 if (curi->dmode == Dreg) {
2309 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2310 printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2311 printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2312 printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2313 printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2314 } else {
2315 printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2316 printf ("\t\t(tmp >> (offset & 7)) |\n");
2317 printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2318 printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2319 printf ("\tput_long(dsta,bf0 );\n");
2320 printf ("\tif (((offset & 7) + width) > 32) {\n");
2321 printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2322 printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2323 printf ("\t\tput_byte(dsta+4,bf1);\n");
2324 printf ("\t}\n");
2325 }
2326 }
2327 break;
2328 case i_PACK:
2329 if (curi->smode == Dreg) {
2330 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2331 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2332 } else {
2333 printf ("\tuae_u16 val;\n");
2334 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2335 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2336 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2337 printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2338 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2339 printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2340 }
2341 break;
2342 case i_UNPK:
2343 if (curi->smode == Dreg) {
2344 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2345 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2346 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2347 } else {
2348 printf ("\tuae_u16 val;\n");
2349 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2350 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2351 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2352 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2353 printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2354 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2355 printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2356 }
2357 break;
2358 case i_TAS:
2359 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2360 genflags (flag_logical, curi->size, "src", "", "");
2361 printf ("\tsrc |= 0x80;\n");
2362 genastore ("src", curi->smode, "srcreg", curi->size, "src");
2363 break;
2364 case i_FPP:
2365 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2366 sync_m68k_pc ();
2367 swap_opcode ();
2368 printf ("\tfpp_opp(opcode,extra);\n");
2369 break;
2370 case i_FDBcc:
2371 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2372 sync_m68k_pc ();
2373 swap_opcode ();
2374 printf ("\tfdbcc_opp(opcode,extra);\n");
2375 break;
2376 case i_FScc:
2377 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2378 sync_m68k_pc ();
2379 swap_opcode ();
2380 printf ("\tfscc_opp(opcode,extra);\n");
2381 break;
2382 case i_FTRAPcc:
2383 sync_m68k_pc ();
2384 start_brace ();
2385 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2386 if (curi->smode != am_unknown && curi->smode != am_illg)
2387 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2388 sync_m68k_pc ();
2389 swap_opcode ();
2390 printf ("\tftrapcc_opp(opcode,oldpc);\n");
2391 break;
2392 case i_FBcc:
2393 sync_m68k_pc ();
2394 start_brace ();
2395 printf ("\tuaecptr pc = m68k_getpc();\n");
2396 genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2397 sync_m68k_pc ();
2398 swap_opcode ();
2399 printf ("\tfbcc_opp(opcode,pc,extra);\n");
2400 break;
2401 case i_FSAVE:
2402 sync_m68k_pc ();
2403 swap_opcode ();
2404 printf ("\tfsave_opp(opcode);\n");
2405 break;
2406 case i_FRESTORE:
2407 sync_m68k_pc ();
2408 swap_opcode ();
2409 printf ("\tfrestore_opp(opcode);\n");
2410 break;
2411 case i_CINVL:
2412 case i_CINVP:
2413 case i_CINVA:
2414 case i_CPUSHL:
2415 case i_CPUSHP:
2416 case i_CPUSHA:
2417 break;
2418 case i_MOVE16:
2419 printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2420 printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2421 printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2422 printf ("\tput_long(memd, get_long(mems));\n");
2423 printf ("\tput_long(memd+4, get_long(mems+4));\n");
2424 printf ("\tput_long(memd+8, get_long(mems+8));\n");
2425 printf ("\tput_long(memd+12, get_long(mems+12));\n");
2426 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2427 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2428 break;
2429 case i_MMUOP:
2430 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2431 sync_m68k_pc ();
2432 swap_opcode ();
2433 printf ("\tmmu_op(opcode,extra);\n");
2434 break;
2435 default:
2436 abort ();
2437 break;
2438 }
2439 finish_braces ();
2440 sync_m68k_pc ();
2441 }
2442
2443 static void generate_includes (FILE * f)
2444 {
2445 fprintf (f, "#include \"sysdeps.h\"\n");
2446 fprintf (f, "#include \"m68k.h\"\n");
2447 fprintf (f, "#include \"memory.h\"\n");
2448 fprintf (f, "#include \"readcpu.h\"\n");
2449 fprintf (f, "#include \"newcpu.h\"\n");
2450 fprintf (f, "#include \"compiler.h\"\n");
2451 fprintf (f, "#include \"cputbl.h\"\n");
2452 }
2453
2454 static int postfix;
2455
2456 static void generate_one_opcode (int rp)
2457 {
2458 int i;
2459 uae_u16 smsk, dmsk;
2460 long int opcode = opcode_map[rp];
2461
2462 if (table68k[opcode].mnemo == i_ILLG
2463 || table68k[opcode].clev > cpu_level)
2464 return;
2465
2466 for (i = 0; lookuptab[i].name[0]; i++) {
2467 if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2468 break;
2469 }
2470
2471 if (table68k[opcode].handler != -1)
2472 return;
2473
2474 if (opcode_next_clev[rp] != cpu_level) {
2475 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2476 opcode, lookuptab[i].name);
2477 return;
2478 }
2479 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2480 fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2481 printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2482
2483 switch (table68k[opcode].stype) {
2484 case 0: smsk = 7; break;
2485 case 1: smsk = 255; break;
2486 case 2: smsk = 15; break;
2487 case 3: smsk = 7; break;
2488 case 4: smsk = 7; break;
2489 case 5: smsk = 63; break;
2490 default: abort ();
2491 }
2492 dmsk = 7;
2493
2494 next_cpu_level = -1;
2495 if (table68k[opcode].suse
2496 && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2497 && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2498 && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2499 && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2500 {
2501 if (table68k[opcode].spos == -1) {
2502 if (((int) table68k[opcode].sreg) >= 128)
2503 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2504 else
2505 printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2506 } else {
2507 char source[100];
2508 int pos = table68k[opcode].spos;
2509
2510 #if 0
2511 /* Check that we can do the little endian optimization safely. */
2512 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2513 abort ();
2514 #endif
2515 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2516
2517 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2518 sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2519 pos ^ 8, 8 - pos, dmsk);
2520 else if (pos != 8)
2521 sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2522 else
2523 sprintf (source, "(opcode & %d)", smsk);
2524
2525 if (table68k[opcode].stype == 3)
2526 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2527 else if (table68k[opcode].stype == 1)
2528 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2529 else
2530 printf ("\tuae_u32 srcreg = %s;\n", source);
2531
2532 printf ("#else\n");
2533
2534 if (pos)
2535 sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2536 else
2537 sprintf (source, "(opcode & %d)", smsk);
2538
2539 if (table68k[opcode].stype == 3)
2540 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2541 else if (table68k[opcode].stype == 1)
2542 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2543 else
2544 printf ("\tuae_u32 srcreg = %s;\n", source);
2545
2546 printf ("#endif\n");
2547 }
2548 }
2549 if (table68k[opcode].duse
2550 /* Yes, the dmode can be imm, in case of LINK or DBcc */
2551 && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2552 && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2553 && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2554 {
2555 if (table68k[opcode].dpos == -1) {
2556 if (((int) table68k[opcode].dreg) >= 128)
2557 printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2558 else
2559 printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2560 } else {
2561 int pos = table68k[opcode].dpos;
2562 #if 0
2563 /* Check that we can do the little endian optimization safely. */
2564 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2565 abort ();
2566 #endif
2567 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2568
2569 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2570 printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2571 pos ^ 8, 8 - pos, dmsk);
2572 else if (pos != 8)
2573 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2574 pos ^ 8, dmsk);
2575 else
2576 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2577
2578 printf ("#else\n");
2579
2580 if (pos)
2581 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2582 pos, dmsk);
2583 else
2584 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2585
2586 printf ("#endif\n");
2587 }
2588 }
2589 need_endlabel = 0;
2590 endlabelno++;
2591 sprintf (endlabelstr, "endlabel%d", endlabelno);
2592 gen_opcode (opcode);
2593 if (need_endlabel)
2594 printf ("%s: ;\n", endlabelstr);
2595 printf ("return %d;\n", insn_n_cycles);
2596 printf ("}\n");
2597 opcode_next_clev[rp] = next_cpu_level;
2598 opcode_last_postfix[rp] = postfix;
2599 }
2600
2601 static void generate_func (void)
2602 {
2603 int i, j, rp;
2604
2605 using_prefetch = 0;
2606 using_exception_3 = 0;
2607 for (i = 0; i < 6; i++) {
2608 cpu_level = 4 - i;
2609 if (i == 5) {
2610 cpu_level = 0;
2611 using_prefetch = 1;
2612 using_exception_3 = 1;
2613 for (rp = 0; rp < nr_cpuop_funcs; rp++)
2614 opcode_next_clev[rp] = 0;
2615 }
2616 postfix = i;
2617 fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2618
2619 /* sam: this is for people with low memory (eg. me :)) */
2620 printf ("\n"
2621 "#if !defined(PART_1) && !defined(PART_2) && "
2622 "!defined(PART_3) && !defined(PART_4) && "
2623 "!defined(PART_5) && !defined(PART_6) && "
2624 "!defined(PART_7) && !defined(PART_8)"
2625 "\n"
2626 "#define PART_1 1\n"
2627 "#define PART_2 1\n"
2628 "#define PART_3 1\n"
2629 "#define PART_4 1\n"
2630 "#define PART_5 1\n"
2631 "#define PART_6 1\n"
2632 "#define PART_7 1\n"
2633 "#define PART_8 1\n"
2634 "#endif\n\n");
2635
2636 rp = 0;
2637 for(j=1;j<=8;++j) {
2638 int k = (j*nr_cpuop_funcs)/8;
2639 printf ("#ifdef PART_%d\n",j);
2640 for (; rp < k; rp++)
2641 generate_one_opcode (rp);
2642 printf ("#endif\n\n");
2643 }
2644
2645 fprintf (stblfile, "{ 0, 0, 0 }};\n");
2646 }
2647 }
2648
2649 int main (int argc, char **argv)
2650 {
2651 read_table68k ();
2652 do_merges ();
2653
2654 opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2655 opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2656 opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2657 counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2658 read_counts ();
2659
2660 /* It would be a lot nicer to put all in one file (we'd also get rid of
2661 * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2662 * I don't dare to touch the 68k version. */
2663
2664 headerfile = fopen ("cputbl.h", "wb");
2665 stblfile = fopen ("cpustbl.cpp", "wb");
2666 freopen ("cpuemu.cpp", "wb", stdout);
2667
2668 generate_includes (stdout);
2669 generate_includes (stblfile);
2670
2671 generate_func ();
2672
2673 free (table68k);
2674 return 0;
2675 }