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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.20
Committed: 2002-11-02T18:13:27Z (21 years, 8 months ago) by gbeauche
Content type: text/plain
Branch: MAIN
CVS Tags: nigel-build-12, nigel-build-13, nigel-build-16, nigel-build-15
Changes since 1.19: +4 -23 lines
Log Message:
Remove obsolete CFLOW_* constants but keep cpuop_{begin,end} for an
inline-threaded core.

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation generator
5 *
6 * This is a fairly stupid program that generates a lot of case labels that
7 * can be #included in a switch statement.
8 * As an alternative, it can generate functions that handle specific
9 * MC68000 instructions, plus a prototype header file and a function pointer
10 * array to look up the function for an opcode.
11 * Error checking is bad, an illegal table68k file will cause the program to
12 * call abort().
13 * The generated code is sometimes sub-optimal, an optimizing compiler should
14 * take care of this.
15 *
16 * Copyright 1995, 1996 Bernd Schmidt
17 */
18
19 #include <ctype.h>
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23
24 #include "sysdeps.h"
25 #include "readcpu.h"
26
27 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28 #define SPARC_ASSEMBLY 0
29 #endif
30
31 #define BOOL_TYPE "int"
32
33 static FILE *headerfile;
34 static FILE *stblfile;
35
36 static int using_prefetch;
37 static int using_exception_3;
38 static int cpu_level;
39
40 /* For the current opcode, the next lower level that will have different code.
41 * Initialized to -1 for each opcode. If it remains unchanged, indicates we
42 * are done with that opcode. */
43 static int next_cpu_level;
44
45 static int *opcode_map;
46 static int *opcode_next_clev;
47 static int *opcode_last_postfix;
48 static unsigned long *counts;
49
50 static void read_counts (void)
51 {
52 FILE *file;
53 unsigned long opcode, count, total;
54 char name[20];
55 int nr = 0;
56 memset (counts, 0, 65536 * sizeof *counts);
57
58 file = fopen ("frequent.68k", "r");
59 if (file) {
60 fscanf (file, "Total: %lu\n", &total);
61 while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
62 opcode_next_clev[nr] = 4;
63 opcode_last_postfix[nr] = -1;
64 opcode_map[nr++] = opcode;
65 counts[opcode] = count;
66 }
67 fclose (file);
68 }
69 if (nr == nr_cpuop_funcs)
70 return;
71 for (opcode = 0; opcode < 0x10000; opcode++) {
72 if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
73 && counts[opcode] == 0)
74 {
75 opcode_next_clev[nr] = 4;
76 opcode_last_postfix[nr] = -1;
77 opcode_map[nr++] = opcode;
78 counts[opcode] = count;
79 }
80 }
81 if (nr != nr_cpuop_funcs)
82 abort ();
83 }
84
85 static char endlabelstr[80];
86 static int endlabelno = 0;
87 static int need_endlabel;
88
89 static int n_braces = 0;
90 static int m68k_pc_offset = 0;
91 static int insn_n_cycles;
92
93 static void start_brace (void)
94 {
95 n_braces++;
96 printf ("{");
97 }
98
99 static void close_brace (void)
100 {
101 assert (n_braces > 0);
102 n_braces--;
103 printf ("}");
104 }
105
106 static void finish_braces (void)
107 {
108 while (n_braces > 0)
109 close_brace ();
110 }
111
112 static void pop_braces (int to)
113 {
114 while (n_braces > to)
115 close_brace ();
116 }
117
118 static int bit_size (int size)
119 {
120 switch (size) {
121 case sz_byte: return 8;
122 case sz_word: return 16;
123 case sz_long: return 32;
124 default: abort ();
125 }
126 return 0;
127 }
128
129 static const char *bit_mask (int size)
130 {
131 switch (size) {
132 case sz_byte: return "0xff";
133 case sz_word: return "0xffff";
134 case sz_long: return "0xffffffff";
135 default: abort ();
136 }
137 return 0;
138 }
139
140 static const char *gen_nextilong (void)
141 {
142 static char buffer[80];
143 int r = m68k_pc_offset;
144 m68k_pc_offset += 4;
145
146 insn_n_cycles += 4;
147
148 if (using_prefetch)
149 sprintf (buffer, "get_ilong_prefetch(%d)", r);
150 else
151 sprintf (buffer, "get_ilong(%d)", r);
152 return buffer;
153 }
154
155 static const char *gen_nextiword (void)
156 {
157 static char buffer[80];
158 int r = m68k_pc_offset;
159 m68k_pc_offset += 2;
160
161 insn_n_cycles += 2;
162
163 if (using_prefetch)
164 sprintf (buffer, "get_iword_prefetch(%d)", r);
165 else
166 sprintf (buffer, "get_iword(%d)", r);
167 return buffer;
168 }
169
170 static const char *gen_nextibyte (void)
171 {
172 static char buffer[80];
173 int r = m68k_pc_offset;
174 m68k_pc_offset += 2;
175
176 insn_n_cycles += 2;
177
178 if (using_prefetch)
179 sprintf (buffer, "get_ibyte_prefetch(%d)", r);
180 else
181 sprintf (buffer, "get_ibyte(%d)", r);
182 return buffer;
183 }
184
185 static void fill_prefetch_0 (void)
186 {
187 if (using_prefetch)
188 printf ("fill_prefetch_0 ();\n");
189 }
190
191 static void fill_prefetch_2 (void)
192 {
193 if (using_prefetch)
194 printf ("fill_prefetch_2 ();\n");
195 }
196
197 static void swap_opcode (void)
198 {
199 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
200 printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
201 printf ("#endif\n");
202 }
203
204 static void sync_m68k_pc (void)
205 {
206 if (m68k_pc_offset == 0)
207 return;
208 printf ("m68k_incpc(%d);\n", m68k_pc_offset);
209 switch (m68k_pc_offset) {
210 case 0:
211 /*fprintf (stderr, "refilling prefetch at 0\n"); */
212 break;
213 case 2:
214 fill_prefetch_2 ();
215 break;
216 default:
217 fill_prefetch_0 ();
218 break;
219 }
220 m68k_pc_offset = 0;
221 }
222
223 /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224 * the calling routine handles Apdi and Aipi modes.
225 * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
226 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
227 {
228 start_brace ();
229 switch (mode) {
230 case Dreg:
231 if (movem)
232 abort ();
233 if (getv == 1)
234 switch (size) {
235 case sz_byte:
236 #if defined(AMIGA) && !defined(WARPUP)
237 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
238 /* if it is not done like that: */
239 printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
240 #else
241 printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
242 #endif
243 break;
244 case sz_word:
245 #if defined(AMIGA) && !defined(WARPUP)
246 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
247 #else
248 printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
249 #endif
250 break;
251 case sz_long:
252 printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
253 break;
254 default:
255 abort ();
256 }
257 return;
258 case Areg:
259 if (movem)
260 abort ();
261 if (getv == 1)
262 switch (size) {
263 case sz_word:
264 printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
265 break;
266 case sz_long:
267 printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
268 break;
269 default:
270 abort ();
271 }
272 return;
273 case Aind:
274 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
275 break;
276 case Aipi:
277 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
278 break;
279 case Apdi:
280 switch (size) {
281 case sz_byte:
282 if (movem)
283 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
284 else
285 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
286 break;
287 case sz_word:
288 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
289 break;
290 case sz_long:
291 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
292 break;
293 default:
294 abort ();
295 }
296 break;
297 case Ad16:
298 printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
299 break;
300 case Ad8r:
301 if (cpu_level > 1) {
302 if (next_cpu_level < 1)
303 next_cpu_level = 1;
304 sync_m68k_pc ();
305 start_brace ();
306 printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
307 } else
308 printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
309
310 break;
311 case PC16:
312 printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
313 printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
314 break;
315 case PC8r:
316 if (cpu_level > 1) {
317 if (next_cpu_level < 1)
318 next_cpu_level = 1;
319 sync_m68k_pc ();
320 start_brace ();
321 printf ("\tuaecptr tmppc = m68k_getpc();\n");
322 printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
323 } else {
324 printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
325 printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
326 }
327
328 break;
329 case absw:
330 printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
331 break;
332 case absl:
333 printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
334 break;
335 case imm:
336 if (getv != 1)
337 abort ();
338 switch (size) {
339 case sz_byte:
340 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
341 break;
342 case sz_word:
343 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
344 break;
345 case sz_long:
346 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
347 break;
348 default:
349 abort ();
350 }
351 return;
352 case imm0:
353 if (getv != 1)
354 abort ();
355 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
356 return;
357 case imm1:
358 if (getv != 1)
359 abort ();
360 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
361 return;
362 case imm2:
363 if (getv != 1)
364 abort ();
365 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
366 return;
367 case immi:
368 if (getv != 1)
369 abort ();
370 printf ("\tuae_u32 %s = %s;\n", name, reg);
371 return;
372 default:
373 abort ();
374 }
375
376 /* We get here for all non-reg non-immediate addressing modes to
377 * actually fetch the value. */
378
379 if (using_exception_3 && getv != 0 && size != sz_byte) {
380 printf ("\tif ((%sa & 1) != 0) {\n", name);
381 printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
382 printf ("\t\tlast_op_for_exception_3 = opcode;\n");
383 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
384 printf ("\t\tException(3, 0);\n");
385 printf ("\t\tgoto %s;\n", endlabelstr);
386 printf ("\t}\n");
387 need_endlabel = 1;
388 start_brace ();
389 }
390
391 if (getv == 1) {
392 switch (size) {
393 case sz_byte: insn_n_cycles += 2; break;
394 case sz_word: insn_n_cycles += 2; break;
395 case sz_long: insn_n_cycles += 4; break;
396 default: abort ();
397 }
398 start_brace ();
399 switch (size) {
400 case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
401 case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
402 case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
403 default: abort ();
404 }
405 }
406
407 /* We now might have to fix up the register for pre-dec or post-inc
408 * addressing modes. */
409 if (!movem)
410 switch (mode) {
411 case Aipi:
412 switch (size) {
413 case sz_byte:
414 printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
415 break;
416 case sz_word:
417 printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
418 break;
419 case sz_long:
420 printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
421 break;
422 default:
423 abort ();
424 }
425 break;
426 case Apdi:
427 printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
428 break;
429 default:
430 break;
431 }
432 }
433
434 static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
435 {
436 switch (mode) {
437 case Dreg:
438 switch (size) {
439 case sz_byte:
440 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
441 break;
442 case sz_word:
443 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
444 break;
445 case sz_long:
446 printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
447 break;
448 default:
449 abort ();
450 }
451 break;
452 case Areg:
453 switch (size) {
454 case sz_word:
455 fprintf (stderr, "Foo\n");
456 printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
457 break;
458 case sz_long:
459 printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
460 break;
461 default:
462 abort ();
463 }
464 break;
465 case Aind:
466 case Aipi:
467 case Apdi:
468 case Ad16:
469 case Ad8r:
470 case absw:
471 case absl:
472 case PC16:
473 case PC8r:
474 if (using_prefetch)
475 sync_m68k_pc ();
476 switch (size) {
477 case sz_byte:
478 insn_n_cycles += 2;
479 printf ("\tput_byte(%sa,%s);\n", to, from);
480 break;
481 case sz_word:
482 insn_n_cycles += 2;
483 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
484 abort ();
485 printf ("\tput_word(%sa,%s);\n", to, from);
486 break;
487 case sz_long:
488 insn_n_cycles += 4;
489 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
490 abort ();
491 printf ("\tput_long(%sa,%s);\n", to, from);
492 break;
493 default:
494 abort ();
495 }
496 break;
497 case imm:
498 case imm0:
499 case imm1:
500 case imm2:
501 case immi:
502 abort ();
503 break;
504 default:
505 abort ();
506 }
507 }
508
509 static void genmovemel (uae_u16 opcode)
510 {
511 char getcode[100];
512 int size = table68k[opcode].size == sz_long ? 4 : 2;
513
514 if (table68k[opcode].size == sz_long) {
515 strcpy (getcode, "get_long(srca)");
516 } else {
517 strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
518 }
519
520 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
521 printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
522 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
523 start_brace ();
524 printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
525 getcode, size);
526 printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
527 getcode, size);
528
529 if (table68k[opcode].dmode == Aipi)
530 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
531 }
532
533 static void genmovemle (uae_u16 opcode)
534 {
535 char putcode[100];
536 int size = table68k[opcode].size == sz_long ? 4 : 2;
537 if (table68k[opcode].size == sz_long) {
538 strcpy (putcode, "put_long(srca,");
539 } else {
540 strcpy (putcode, "put_word(srca,");
541 }
542
543 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
544 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
545 if (using_prefetch)
546 sync_m68k_pc ();
547
548 start_brace ();
549 if (table68k[opcode].dmode == Apdi) {
550 printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
551 printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
552 size, putcode);
553 printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
554 size, putcode);
555 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
556 } else {
557 printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
558 printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
559 putcode, size);
560 printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
561 putcode, size);
562 }
563 }
564
565 static void duplicate_carry (void)
566 {
567 printf ("\tCOPY_CARRY;\n");
568 }
569
570 typedef enum {
571 flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
572 flag_av, flag_sv
573 } flagtypes;
574
575 static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
576 {
577 char vstr[100], sstr[100], dstr[100];
578 char usstr[100], udstr[100];
579 char unsstr[100], undstr[100];
580
581 switch (size) {
582 case sz_byte:
583 strcpy (vstr, "((uae_s8)(");
584 strcpy (usstr, "((uae_u8)(");
585 break;
586 case sz_word:
587 strcpy (vstr, "((uae_s16)(");
588 strcpy (usstr, "((uae_u16)(");
589 break;
590 case sz_long:
591 strcpy (vstr, "((uae_s32)(");
592 strcpy (usstr, "((uae_u32)(");
593 break;
594 default:
595 abort ();
596 }
597 strcpy (unsstr, usstr);
598
599 strcpy (sstr, vstr);
600 strcpy (dstr, vstr);
601 strcat (vstr, value);
602 strcat (vstr, "))");
603 strcat (dstr, dst);
604 strcat (dstr, "))");
605 strcat (sstr, src);
606 strcat (sstr, "))");
607
608 strcpy (udstr, usstr);
609 strcat (udstr, dst);
610 strcat (udstr, "))");
611 strcat (usstr, src);
612 strcat (usstr, "))");
613
614 strcpy (undstr, unsstr);
615 strcat (unsstr, "-");
616 strcat (undstr, "~");
617 strcat (undstr, dst);
618 strcat (undstr, "))");
619 strcat (unsstr, src);
620 strcat (unsstr, "))");
621
622 switch (type) {
623 case flag_logical_noclobber:
624 case flag_logical:
625 case flag_zn:
626 case flag_av:
627 case flag_sv:
628 case flag_addx:
629 case flag_subx:
630 break;
631
632 case flag_add:
633 start_brace ();
634 printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
635 break;
636 case flag_sub:
637 case flag_cmp:
638 start_brace ();
639 printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
640 break;
641 }
642
643 switch (type) {
644 case flag_logical_noclobber:
645 case flag_logical:
646 case flag_zn:
647 break;
648
649 case flag_add:
650 case flag_sub:
651 case flag_addx:
652 case flag_subx:
653 case flag_cmp:
654 case flag_av:
655 case flag_sv:
656 start_brace ();
657 printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
658 printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
659 printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
660 break;
661 }
662
663 switch (type) {
664 case flag_logical:
665 printf ("\tCLEAR_CZNV;\n");
666 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
667 printf ("\tSET_NFLG (%s < 0);\n", vstr);
668 break;
669 case flag_logical_noclobber:
670 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
671 printf ("\tSET_NFLG (%s < 0);\n", vstr);
672 break;
673 case flag_av:
674 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
675 break;
676 case flag_sv:
677 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
678 break;
679 case flag_zn:
680 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
681 printf ("\tSET_NFLG (%s < 0);\n", vstr);
682 break;
683 case flag_add:
684 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
685 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
686 printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
687 duplicate_carry ();
688 printf ("\tSET_NFLG (flgn != 0);\n");
689 break;
690 case flag_sub:
691 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
692 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
693 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
694 duplicate_carry ();
695 printf ("\tSET_NFLG (flgn != 0);\n");
696 break;
697 case flag_addx:
698 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
699 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
700 duplicate_carry ();
701 break;
702 case flag_subx:
703 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
704 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
705 duplicate_carry ();
706 break;
707 case flag_cmp:
708 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
709 printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
710 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
711 printf ("\tSET_NFLG (flgn != 0);\n");
712 break;
713 }
714 }
715
716 static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717 {
718 /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
719 them in the appropriate m68k.h files and use just one copy of this
720 code here. The API can be changed if necessary. */
721 #ifdef OPTIMIZED_FLAGS
722 switch (type) {
723 case flag_add:
724 case flag_sub:
725 start_brace ();
726 printf ("\tuae_u32 %s;\n", value);
727 break;
728 default:
729 break;
730 }
731
732 /* At least some of those casts are fairly important! */
733 switch (type) {
734 case flag_logical_noclobber:
735 printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
736 if (strcmp (value, "0") == 0) {
737 printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
738 } else {
739 switch (size) {
740 case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
741 case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
742 case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
743 }
744 printf ("\tIOR_CZNV (oldcznv);\n");
745 }
746 printf ("\t}\n");
747 return;
748
749 case flag_logical:
750 if (strcmp (value, "0") == 0) {
751 printf ("\tSET_CZNV (FLAGVAL_Z);\n");
752 } else {
753 switch (size) {
754 case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
755 case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
756 case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
757 }
758 }
759 return;
760
761 case flag_add:
762 switch (size) {
763 case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
764 case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
765 case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
766 }
767 return;
768
769 case flag_sub:
770 switch (size) {
771 case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
772 case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
773 case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
774 }
775 return;
776
777 case flag_cmp:
778 switch (size) {
779 case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
780 case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
781 case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
782 }
783 return;
784
785 default:
786 break;
787 }
788 #endif
789 genflags_normal (type, size, value, src, dst);
790 }
791
792 static void force_range_for_rox (const char *var, wordsizes size)
793 {
794 /* Could do a modulo operation here... which one is faster? */
795 switch (size) {
796 case sz_long:
797 printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
798 break;
799 case sz_word:
800 printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
801 printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
802 break;
803 case sz_byte:
804 printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
805 printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
806 printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
807 break;
808 }
809 }
810
811 static const char *cmask (wordsizes size)
812 {
813 switch (size) {
814 case sz_byte: return "0x80";
815 case sz_word: return "0x8000";
816 case sz_long: return "0x80000000";
817 default: abort ();
818 }
819 }
820
821 static int source_is_imm1_8 (struct instr *i)
822 {
823 return i->stype == 3;
824 }
825
826 static void gen_opcode (unsigned long int opcode)
827 {
828 struct instr *curi = table68k + opcode;
829 insn_n_cycles = 2;
830
831 start_brace ();
832 #if 0
833 printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
834 #endif
835 m68k_pc_offset = 2;
836 switch (curi->plev) {
837 case 0: /* not privileged */
838 break;
839 case 1: /* unprivileged only on 68000 */
840 if (cpu_level == 0)
841 break;
842 if (next_cpu_level < 0)
843 next_cpu_level = 0;
844
845 /* fall through */
846 case 2: /* priviledged */
847 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
848 need_endlabel = 1;
849 start_brace ();
850 break;
851 case 3: /* privileged if size == word */
852 if (curi->size == sz_byte)
853 break;
854 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
855 need_endlabel = 1;
856 start_brace ();
857 break;
858 }
859 switch (curi->mnemo) {
860 case i_OR:
861 case i_AND:
862 case i_EOR:
863 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
864 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
865 printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
866 genflags (flag_logical, curi->size, "src", "", "");
867 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
868 break;
869 case i_ORSR:
870 case i_EORSR:
871 printf ("\tMakeSR();\n");
872 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
873 if (curi->size == sz_byte) {
874 printf ("\tsrc &= 0xFF;\n");
875 }
876 printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
877 printf ("\tMakeFromSR();\n");
878 break;
879 case i_ANDSR:
880 printf ("\tMakeSR();\n");
881 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
882 if (curi->size == sz_byte) {
883 printf ("\tsrc |= 0xFF00;\n");
884 }
885 printf ("\tregs.sr &= src;\n");
886 printf ("\tMakeFromSR();\n");
887 break;
888 case i_SUB:
889 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
890 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
891 start_brace ();
892 genflags (flag_sub, curi->size, "newv", "src", "dst");
893 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
894 break;
895 case i_SUBA:
896 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
897 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
898 start_brace ();
899 printf ("\tuae_u32 newv = dst - src;\n");
900 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
901 break;
902 case i_SUBX:
903 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
904 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
905 start_brace ();
906 printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
907 genflags (flag_subx, curi->size, "newv", "src", "dst");
908 genflags (flag_zn, curi->size, "newv", "", "");
909 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
910 break;
911 case i_SBCD:
912 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
913 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
914 start_brace ();
915 printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
916 printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
917 printf ("\tuae_u16 newv, tmp_newv;\n");
918 printf ("\tint bcd = 0;\n");
919 printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
920 printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
921 printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
922 printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
923 duplicate_carry ();
924 genflags (flag_zn, curi->size, "newv", "", "");
925 printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
926 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
927 break;
928 case i_ADD:
929 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
930 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
931 start_brace ();
932 genflags (flag_add, curi->size, "newv", "src", "dst");
933 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
934 break;
935 case i_ADDA:
936 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
937 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
938 start_brace ();
939 printf ("\tuae_u32 newv = dst + src;\n");
940 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
941 break;
942 case i_ADDX:
943 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
944 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
945 start_brace ();
946 printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
947 genflags (flag_addx, curi->size, "newv", "src", "dst");
948 genflags (flag_zn, curi->size, "newv", "", "");
949 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
950 break;
951 case i_ABCD:
952 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
953 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
954 start_brace ();
955 printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
956 printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
957 printf ("\tuae_u16 newv, tmp_newv;\n");
958 printf ("\tint cflg;\n");
959 printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
960 printf ("\tif (newv_lo > 9) { newv += 6; }\n");
961 printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
962 printf ("\tif (cflg) newv += 0x60;\n");
963 printf ("\tSET_CFLG (cflg);\n");
964 duplicate_carry ();
965 genflags (flag_zn, curi->size, "newv", "", "");
966 printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
967 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
968 break;
969 case i_NEG:
970 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
971 start_brace ();
972 genflags (flag_sub, curi->size, "dst", "src", "0");
973 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
974 break;
975 case i_NEGX:
976 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
977 start_brace ();
978 printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
979 genflags (flag_subx, curi->size, "newv", "src", "0");
980 genflags (flag_zn, curi->size, "newv", "", "");
981 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
982 break;
983 case i_NBCD:
984 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
985 start_brace ();
986 printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
987 printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
988 printf ("\tuae_u16 newv;\n");
989 printf ("\tint cflg;\n");
990 printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
991 printf ("\tnewv = newv_hi + newv_lo;\n");
992 printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
993 printf ("\tif (cflg) newv -= 0x60;\n");
994 printf ("\tSET_CFLG (cflg);\n");
995 duplicate_carry();
996 genflags (flag_zn, curi->size, "newv", "", "");
997 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
998 break;
999 case i_CLR:
1000 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1001 genflags (flag_logical, curi->size, "0", "", "");
1002 genastore ("0", curi->smode, "srcreg", curi->size, "src");
1003 break;
1004 case i_NOT:
1005 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1006 start_brace ();
1007 printf ("\tuae_u32 dst = ~src;\n");
1008 genflags (flag_logical, curi->size, "dst", "", "");
1009 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1010 break;
1011 case i_TST:
1012 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1013 genflags (flag_logical, curi->size, "src", "", "");
1014 break;
1015 case i_BTST:
1016 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1017 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1018 if (curi->size == sz_byte)
1019 printf ("\tsrc &= 7;\n");
1020 else
1021 printf ("\tsrc &= 31;\n");
1022 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1023 break;
1024 case i_BCHG:
1025 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1026 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1027 if (curi->size == sz_byte)
1028 printf ("\tsrc &= 7;\n");
1029 else
1030 printf ("\tsrc &= 31;\n");
1031 printf ("\tdst ^= (1 << src);\n");
1032 printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1033 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1034 break;
1035 case i_BCLR:
1036 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1037 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1038 if (curi->size == sz_byte)
1039 printf ("\tsrc &= 7;\n");
1040 else
1041 printf ("\tsrc &= 31;\n");
1042 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1043 printf ("\tdst &= ~(1 << src);\n");
1044 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1045 break;
1046 case i_BSET:
1047 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1048 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1049 if (curi->size == sz_byte)
1050 printf ("\tsrc &= 7;\n");
1051 else
1052 printf ("\tsrc &= 31;\n");
1053 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1054 printf ("\tdst |= (1 << src);\n");
1055 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1056 break;
1057 case i_CMPM:
1058 case i_CMP:
1059 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1060 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1061 start_brace ();
1062 genflags (flag_cmp, curi->size, "newv", "src", "dst");
1063 break;
1064 case i_CMPA:
1065 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1066 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1067 start_brace ();
1068 genflags (flag_cmp, sz_long, "newv", "src", "dst");
1069 break;
1070 /* The next two are coded a little unconventional, but they are doing
1071 * weird things... */
1072 case i_MVPRM:
1073 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1074
1075 printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1076 if (curi->size == sz_word) {
1077 printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1078 } else {
1079 printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1080 printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1081 }
1082 break;
1083 case i_MVPMR:
1084 printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1085 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1086 if (curi->size == sz_word) {
1087 printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1088 } else {
1089 printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1090 printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1091 }
1092 genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1093 break;
1094 case i_MOVE:
1095 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1096 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1097 genflags (flag_logical, curi->size, "src", "", "");
1098 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1099 break;
1100 case i_MOVEA:
1101 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1102 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1103 if (curi->size == sz_word) {
1104 printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1105 } else {
1106 printf ("\tuae_u32 val = src;\n");
1107 }
1108 genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1109 break;
1110 case i_MVSR2:
1111 genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1112 printf ("\tMakeSR();\n");
1113 if (curi->size == sz_byte)
1114 genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1115 else
1116 genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1117 break;
1118 case i_MV2SR:
1119 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1120 if (curi->size == sz_byte)
1121 printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1122 else {
1123 printf ("\tregs.sr = src;\n");
1124 }
1125 printf ("\tMakeFromSR();\n");
1126 break;
1127 case i_SWAP:
1128 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1129 start_brace ();
1130 printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1131 genflags (flag_logical, sz_long, "dst", "", "");
1132 genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1133 break;
1134 case i_EXG:
1135 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1136 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1137 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1138 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1139 break;
1140 case i_EXT:
1141 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1142 start_brace ();
1143 switch (curi->size) {
1144 case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1145 case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1146 case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1147 default: abort ();
1148 }
1149 genflags (flag_logical,
1150 curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1151 genastore ("dst", curi->smode, "srcreg",
1152 curi->size == sz_word ? sz_word : sz_long, "src");
1153 break;
1154 case i_MVMEL:
1155 genmovemel (opcode);
1156 break;
1157 case i_MVMLE:
1158 genmovemle (opcode);
1159 break;
1160 case i_TRAP:
1161 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1162 sync_m68k_pc ();
1163 printf ("\tException(src+32,0);\n");
1164 m68k_pc_offset = 0;
1165 break;
1166 case i_MVR2USP:
1167 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1168 printf ("\tregs.usp = src;\n");
1169 break;
1170 case i_MVUSP2R:
1171 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1172 genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1173 break;
1174 case i_RESET:
1175 break;
1176 case i_NOP:
1177 break;
1178 case i_STOP:
1179 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1180 printf ("\tregs.sr = src;\n");
1181 printf ("\tMakeFromSR();\n");
1182 printf ("\tm68k_setstopped(1);\n");
1183 break;
1184 case i_RTE:
1185 if (cpu_level == 0) {
1186 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1187 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1188 printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1189 fill_prefetch_0 ();
1190 printf ("\tMakeFromSR();\n");
1191 } else {
1192 int old_brace_level = n_braces;
1193 if (next_cpu_level < 0)
1194 next_cpu_level = 0;
1195 printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1196 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1197 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1198 genamode (Aipi, "7", sz_word, "format", 1, 0);
1199 printf ("\tnewsr = sr; newpc = pc;\n");
1200 printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1201 printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1202 printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1203 /* gb-- the next two lines are deleted in Bernie's gencpu.c */
1204 printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1205 printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1206 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1207 printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1208 printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1209 printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1210 printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1211 printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1212 pop_braces (old_brace_level);
1213 printf ("\tregs.sr = newsr; MakeFromSR();\n");
1214 printf ("\tm68k_setpc_rte(newpc);\n");
1215 fill_prefetch_0 ();
1216 need_endlabel = 1;
1217 }
1218 /* PC is set and prefetch filled. */
1219 m68k_pc_offset = 0;
1220 break;
1221 case i_RTD:
1222 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1223 genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1224 printf ("\tm68k_areg(regs, 7) += offs;\n");
1225 printf ("\tm68k_setpc_rte(pc);\n");
1226 fill_prefetch_0 ();
1227 /* PC is set and prefetch filled. */
1228 m68k_pc_offset = 0;
1229 break;
1230 case i_LINK:
1231 genamode (Apdi, "7", sz_long, "old", 2, 0);
1232 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1233 genastore ("src", Apdi, "7", sz_long, "old");
1234 genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1235 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1236 printf ("\tm68k_areg(regs, 7) += offs;\n");
1237 break;
1238 case i_UNLK:
1239 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1240 printf ("\tm68k_areg(regs, 7) = src;\n");
1241 genamode (Aipi, "7", sz_long, "old", 1, 0);
1242 genastore ("old", curi->smode, "srcreg", curi->size, "src");
1243 break;
1244 case i_RTS:
1245 printf ("\tm68k_do_rts();\n");
1246 fill_prefetch_0 ();
1247 m68k_pc_offset = 0;
1248 break;
1249 case i_TRAPV:
1250 sync_m68k_pc ();
1251 printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1252 need_endlabel = 1;
1253 break;
1254 case i_RTR:
1255 printf ("\tMakeSR();\n");
1256 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1257 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1258 printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1259 printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1260 fill_prefetch_0 ();
1261 printf ("\tMakeFromSR();\n");
1262 m68k_pc_offset = 0;
1263 break;
1264 case i_JSR:
1265 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1266 printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1267 fill_prefetch_0 ();
1268 m68k_pc_offset = 0;
1269 break;
1270 case i_JMP:
1271 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1272 printf ("\tm68k_setpc(srca);\n");
1273 fill_prefetch_0 ();
1274 m68k_pc_offset = 0;
1275 break;
1276 case i_BSR:
1277 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1278 printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1279 if (using_exception_3) {
1280 printf ("\tif (src & 1) {\n");
1281 printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1282 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1283 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1284 printf ("\t}\n");
1285 need_endlabel = 1;
1286 }
1287 printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1288 fill_prefetch_0 ();
1289 m68k_pc_offset = 0;
1290 break;
1291 case i_Bcc:
1292 if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) {
1293 /* gb-- variant probably more favorable to compiler optimizations
1294 also assumes no prefetch buffer is used
1295 Hmm, that would make sense with processors capable of conditional moves */
1296 if (curi->size == sz_long && next_cpu_level < 1)
1297 next_cpu_level = 1;
1298 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1299 printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset);
1300 m68k_pc_offset = 0;
1301 }
1302 else {
1303 /* original code for branch instructions */
1304 if (curi->size == sz_long) {
1305 if (cpu_level < 2) {
1306 printf ("\tm68k_incpc(2);\n");
1307 printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1308 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1309 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1310 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1311 need_endlabel = 1;
1312 } else {
1313 if (next_cpu_level < 1)
1314 next_cpu_level = 1;
1315 }
1316 }
1317 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1318 printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1319 if (using_exception_3) {
1320 printf ("\tif (src & 1) {\n");
1321 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1322 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1323 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1324 printf ("\t}\n");
1325 need_endlabel = 1;
1326 }
1327 printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1328 fill_prefetch_0 ();
1329 printf ("return;\n");
1330 printf ("didnt_jump:;\n");
1331 need_endlabel = 1;
1332 }
1333 break;
1334 case i_LEA:
1335 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1336 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1337 genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1338 break;
1339 case i_PEA:
1340 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1341 genamode (Apdi, "7", sz_long, "dst", 2, 0);
1342 genastore ("srca", Apdi, "7", sz_long, "dst");
1343 break;
1344 case i_DBcc:
1345 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1346 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1347
1348 printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1349 genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1350
1351 printf ("\t\tif (src) {\n");
1352 if (using_exception_3) {
1353 printf ("\t\t\tif (offs & 1) {\n");
1354 printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1355 printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1356 printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1357 printf ("\t\t}\n");
1358 need_endlabel = 1;
1359 }
1360 printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1361 fill_prefetch_0 ();
1362 printf ("return;\n");
1363 printf ("\t\t}\n");
1364 printf ("\t}\n");
1365 need_endlabel = 1;
1366 break;
1367 case i_Scc:
1368 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1369 start_brace ();
1370 printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1371 genastore ("val", curi->smode, "srcreg", curi->size, "src");
1372 break;
1373 case i_DIVU:
1374 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1375 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1376 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1377 sync_m68k_pc ();
1378 /* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1379 * on this (actually, it's doing a DIVS). */
1380 printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1381 printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1382 printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1383 /* The N flag appears to be set each time there is an overflow.
1384 * Weird. */
1385 printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1386 genflags (flag_logical, sz_word, "newv", "", "");
1387 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1388 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1389 printf ("\t}\n");
1390 printf ("\t}\n");
1391 insn_n_cycles += 68;
1392 need_endlabel = 1;
1393 break;
1394 case i_DIVS:
1395 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1396 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1397 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1398 sync_m68k_pc ();
1399 printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1400 printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1401 printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1402 printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1403 printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1404 genflags (flag_logical, sz_word, "newv", "", "");
1405 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1406 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1407 printf ("\t}\n");
1408 printf ("\t}\n");
1409 insn_n_cycles += 72;
1410 need_endlabel = 1;
1411 break;
1412 case i_MULU:
1413 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1414 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1415 start_brace ();
1416 printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1417 genflags (flag_logical, sz_long, "newv", "", "");
1418 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1419 insn_n_cycles += 32;
1420 break;
1421 case i_MULS:
1422 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1423 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1424 start_brace ();
1425 printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1426 genflags (flag_logical, sz_long, "newv", "", "");
1427 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1428 insn_n_cycles += 32;
1429 break;
1430 case i_CHK:
1431 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1432 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1433 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1434 printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1435 printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1436 need_endlabel = 1;
1437 break;
1438
1439 case i_CHK2:
1440 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1441 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1442 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1443 printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1444 switch (curi->size) {
1445 case sz_byte:
1446 printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1447 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1448 break;
1449 case sz_word:
1450 printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1451 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1452 break;
1453 case sz_long:
1454 printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1455 break;
1456 default:
1457 abort ();
1458 }
1459 printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1460 printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1461 printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1462 need_endlabel = 1;
1463 break;
1464
1465 case i_ASR:
1466 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1467 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1468 start_brace ();
1469 switch (curi->size) {
1470 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1471 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1472 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1473 default: abort ();
1474 }
1475 printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1476 printf ("\tcnt &= 63;\n");
1477 printf ("\tCLEAR_CZNV;\n");
1478 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1479 printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1480 printf ("\t\tSET_CFLG (sign);\n");
1481 duplicate_carry ();
1482 if (source_is_imm1_8 (curi))
1483 printf ("\t} else {\n");
1484 else
1485 printf ("\t} else if (cnt > 0) {\n");
1486 printf ("\t\tval >>= cnt - 1;\n");
1487 printf ("\t\tSET_CFLG (val & 1);\n");
1488 duplicate_carry ();
1489 printf ("\t\tval >>= 1;\n");
1490 printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1491 bit_mask (curi->size),
1492 bit_size (curi->size));
1493 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1494 printf ("\t}\n");
1495 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1496 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1497 break;
1498 case i_ASL:
1499 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1500 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1501 start_brace ();
1502 switch (curi->size) {
1503 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1504 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1505 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1506 default: abort ();
1507 }
1508 printf ("\tcnt &= 63;\n");
1509 printf ("\tCLEAR_CZNV;\n");
1510 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1511 printf ("\t\tSET_VFLG (val != 0);\n");
1512 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1513 bit_size (curi->size));
1514 duplicate_carry ();
1515 printf ("\t\tval = 0;\n");
1516 if (source_is_imm1_8 (curi))
1517 printf ("\t} else {\n");
1518 else
1519 printf ("\t} else if (cnt > 0) {\n");
1520 printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1521 bit_mask (curi->size),
1522 bit_size (curi->size) - 1,
1523 bit_mask (curi->size));
1524 printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1525 printf ("\t\tval <<= cnt - 1;\n");
1526 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1527 duplicate_carry ();
1528 printf ("\t\tval <<= 1;\n");
1529 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1530 printf ("\t}\n");
1531 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1532 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1533 break;
1534 case i_LSR:
1535 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1536 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1537 start_brace ();
1538 switch (curi->size) {
1539 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1540 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1541 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1542 default: abort ();
1543 }
1544 printf ("\tcnt &= 63;\n");
1545 printf ("\tCLEAR_CZNV;\n");
1546 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1547 printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1548 bit_size (curi->size), bit_size (curi->size) - 1);
1549 duplicate_carry ();
1550 printf ("\t\tval = 0;\n");
1551 if (source_is_imm1_8 (curi))
1552 printf ("\t} else {\n");
1553 else
1554 printf ("\t} else if (cnt > 0) {\n");
1555 printf ("\t\tval >>= cnt - 1;\n");
1556 printf ("\t\tSET_CFLG (val & 1);\n");
1557 duplicate_carry ();
1558 printf ("\t\tval >>= 1;\n");
1559 printf ("\t}\n");
1560 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1561 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1562 break;
1563 case i_LSL:
1564 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1565 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1566 start_brace ();
1567 switch (curi->size) {
1568 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1569 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1570 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1571 default: abort ();
1572 }
1573 printf ("\tcnt &= 63;\n");
1574 printf ("\tCLEAR_CZNV;\n");
1575 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1576 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1577 bit_size (curi->size));
1578 duplicate_carry ();
1579 printf ("\t\tval = 0;\n");
1580 if (source_is_imm1_8 (curi))
1581 printf ("\t} else {\n");
1582 else
1583 printf ("\t} else if (cnt > 0) {\n");
1584 printf ("\t\tval <<= (cnt - 1);\n");
1585 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1586 duplicate_carry ();
1587 printf ("\t\tval <<= 1;\n");
1588 printf ("\tval &= %s;\n", bit_mask (curi->size));
1589 printf ("\t}\n");
1590 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1591 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1592 break;
1593 case i_ROL:
1594 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1595 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1596 start_brace ();
1597 switch (curi->size) {
1598 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1599 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1600 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1601 default: abort ();
1602 }
1603 printf ("\tcnt &= 63;\n");
1604 printf ("\tCLEAR_CZNV;\n");
1605 if (source_is_imm1_8 (curi))
1606 printf ("{");
1607 else
1608 printf ("\tif (cnt > 0) {\n");
1609 printf ("\tuae_u32 loval;\n");
1610 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1611 printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1612 printf ("\tval <<= cnt;\n");
1613 printf ("\tval |= loval;\n");
1614 printf ("\tval &= %s;\n", bit_mask (curi->size));
1615 printf ("\tSET_CFLG (val & 1);\n");
1616 printf ("}\n");
1617 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1618 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1619 break;
1620 case i_ROR:
1621 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1622 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1623 start_brace ();
1624 switch (curi->size) {
1625 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1626 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1627 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1628 default: abort ();
1629 }
1630 printf ("\tcnt &= 63;\n");
1631 printf ("\tCLEAR_CZNV;\n");
1632 if (source_is_imm1_8 (curi))
1633 printf ("{");
1634 else
1635 printf ("\tif (cnt > 0) {");
1636 printf ("\tuae_u32 hival;\n");
1637 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1638 printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1639 printf ("\tval >>= cnt;\n");
1640 printf ("\tval |= hival;\n");
1641 printf ("\tval &= %s;\n", bit_mask (curi->size));
1642 printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1643 printf ("\t}\n");
1644 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1645 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1646 break;
1647 case i_ROXL:
1648 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1649 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1650 start_brace ();
1651 switch (curi->size) {
1652 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1653 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1654 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1655 default: abort ();
1656 }
1657 printf ("\tcnt &= 63;\n");
1658 printf ("\tCLEAR_CZNV;\n");
1659 if (source_is_imm1_8 (curi))
1660 printf ("{");
1661 else {
1662 force_range_for_rox ("cnt", curi->size);
1663 printf ("\tif (cnt > 0) {\n");
1664 }
1665 printf ("\tcnt--;\n");
1666 printf ("\t{\n\tuae_u32 carry;\n");
1667 printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1668 printf ("\tcarry = loval & 1;\n");
1669 printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1670 printf ("\tSET_XFLG (carry);\n");
1671 printf ("\tval &= %s;\n", bit_mask (curi->size));
1672 printf ("\t} }\n");
1673 printf ("\tSET_CFLG (GET_XFLG);\n");
1674 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1675 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1676 break;
1677 case i_ROXR:
1678 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1679 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1680 start_brace ();
1681 switch (curi->size) {
1682 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1683 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1684 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1685 default: abort ();
1686 }
1687 printf ("\tcnt &= 63;\n");
1688 printf ("\tCLEAR_CZNV;\n");
1689 if (source_is_imm1_8 (curi))
1690 printf ("{");
1691 else {
1692 force_range_for_rox ("cnt", curi->size);
1693 printf ("\tif (cnt > 0) {\n");
1694 }
1695 printf ("\tcnt--;\n");
1696 printf ("\t{\n\tuae_u32 carry;\n");
1697 printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
1698 printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
1699 printf ("\tval >>= cnt;\n");
1700 printf ("\tcarry = val & 1;\n");
1701 printf ("\tval >>= 1;\n");
1702 printf ("\tval |= hival;\n");
1703 printf ("\tSET_XFLG (carry);\n");
1704 printf ("\tval &= %s;\n", bit_mask (curi->size));
1705 printf ("\t} }\n");
1706 printf ("\tSET_CFLG (GET_XFLG);\n");
1707 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1708 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1709 break;
1710 case i_ASRW:
1711 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1712 start_brace ();
1713 switch (curi->size) {
1714 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1715 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1716 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1717 default: abort ();
1718 }
1719 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1720 printf ("\tuae_u32 cflg = val & 1;\n");
1721 printf ("\tval = (val >> 1) | sign;\n");
1722 genflags (flag_logical, curi->size, "val", "", "");
1723 printf ("\tSET_CFLG (cflg);\n");
1724 duplicate_carry ();
1725 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1726 break;
1727 case i_ASLW:
1728 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1729 start_brace ();
1730 switch (curi->size) {
1731 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1732 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1733 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1734 default: abort ();
1735 }
1736 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1737 printf ("\tuae_u32 sign2;\n");
1738 printf ("\tval <<= 1;\n");
1739 genflags (flag_logical, curi->size, "val", "", "");
1740 printf ("\tsign2 = %s & val;\n", cmask (curi->size));
1741 printf ("\tSET_CFLG (sign != 0);\n");
1742 duplicate_carry ();
1743
1744 printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
1745 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1746 break;
1747 case i_LSRW:
1748 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1749 start_brace ();
1750 switch (curi->size) {
1751 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1752 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1753 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1754 default: abort ();
1755 }
1756 printf ("\tuae_u32 carry = val & 1;\n");
1757 printf ("\tval >>= 1;\n");
1758 genflags (flag_logical, curi->size, "val", "", "");
1759 printf ("SET_CFLG (carry);\n");
1760 duplicate_carry ();
1761 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1762 break;
1763 case i_LSLW:
1764 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1765 start_brace ();
1766 switch (curi->size) {
1767 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1768 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1769 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1770 default: abort ();
1771 }
1772 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1773 printf ("\tval <<= 1;\n");
1774 genflags (flag_logical, curi->size, "val", "", "");
1775 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1776 duplicate_carry ();
1777 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1778 break;
1779 case i_ROLW:
1780 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1781 start_brace ();
1782 switch (curi->size) {
1783 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1784 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1785 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1786 default: abort ();
1787 }
1788 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1789 printf ("\tval <<= 1;\n");
1790 printf ("\tif (carry) val |= 1;\n");
1791 genflags (flag_logical, curi->size, "val", "", "");
1792 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1793 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1794 break;
1795 case i_RORW:
1796 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1797 start_brace ();
1798 switch (curi->size) {
1799 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1800 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1801 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1802 default: abort ();
1803 }
1804 printf ("\tuae_u32 carry = val & 1;\n");
1805 printf ("\tval >>= 1;\n");
1806 printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
1807 genflags (flag_logical, curi->size, "val", "", "");
1808 printf ("SET_CFLG (carry);\n");
1809 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1810 break;
1811 case i_ROXLW:
1812 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1813 start_brace ();
1814 switch (curi->size) {
1815 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1816 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1817 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1818 default: abort ();
1819 }
1820 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1821 printf ("\tval <<= 1;\n");
1822 printf ("\tif (GET_XFLG) val |= 1;\n");
1823 genflags (flag_logical, curi->size, "val", "", "");
1824 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1825 duplicate_carry ();
1826 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1827 break;
1828 case i_ROXRW:
1829 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1830 start_brace ();
1831 switch (curi->size) {
1832 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1833 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1834 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1835 default: abort ();
1836 }
1837 printf ("\tuae_u32 carry = val & 1;\n");
1838 printf ("\tval >>= 1;\n");
1839 printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
1840 genflags (flag_logical, curi->size, "val", "", "");
1841 printf ("SET_CFLG (carry);\n");
1842 duplicate_carry ();
1843 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1844 break;
1845 case i_MOVEC2:
1846 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1847 start_brace ();
1848 printf ("\tint regno = (src >> 12) & 15;\n");
1849 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1850 printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1851 break;
1852 case i_MOVE2C:
1853 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1854 start_brace ();
1855 printf ("\tint regno = (src >> 12) & 15;\n");
1856 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1857 printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1858 break;
1859 case i_CAS:
1860 {
1861 int old_brace_level;
1862 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1863 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1864 start_brace ();
1865 printf ("\tint ru = (src >> 6) & 7;\n");
1866 printf ("\tint rc = src & 7;\n");
1867 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
1868 printf ("\tif (GET_ZFLG)");
1869 old_brace_level = n_braces;
1870 start_brace ();
1871 genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
1872 pop_braces (old_brace_level);
1873 printf ("else");
1874 start_brace ();
1875 printf ("m68k_dreg(regs, rc) = dst;\n");
1876 pop_braces (old_brace_level);
1877 }
1878 break;
1879 case i_CAS2:
1880 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1881 printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
1882 printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
1883 if (curi->size == sz_word) {
1884 int old_brace_level = n_braces;
1885 printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
1886 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
1887 printf ("\tif (GET_ZFLG) {\n");
1888 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
1889 printf ("\tif (GET_ZFLG) {\n");
1890 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
1891 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
1892 printf ("\t}}\n");
1893 pop_braces (old_brace_level);
1894 printf ("\tif (! GET_ZFLG) {\n");
1895 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
1896 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
1897 printf ("\t}\n");
1898 } else {
1899 int old_brace_level = n_braces;
1900 printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
1901 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
1902 printf ("\tif (GET_ZFLG) {\n");
1903 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
1904 printf ("\tif (GET_ZFLG) {\n");
1905 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
1906 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
1907 printf ("\t}}\n");
1908 pop_braces (old_brace_level);
1909 printf ("\tif (! GET_ZFLG) {\n");
1910 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
1911 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
1912 printf ("\t}\n");
1913 }
1914 break;
1915 case i_MOVES: /* ignore DFC and SFC because we have no MMU */
1916 {
1917 int old_brace_level;
1918 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1919 printf ("\tif (extra & 0x800)\n");
1920 old_brace_level = n_braces;
1921 start_brace ();
1922 printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
1923 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1924 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1925 pop_braces (old_brace_level);
1926 printf ("else");
1927 start_brace ();
1928 genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
1929 printf ("\tif (extra & 0x8000) {\n");
1930 switch (curi->size) {
1931 case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
1932 case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
1933 case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
1934 default: abort ();
1935 }
1936 printf ("\t} else {\n");
1937 genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
1938 printf ("\t}\n");
1939 pop_braces (old_brace_level);
1940 }
1941 break;
1942 case i_BKPT: /* only needed for hardware emulators */
1943 sync_m68k_pc ();
1944 printf ("\top_illg(opcode);\n");
1945 break;
1946 case i_CALLM: /* not present in 68030 */
1947 sync_m68k_pc ();
1948 printf ("\top_illg(opcode);\n");
1949 break;
1950 case i_RTM: /* not present in 68030 */
1951 sync_m68k_pc ();
1952 printf ("\top_illg(opcode);\n");
1953 break;
1954 case i_TRAPcc:
1955 if (curi->smode != am_unknown && curi->smode != am_illg)
1956 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
1957 printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
1958 need_endlabel = 1;
1959 break;
1960 case i_DIVL:
1961 sync_m68k_pc ();
1962 start_brace ();
1963 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1964 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1965 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1966 sync_m68k_pc ();
1967 printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
1968 break;
1969 case i_MULL:
1970 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1971 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1972 sync_m68k_pc ();
1973 printf ("\tm68k_mull(opcode, dst, extra);\n");
1974 break;
1975 case i_BFTST:
1976 case i_BFEXTU:
1977 case i_BFCHG:
1978 case i_BFEXTS:
1979 case i_BFCLR:
1980 case i_BFFFO:
1981 case i_BFSET:
1982 case i_BFINS:
1983 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1984 genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
1985 start_brace ();
1986 printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
1987 printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
1988 if (curi->dmode == Dreg) {
1989 printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
1990 } else {
1991 printf ("\tuae_u32 tmp,bf0,bf1;\n");
1992 printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
1993 printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
1994 printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
1995 }
1996 printf ("\ttmp >>= (32 - width);\n");
1997 printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n");
1998 printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
1999 switch (curi->mnemo) {
2000 case i_BFTST:
2001 break;
2002 case i_BFEXTU:
2003 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2004 break;
2005 case i_BFCHG:
2006 printf ("\ttmp = ~tmp;\n");
2007 break;
2008 case i_BFEXTS:
2009 printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2010 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2011 break;
2012 case i_BFCLR:
2013 printf ("\ttmp = 0;\n");
2014 break;
2015 case i_BFFFO:
2016 printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2017 printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2018 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2019 break;
2020 case i_BFSET:
2021 printf ("\ttmp = 0xffffffff;\n");
2022 break;
2023 case i_BFINS:
2024 printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2025 printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2026 printf ("\tSET_ZFLG (tmp == 0);\n");
2027 break;
2028 default:
2029 break;
2030 }
2031 if (curi->mnemo == i_BFCHG
2032 || curi->mnemo == i_BFCLR
2033 || curi->mnemo == i_BFSET
2034 || curi->mnemo == i_BFINS)
2035 {
2036 printf ("\ttmp <<= (32 - width);\n");
2037 if (curi->dmode == Dreg) {
2038 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2039 printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2040 printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2041 printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2042 printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2043 } else {
2044 printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2045 printf ("\t\t(tmp >> (offset & 7)) |\n");
2046 printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2047 printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2048 printf ("\tput_long(dsta,bf0 );\n");
2049 printf ("\tif (((offset & 7) + width) > 32) {\n");
2050 printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2051 printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2052 printf ("\t\tput_byte(dsta+4,bf1);\n");
2053 printf ("\t}\n");
2054 }
2055 }
2056 break;
2057 case i_PACK:
2058 if (curi->smode == Dreg) {
2059 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2060 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2061 } else {
2062 printf ("\tuae_u16 val;\n");
2063 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2064 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2065 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2066 printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2067 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2068 printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2069 }
2070 break;
2071 case i_UNPK:
2072 if (curi->smode == Dreg) {
2073 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2074 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2075 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2076 } else {
2077 printf ("\tuae_u16 val;\n");
2078 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2079 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2080 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2081 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2082 printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2083 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2084 printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2085 }
2086 break;
2087 case i_TAS:
2088 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2089 genflags (flag_logical, curi->size, "src", "", "");
2090 printf ("\tsrc |= 0x80;\n");
2091 genastore ("src", curi->smode, "srcreg", curi->size, "src");
2092 break;
2093 case i_FPP:
2094 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2095 sync_m68k_pc ();
2096 swap_opcode ();
2097 printf ("\tfpuop_arithmetic(opcode, extra);\n");
2098 break;
2099 case i_FDBcc:
2100 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2101 sync_m68k_pc ();
2102 swap_opcode ();
2103 printf ("\tfpuop_dbcc(opcode, extra);\n");
2104 break;
2105 case i_FScc:
2106 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2107 sync_m68k_pc ();
2108 swap_opcode ();
2109 printf ("\tfpuop_scc(opcode,extra);\n");
2110 break;
2111 case i_FTRAPcc:
2112 sync_m68k_pc ();
2113 start_brace ();
2114 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2115 if (curi->smode != am_unknown && curi->smode != am_illg)
2116 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2117 sync_m68k_pc ();
2118 swap_opcode ();
2119 printf ("\tfpuop_trapcc(opcode,oldpc);\n");
2120 break;
2121 case i_FBcc:
2122 sync_m68k_pc ();
2123 start_brace ();
2124 printf ("\tuaecptr pc = m68k_getpc();\n");
2125 genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2126 sync_m68k_pc ();
2127 swap_opcode ();
2128 printf ("\tfpuop_bcc(opcode,pc,extra);\n");
2129 break;
2130 case i_FSAVE:
2131 sync_m68k_pc ();
2132 swap_opcode ();
2133 printf ("\tfpuop_save(opcode);\n");
2134 break;
2135 case i_FRESTORE:
2136 sync_m68k_pc ();
2137 swap_opcode ();
2138 printf ("\tfpuop_restore(opcode);\n");
2139 break;
2140 case i_CINVL:
2141 case i_CINVP:
2142 case i_CINVA:
2143 /* gb-- srcreg now contains the cache field */
2144 printf ("\tif (srcreg&0x2)\n");
2145 printf ("\t\tflush_icache(%d);\n", 30 + ((opcode >> 3) & 3));
2146 break;
2147 case i_CPUSHL:
2148 case i_CPUSHP:
2149 case i_CPUSHA:
2150 /* gb-- srcreg now contains the cache field */
2151 printf ("\tif (srcreg&0x2)\n");
2152 printf ("\t\tflush_icache(%d);\n", 40 + ((opcode >> 3) & 3));
2153 break;
2154 case i_MOVE16:
2155 if ((opcode & 0xfff8) == 0xf620) {
2156 /* MOVE16 (Ax)+,(Ay)+ */
2157 printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2158 printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2159 printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2160 printf ("\tput_long(memd, get_long(mems));\n");
2161 printf ("\tput_long(memd+4, get_long(mems+4));\n");
2162 printf ("\tput_long(memd+8, get_long(mems+8));\n");
2163 printf ("\tput_long(memd+12, get_long(mems+12));\n");
2164 printf ("\tif (srcreg != dstreg)\n");
2165 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2166 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2167 }
2168 else {
2169 /* Other variants */
2170 genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2171 genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2172 printf ("\tmemsa &= ~15;\n");
2173 printf ("\tmemda &= ~15;\n");
2174 printf ("\tput_long(memda, get_long(memsa));\n");
2175 printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2176 printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2177 printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2178 if ((opcode & 0xfff8) == 0xf600)
2179 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2180 else if ((opcode & 0xfff8) == 0xf608)
2181 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2182 }
2183 break;
2184 case i_MMUOP:
2185 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2186 sync_m68k_pc ();
2187 swap_opcode ();
2188 printf ("\tmmu_op(opcode,extra);\n");
2189 break;
2190
2191 case i_EMULOP_RETURN:
2192 printf ("\tm68k_emulop_return();\n");
2193 m68k_pc_offset = 0;
2194 break;
2195
2196 case i_EMULOP:
2197 printf ("\n");
2198 swap_opcode ();
2199 printf ("\tm68k_emulop(opcode);\n");
2200 break;
2201
2202 default:
2203 abort ();
2204 break;
2205 }
2206 finish_braces ();
2207 sync_m68k_pc ();
2208 }
2209
2210 static void generate_includes (FILE * f)
2211 {
2212 fprintf (f, "#include \"sysdeps.h\"\n");
2213
2214 fprintf (f, "#include \"m68k.h\"\n");
2215 fprintf (f, "#include \"memory.h\"\n");
2216 fprintf (f, "#include \"readcpu.h\"\n");
2217 fprintf (f, "#include \"newcpu.h\"\n");
2218 fprintf (f, "#include \"compiler/compemu.h\"\n");
2219 fprintf (f, "#include \"fpu/fpu.h\"\n");
2220 fprintf (f, "#include \"cputbl.h\"\n");
2221
2222 fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n");
2223 fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n");
2224 fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n");
2225 fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n");
2226 fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n");
2227
2228 fprintf (f, "#ifdef NOFLAGS\n");
2229 fprintf (f, "# include \"noflags.h\"\n");
2230 fprintf (f, "#endif\n");
2231 }
2232
2233 static int postfix;
2234
2235 static void generate_one_opcode (int rp)
2236 {
2237 int i;
2238 uae_u16 smsk, dmsk;
2239 long int opcode = opcode_map[rp];
2240
2241 if (table68k[opcode].mnemo == i_ILLG
2242 || table68k[opcode].clev > cpu_level)
2243 return;
2244
2245 for (i = 0; lookuptab[i].name[0]; i++) {
2246 if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2247 break;
2248 }
2249
2250 if (table68k[opcode].handler != -1)
2251 return;
2252
2253 if (opcode_next_clev[rp] != cpu_level) {
2254 fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2255 opcode, lookuptab[i].name);
2256 return;
2257 }
2258
2259 if (table68k[opcode].flagdead == 0)
2260 /* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2261 fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2262 else
2263 fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2264
2265 fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2266 fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2267 printf ("void REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2268 printf ("\tcpuop_begin();\n");
2269
2270 /* gb-- The "nf" variant for an instruction that doesn't set the condition
2271 codes at all is the same as the "ff" variant, so we don't need the "nf"
2272 variant to be compiled since it is mapped to the "ff" variant in the
2273 smalltbl. */
2274 if (table68k[opcode].flagdead == 0)
2275 printf ("#ifndef NOFLAGS\n");
2276
2277 switch (table68k[opcode].stype) {
2278 case 0: smsk = 7; break;
2279 case 1: smsk = 255; break;
2280 case 2: smsk = 15; break;
2281 case 3: smsk = 7; break;
2282 case 4: smsk = 7; break;
2283 case 5: smsk = 63; break;
2284 case 6: smsk = 255; break;
2285 case 7: smsk = 3; break;
2286 default: abort ();
2287 }
2288 dmsk = 7;
2289
2290 next_cpu_level = -1;
2291 if (table68k[opcode].suse
2292 && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2293 && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2294 && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2295 && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16
2296 /* gb-- We don't want to fetch the EmulOp code since the EmulOp()
2297 routine uses the whole opcode value. Maybe all the EmulOps
2298 could be expanded out but I don't think it is an improvement */
2299 && table68k[opcode].stype != 6
2300 )
2301 {
2302 if (table68k[opcode].spos == -1) {
2303 if (((int) table68k[opcode].sreg) >= 128)
2304 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2305 else
2306 printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2307 } else {
2308 char source[100];
2309 int pos = table68k[opcode].spos;
2310
2311 #if 0
2312 /* Check that we can do the little endian optimization safely. */
2313 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2314 abort ();
2315 #endif
2316 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2317
2318 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2319 sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2320 pos ^ 8, 8 - pos, dmsk);
2321 else if (pos != 8)
2322 sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2323 else
2324 sprintf (source, "(opcode & %d)", smsk);
2325
2326 if (table68k[opcode].stype == 3)
2327 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2328 else if (table68k[opcode].stype == 1)
2329 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2330 else
2331 printf ("\tuae_u32 srcreg = %s;\n", source);
2332
2333 printf ("#else\n");
2334
2335 if (pos)
2336 sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2337 else
2338 sprintf (source, "(opcode & %d)", smsk);
2339
2340 if (table68k[opcode].stype == 3)
2341 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2342 else if (table68k[opcode].stype == 1)
2343 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2344 else
2345 printf ("\tuae_u32 srcreg = %s;\n", source);
2346
2347 printf ("#endif\n");
2348 }
2349 }
2350 if (table68k[opcode].duse
2351 /* Yes, the dmode can be imm, in case of LINK or DBcc */
2352 && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2353 && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2354 && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2355 {
2356 if (table68k[opcode].dpos == -1) {
2357 if (((int) table68k[opcode].dreg) >= 128)
2358 printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2359 else
2360 printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2361 } else {
2362 int pos = table68k[opcode].dpos;
2363 #if 0
2364 /* Check that we can do the little endian optimization safely. */
2365 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2366 abort ();
2367 #endif
2368 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2369
2370 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2371 printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2372 pos ^ 8, 8 - pos, dmsk);
2373 else if (pos != 8)
2374 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2375 pos ^ 8, dmsk);
2376 else
2377 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2378
2379 printf ("#else\n");
2380
2381 if (pos)
2382 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2383 pos, dmsk);
2384 else
2385 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2386
2387 printf ("#endif\n");
2388 }
2389 }
2390 need_endlabel = 0;
2391 endlabelno++;
2392 sprintf (endlabelstr, "endlabel%d", endlabelno);
2393 gen_opcode (opcode);
2394 if (need_endlabel)
2395 printf ("%s: ;\n", endlabelstr);
2396 if (table68k[opcode].flagdead == 0)
2397 printf ("\n#endif\n");
2398 printf ("\tcpuop_end();\n");
2399 printf ("}\n");
2400 opcode_next_clev[rp] = next_cpu_level;
2401 opcode_last_postfix[rp] = postfix;
2402 }
2403
2404 static void generate_func (void)
2405 {
2406 int i, j, rp;
2407
2408 using_prefetch = 0;
2409 using_exception_3 = 0;
2410 #if !USE_PREFETCH_BUFFER
2411 /* gb-- No need for a prefetch buffer, nor exception 3 handling */
2412 /* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */
2413 for (i = 0; i <= 4; i++) {
2414 #else
2415 for (i = 0; i < 6; i++) {
2416 #endif
2417 cpu_level = 4 - i;
2418 if (i == 5) {
2419 cpu_level = 0;
2420 using_prefetch = 1;
2421 using_exception_3 = 1;
2422 for (rp = 0; rp < nr_cpuop_funcs; rp++)
2423 opcode_next_clev[rp] = 0;
2424 }
2425 postfix = i;
2426 fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2427
2428 /* sam: this is for people with low memory (eg. me :)) */
2429 printf ("\n"
2430 "#if !defined(PART_1) && !defined(PART_2) && "
2431 "!defined(PART_3) && !defined(PART_4) && "
2432 "!defined(PART_5) && !defined(PART_6) && "
2433 "!defined(PART_7) && !defined(PART_8)"
2434 "\n"
2435 "#define PART_1 1\n"
2436 "#define PART_2 1\n"
2437 "#define PART_3 1\n"
2438 "#define PART_4 1\n"
2439 "#define PART_5 1\n"
2440 "#define PART_6 1\n"
2441 "#define PART_7 1\n"
2442 "#define PART_8 1\n"
2443 "#endif\n\n");
2444
2445 rp = 0;
2446 for(j=1;j<=8;++j) {
2447 int k = (j*nr_cpuop_funcs)/8;
2448 printf ("#ifdef PART_%d\n",j);
2449 for (; rp < k; rp++)
2450 generate_one_opcode (rp);
2451 printf ("#endif\n\n");
2452 }
2453
2454 fprintf (stblfile, "{ 0, 0, 0 }};\n");
2455 }
2456 }
2457
2458 int main (int argc, char **argv)
2459 {
2460 read_table68k ();
2461 do_merges ();
2462
2463 opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2464 opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2465 opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2466 counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2467 read_counts ();
2468
2469 /* It would be a lot nicer to put all in one file (we'd also get rid of
2470 * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2471 * I don't dare to touch the 68k version. */
2472
2473 headerfile = fopen ("cputbl.h", "wb");
2474 stblfile = fopen ("cpustbl.cpp", "wb");
2475 freopen ("cpuemu.cpp", "wb", stdout);
2476
2477 generate_includes (stdout);
2478 generate_includes (stblfile);
2479
2480 generate_func ();
2481
2482 free (table68k);
2483 return 0;
2484 }