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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.15 by gbeauche, 2001-08-19T16:21:01Z vs.
Revision 1.19 by gbeauche, 2002-09-17T16:05:39Z

#	Line 725 | Line 725 | static void genflags (flagtypes type, wo
725		start_brace ();
726		printf ("\tuae_u32 %s;\n", value);
727		break;
728	–
728		default:
729		break;
730		}
#	Line 746 | Line 745 | static void genflags (flagtypes type, wo
745		}
746		printf ("\t}\n");
747		return;
748	+
749		case flag_logical:
750		if (strcmp (value, "0") == 0) {
751		printf ("\tSET_CZNV (FLAGVAL_Z);\n");
#	Line 786 | Line 786 | static void genflags (flagtypes type, wo
786		break;
787		}
788		#endif
789	–
789		genflags_normal (type, size, value, src, dst);
790		}
791
#	Line 824 | Line 823 | static int source_is_imm1_8 (struct inst
823		return i->stype == 3;
824		}
825
826	+	static const char * cflow_string_of(uae_u32 opcode)
827	+	{
828	+	const char * cflow_type_str;
829	+
830	+	int cflow_type = table68k[opcode].cflow & ~fl_trap;
831	+	switch (cflow_type) {
832	+	case fl_branch:         cflow_type_str = "CFLOW_BRANCH";                break;
833	+	case fl_jump:           cflow_type_str = "CFLOW_JUMP";                  break;
834	+	case fl_return:         cflow_type_str = "CFLOW_RETURN";                break;
835	+	default:                        cflow_type_str = "CFLOW_NORMAL";
836	+	}
837	+
838	+	/* Patch M68K_EXEC_RETURN instruction */
839	+	if (table68k[opcode].mnemo == i_EMULOP_RETURN)
840	+	cflow_type_str = "CFLOW_EXEC_RETURN";
841	+
842	+	return cflow_type_str;
843	+	}
844	+
845		static void gen_opcode (unsigned long int opcode)
846		{
847		struct instr *curi = table68k + opcode;
#	Line 957 | Line 975 | static void gen_opcode (unsigned long in
975		printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
976		printf ("\tuae_u16 newv, tmp_newv;\n");
977		printf ("\tint cflg;\n");
978	<	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;");
978	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
979		printf ("\tif (newv_lo > 9) { newv += 6; }\n");
980		printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
981		printf ("\tif (cflg) newv += 0x60;\n");
#	Line 989 | Line 1007 | static void gen_opcode (unsigned long in
1007		printf ("\tuae_u16 newv;\n");
1008		printf ("\tint cflg;\n");
1009		printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1010	<	printf ("\tnewv = newv_hi + newv_lo;");
1010	>	printf ("\tnewv = newv_hi + newv_lo;\n");
1011		printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1012		printf ("\tif (cflg) newv -= 0x60;\n");
1013		printf ("\tSET_CFLG (cflg);\n");
#	Line 1201 | Line 1219 | static void gen_opcode (unsigned long in
1219		printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1220		printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1221		printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1222	+	/* gb-- the next two lines are deleted in Bernie's gencpu.c */
1223		printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1224		printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1225		printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
#	Line 1289 | Line 1308 | static void gen_opcode (unsigned long in
1308		m68k_pc_offset = 0;
1309		break;
1310		case i_Bcc:
1311	+	if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) {
1312	+	/* gb-- variant probably more favorable to compiler optimizations
1313	+	also assumes no prefetch buffer is used
1314	+	Hmm, that would make sense with processors capable of conditional moves */
1315	+	if (curi->size == sz_long && next_cpu_level < 1)
1316	+	next_cpu_level = 1;
1317	+	genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1318	+	printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset);
1319	+	m68k_pc_offset = 0;
1320	+	}
1321	+	else {
1322	+	/* original code for branch instructions */
1323		if (curi->size == sz_long) {
1324		if (cpu_level < 2) {
1325		printf ("\tm68k_incpc(2);\n");
#	Line 1312 | Line 1343 | static void gen_opcode (unsigned long in
1343		printf ("\t}\n");
1344		need_endlabel = 1;
1345		}
1315	–	#ifdef USE_COMPILER
1316	–	printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1317	–	#else
1346		printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1319	–	#endif
1347		fill_prefetch_0 ();
1348	<	printf ("\tgoto %s;\n", endlabelstr);
1348	>	printf ("cpuop_return(%s);\n", cflow_string_of(opcode));
1349		printf ("didnt_jump:;\n");
1350		need_endlabel = 1;
1351	+	}
1352		break;
1353		case i_LEA:
1354		genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
#	Line 1348 | Line 1376 | static void gen_opcode (unsigned long in
1376		printf ("\t\t}\n");
1377		need_endlabel = 1;
1378		}
1351	–	#ifdef USE_COMPILER
1352	–	printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1353	–	#else
1379		printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1355	–	#endif
1380		fill_prefetch_0 ();
1381	<	printf ("\t\tgoto %s;\n", endlabelstr);
1381	>	printf ("cpuop_return(%s);\n", cflow_string_of(opcode));
1382		printf ("\t\t}\n");
1383		printf ("\t}\n");
1384		need_endlabel = 1;
#	Line 1452 | Line 1476 | static void gen_opcode (unsigned long in
1476		abort ();
1477		}
1478		printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1479	<	printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1479	>	printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1480		printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1481		need_endlabel = 1;
1482		break;
#	Line 1989 | Line 2013 | static void gen_opcode (unsigned long in
2013		printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2014		}
2015		printf ("\ttmp >>= (32 - width);\n");
2016	<	printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2016	>	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n");
2017		printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2018		switch (curi->mnemo) {
2019		case i_BFTST:
#	Line 2017 | Line 2041 | static void gen_opcode (unsigned long in
2041		break;
2042		case i_BFINS:
2043		printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2044	+	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2045	+	printf ("\tSET_ZFLG (tmp == 0);\n");
2046		break;
2047		default:
2048		break;
#	Line 2087 | Line 2113 | static void gen_opcode (unsigned long in
2113		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2114		sync_m68k_pc ();
2115		swap_opcode ();
2116	<	printf ("\tfpp_opp(opcode,extra);\n");
2116	>	printf ("\tfpuop_arithmetic(opcode, extra);\n");
2117		break;
2118		case i_FDBcc:
2119		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2120		sync_m68k_pc ();
2121		swap_opcode ();
2122	<	printf ("\tfdbcc_opp(opcode,extra);\n");
2122	>	printf ("\tfpuop_dbcc(opcode, extra);\n");
2123		break;
2124		case i_FScc:
2125		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2126		sync_m68k_pc ();
2127		swap_opcode ();
2128	<	printf ("\tfscc_opp(opcode,extra);\n");
2128	>	printf ("\tfpuop_scc(opcode,extra);\n");
2129		break;
2130		case i_FTRAPcc:
2131		sync_m68k_pc ();
#	Line 2109 | Line 2135 | static void gen_opcode (unsigned long in
2135		genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2136		sync_m68k_pc ();
2137		swap_opcode ();
2138	<	printf ("\tftrapcc_opp(opcode,oldpc);\n");
2138	>	printf ("\tfpuop_trapcc(opcode,oldpc);\n");
2139		break;
2140		case i_FBcc:
2141		sync_m68k_pc ();
#	Line 2118 | Line 2144 | static void gen_opcode (unsigned long in
2144		genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2145		sync_m68k_pc ();
2146		swap_opcode ();
2147	<	printf ("\tfbcc_opp(opcode,pc,extra);\n");
2147	>	printf ("\tfpuop_bcc(opcode,pc,extra);\n");
2148		break;
2149		case i_FSAVE:
2150		sync_m68k_pc ();
2151		swap_opcode ();
2152	<	printf ("\tfsave_opp(opcode);\n");
2152	>	printf ("\tfpuop_save(opcode);\n");
2153		break;
2154		case i_FRESTORE:
2155		sync_m68k_pc ();
2156		swap_opcode ();
2157	<	printf ("\tfrestore_opp(opcode);\n");
2157	>	printf ("\tfpuop_restore(opcode);\n");
2158		break;
2159		case i_CINVL:
2160		case i_CINVP:
2161		case i_CINVA:
2162	+	/* gb-- srcreg now contains the cache field */
2163	+	printf ("\tif (srcreg&0x2)\n");
2164	+	printf ("\t\tflush_icache(%d);\n", 30 + ((opcode >> 3) & 3));
2165	+	break;
2166		case i_CPUSHL:
2167		case i_CPUSHP:
2168		case i_CPUSHA:
2169	+	/* gb-- srcreg now contains the cache field */
2170	+	printf ("\tif (srcreg&0x2)\n");
2171	+	printf ("\t\tflush_icache(%d);\n", 40 + ((opcode >> 3) & 3));
2172		break;
2173		case i_MOVE16:
2174		if ((opcode & 0xfff8) == 0xf620) {
#	Line 2173 | Line 2206 | static void gen_opcode (unsigned long in
2206		swap_opcode ();
2207		printf ("\tmmu_op(opcode,extra);\n");
2208		break;
2209	+
2210	+	case i_EMULOP_RETURN:
2211	+	printf ("\tm68k_emulop_return();\n");
2212	+	m68k_pc_offset = 0;
2213	+	break;
2214	+
2215	+	case i_EMULOP:
2216	+	printf ("\n");
2217	+	swap_opcode ();
2218	+	printf ("\tm68k_emulop(opcode);\n");
2219	+	break;
2220	+
2221		default:
2222		abort ();
2223		break;
#	Line 2184 | Line 2229 | static void gen_opcode (unsigned long in
2229		static void generate_includes (FILE * f)
2230		{
2231		fprintf (f, "#include \"sysdeps.h\"\n");
2232	+
2233		fprintf (f, "#include \"m68k.h\"\n");
2234		fprintf (f, "#include \"memory.h\"\n");
2235		fprintf (f, "#include \"readcpu.h\"\n");
2236		fprintf (f, "#include \"newcpu.h\"\n");
2237	+	fprintf (f, "#include \"compiler/compemu.h\"\n");
2238	+	fprintf (f, "#include \"fpu/fpu.h\"\n");
2239		fprintf (f, "#include \"cputbl.h\"\n");
2240	+
2241	+	fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n");
2242	+	fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n");
2243	+	fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n");
2244	+	fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n");
2245	+	fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n");
2246	+
2247	+	fprintf (f, "#ifdef NOFLAGS\n");
2248	+	fprintf (f, "# include \"noflags.h\"\n");
2249	+	fprintf (f, "#endif\n");
2250		}
2251
2252		static int postfix;
#	Line 2212 | Line 2270 | static void generate_one_opcode (int rp)
2270		return;
2271
2272		if (opcode_next_clev[rp] != cpu_level) {
2273	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2273	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2274		opcode, lookuptab[i].name);
2275		return;
2276		}
2277	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2278	<	fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2279	<	printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2277	>
2278	>	if (table68k[opcode].flagdead == 0)
2279	>	/* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2280	>	fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2281	>	else
2282	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2283	>
2284	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2285	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2286	>	printf ("cpuop_rettype REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2287	>	printf ("\tcpuop_begin();\n");
2288	>
2289	>	/* gb-- The "nf" variant for an instruction that doesn't set the condition
2290	>	codes at all is the same as the "ff" variant, so we don't need the "nf"
2291	>	variant to be compiled since it is mapped to the "ff" variant in the
2292	>	smalltbl. */
2293	>	if (table68k[opcode].flagdead == 0)
2294	>	printf ("#ifndef NOFLAGS\n");
2295
2296		switch (table68k[opcode].stype) {
2297		case 0: smsk = 7; break;
#	Line 2227 | Line 2300 | static void generate_one_opcode (int rp)
2300		case 3: smsk = 7; break;
2301		case 4: smsk = 7; break;
2302		case 5: smsk = 63; break;
2303	+	case 6: smsk = 255; break;
2304		case 7: smsk = 3; break;
2305		default: abort ();
2306		}
#	Line 2237 | Line 2311 | static void generate_one_opcode (int rp)
2311		&& table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2312		&& table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2313		&& table68k[opcode].smode != absw && table68k[opcode].smode != absl
2314	<	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2314	>	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16
2315	>	/* gb-- We don't want to fetch the EmulOp code since the EmulOp()
2316	>	routine uses the whole opcode value. Maybe all the EmulOps
2317	>	could be expanded out but I don't think it is an improvement */
2318	>	&& table68k[opcode].stype != 6
2319	>	)
2320		{
2321		if (table68k[opcode].spos == -1) {
2322		if (((int) table68k[opcode].sreg) >= 128)
#	Line 2333 | Line 2412 | static void generate_one_opcode (int rp)
2412		gen_opcode (opcode);
2413		if (need_endlabel)
2414		printf ("%s: ;\n", endlabelstr);
2415	+	if (table68k[opcode].flagdead == 0)
2416	+	printf ("\n#endif\n");
2417	+	printf ("\tcpuop_end(%s);\n", cflow_string_of(opcode));
2418		printf ("}\n");
2419		opcode_next_clev[rp] = next_cpu_level;
2420		opcode_last_postfix[rp] = postfix;
#	Line 2360 | Line 2442 | static void generate_func (void)
2442		opcode_next_clev[rp] = 0;
2443		}
2444		postfix = i;
2445	<	fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2445	>	fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2446
2447		/* sam: this is for people with low memory (eg. me :)) */
2448		printf ("\n"

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