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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.10 by cebix, 1999-11-03T10:56:40Z vs.
Revision 1.15 by gbeauche, 2001-08-19T16:21:01Z

#	Line 221 | Line 221 | static void sync_m68k_pc (void)
221		}
222
223		/* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224	<	* the calling routine handles Apdi and Aipi modes. */
224	>	* the calling routine handles Apdi and Aipi modes.
225	>	* gb-- movem == 2 means the same thing but for a MOVE16 instruction */
226		static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
227		{
228		start_brace ();
#	Line 714 | Line 715 | static void genflags_normal (flagtypes t
715
716		static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717		{
718	<	#ifdef SPARC_V8_ASSEMBLY
719	<	switch(type)
720	<	{
721	<	case flag_add:
721	<	start_brace();
722	<	printf("\tuae_u32 %s;\n", value);
723	<	switch(size)
724	<	{
725	<	case sz_byte:
726	<	printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
727	<	break;
728	<	case sz_word:
729	<	printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
730	<	break;
731	<	case sz_long:
732	<	printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
733	<	break;
734	<	}
735	<	return;
736	<
737	<	case flag_sub:
738	<	start_brace();
739	<	printf("\tuae_u32 %s;\n", value);
740	<	switch(size)
741	<	{
742	<	case sz_byte:
743	<	printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
744	<	break;
745	<	case sz_word:
746	<	printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
747	<	break;
748	<	case sz_long:
749	<	printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
750	<	break;
751	<	}
752	<	return;
753	<
754	<	case flag_cmp:
755	<	switch(size)
756	<	{
757	<	case sz_byte:
758	<	//                                      printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
759	<	break;
760	<	case sz_word:
761	<	//                                      printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
762	<	break;
763	<	case sz_long:
764	<	#if 1
765	<	printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
766	<	return;
767	<	#endif
768	<	break;
769	<	}
770	<	//                      return;
771	<	break;
772	<	}
773	<	#elif defined(SPARC_V9_ASSEMBLY)
774	<	switch(type)
775	<	{
776	<	case flag_add:
777	<	start_brace();
778	<	printf("\tuae_u32 %s;\n", value);
779	<	switch(size)
780	<	{
781	<	case sz_byte:
782	<	printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
783	<	break;
784	<	case sz_word:
785	<	printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
786	<	break;
787	<	case sz_long:
788	<	printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
789	<	break;
790	<	}
791	<	return;
792	<
793	<	case flag_sub:
794	<	start_brace();
795	<	printf("\tuae_u32 %s;\n", value);
796	<	switch(size)
797	<	{
798	<	case sz_byte:
799	<	printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
800	<	break;
801	<	case sz_word:
802	<	printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
803	<	break;
804	<	case sz_long:
805	<	printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
806	<	break;
807	<	}
808	<	return;
809	<
810	<	case flag_cmp:
811	<	switch(size)
812	<	{
813	<	case sz_byte:
814	<	printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
815	<	break;
816	<	case sz_word:
817	<	printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
818	<	break;
819	<	case sz_long:
820	<	printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
821	<	break;
822	<	}
823	<	return;
824	<
825	<	case flag_logical:
826	<	if (strcmp(value, "0") == 0) {
827	<	printf("\tregflags.nzvc = 0x04;\n");
828	<	} else {
829	<	switch(size) {
830	<	case sz_byte:
831	<	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
832	<	break;
833	<	case sz_word:
834	<	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
835	<	break;
836	<	case sz_long:
837	<	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
838	<	break;
839	<	}
840	<	}
841	<	return;
842	<
843	<	#if 0
844	<	case flag_logical_noclobber:
845	<	printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
846	<	if (strcmp(value, "0") == 0) {
847	<	printf("\tregflags.nzvc = old_flags | 0x04;\n");
848	<	} else {
849	<	switch(size) {
850	<	case sz_byte:
851	<	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
852	<	break;
853	<	case sz_word:
854	<	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
855	<	break;
856	<	case sz_long:
857	<	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
858	<	break;
859	<	}
860	<	printf("\tregflags.nzvc |= old_flags;\n");
861	<	}
862	<	printf("\t}\n");
863	<	return;
864	<	#endif
865	<	}
866	<	#elif defined(X86_ASSEMBLY)
718	>	/* Temporarily deleted 68k/ARM flag optimizations.  I'd prefer to have
719	>	them in the appropriate m68k.h files and use just one copy of this
720	>	code here.  The API can be changed if necessary.  */
721	>	#ifdef OPTIMIZED_FLAGS
722		switch (type) {
723		case flag_add:
724		case flag_sub:
#	Line 878 | Line 733 | static void genflags (flagtypes type, wo
733		/* At least some of those casts are fairly important! */
734		switch (type) {
735		case flag_logical_noclobber:
736	<	printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
736	>	printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
737		if (strcmp (value, "0") == 0) {
738	<	printf ("\tregflags.cznv = olcznv | 64;\n");
738	>	printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
739		} else {
740		switch (size) {
741	<	case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
742	<	case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
743	<	case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
741	>	case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
742	>	case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
743	>	case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
744		}
745	<	printf ("\tregflags.cznv |= oldcznv;\n");
745	>	printf ("\tIOR_CZNV (oldcznv);\n");
746		}
747		printf ("\t}\n");
748		return;
749		case flag_logical:
750		if (strcmp (value, "0") == 0) {
751	<	printf ("\tregflags.cznv = 64;\n");
751	>	printf ("\tSET_CZNV (FLAGVAL_Z);\n");
752		} else {
753		switch (size) {
754	<	case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
755	<	case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
756	<	case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
754	>	case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
755	>	case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
756	>	case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
757		}
758		}
759		return;
760
761		case flag_add:
762		switch (size) {
763	<	case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
764	<	case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
765	<	case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
763	>	case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
764	>	case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
765	>	case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
766		}
767		return;
768
769		case flag_sub:
770		switch (size) {
771	<	case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
772	<	case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
773	<	case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
771	>	case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
772	>	case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
773	>	case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
774		}
775		return;
776
777		case flag_cmp:
778		switch (size) {
779	<	case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
780	<	case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
781	<	case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
779	>	case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
780	>	case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
781	>	case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
782		}
783		return;
784
785		default:
786		break;
787		}
933	–	#elif defined(M68K_FLAG_OPT)
934	–	/* sam: here I'm cloning what X86_ASSEMBLY does */
935	–	#define EXT(size)  (size==sz_byte?"b":(size==sz_word?"w":"l"))
936	–	#define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
937	–	switch (type) {
938	–	case flag_add:
939	–	case flag_sub:
940	–	start_brace ();
941	–	printf ("\tuae_u32 %s;\n", value);
942	–	break;
943	–
944	–	default:
945	–	break;
946	–	}
947	–
948	–	switch (type) {
949	–	case flag_logical:
950	–	if (strcmp (value, "0") == 0) {
951	–	printf ("\t*(uae_u16 *)&regflags = 4;\n");  /* Z = 1 */
952	–	} else {
953	–	printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
954	–	EXT (size), CAST (size), value);
955	–	}
956	–	return;
957	–
958	–	case flag_add:
959	–	printf ("\t{uae_u16 ccr;\n");
960	–	printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
961	–	EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
962	–	printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
963	–	return;
964	–
965	–	case flag_sub:
966	–	printf ("\t{uae_u16 ccr;\n");
967	–	printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
968	–	EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
969	–	printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
970	–	return;
971	–
972	–	case flag_cmp:
973	–	printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
974	–	EXT (size), CAST (size), src, CAST (size), dst);
975	–	return;
976	–
977	–	default:
978	–	break;
979	–	}
980	–	#elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
981	–	/*
982	–	* This is new. Might be quite buggy.
983	–	*/
984	–	switch (type) {
985	–	case flag_av:
986	–	case flag_sv:
987	–	case flag_zn:
988	–	case flag_addx:
989	–	case flag_subx:
990	–	break;
991	–
992	–	case flag_logical:
993	–	if (strcmp (value, "0") == 0) {
994	–	/* v=c=n=0 z=1 */
995	–	printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
996	–	return;
997	–	} else {
998	–	start_brace ();
999	–	switch (size) {
1000	–	case sz_byte:
1001	–	printf ("\tUBYTE ccr;\n");
1002	–	printf ("\tULONG shift;\n");
1003	–	printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1004	–	"\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
1005	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1006	–	return;
1007	–	case sz_word:
1008	–	printf ("\tUBYTE ccr;\n");
1009	–	printf ("\tULONG shift;\n");
1010	–	printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1011	–	"\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
1012	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1013	–	return;
1014	–	case sz_long:
1015	–	printf ("\tUBYTE ccr;\n");
1016	–	printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1017	–	"\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
1018	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1019	–	return;
1020	–	}
1021	–	}
1022	–	break;
1023	–	case flag_add:
1024	–	if (strcmp (dst, "0") == 0) {
1025	–	printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
1026	–	} else {
1027	–	start_brace ();
1028	–	switch (size) {
1029	–	case sz_byte:
1030	–	printf ("\tULONG ccr, shift, %s;\n", value);
1031	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1032	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1033	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1034	–	return;
1035	–	case sz_word:
1036	–	printf ("\tULONG ccr, shift, %s;\n", value);
1037	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1038	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1039	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1040	–	return;
1041	–	case sz_long:
1042	–	printf ("\tULONG ccr, %s;\n", value);
1043	–	printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1044	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1045	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1046	–	return;
1047	–	}
1048	–	}
1049	–	break;
1050	–	case flag_sub:
1051	–	if (strcmp (dst, "0") == 0) {
1052	–	printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1053	–	} else {
1054	–	start_brace ();
1055	–	switch (size) {
1056	–	case sz_byte:
1057	–	printf ("\tULONG ccr, shift, %s;\n", value);
1058	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1059	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1060	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1061	–	return;
1062	–	case sz_word:
1063	–	printf ("\tULONG ccr, shift, %s;\n", value);
1064	–	printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1065	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1066	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1067	–	return;
1068	–	case sz_long:
1069	–	printf ("\tULONG ccr, %s;\n", value);
1070	–	printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1071	–	"\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1072	–	printf ("\t*(ULONG*)&regflags = ccr;\n");
1073	–	return;
1074	–	}
1075	–	}
1076	–	break;
1077	–	case flag_cmp:
1078	–	if (strcmp (dst, "0") == 0) {
1079	–	printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1080	–	} else {
1081	–	start_brace ();
1082	–	switch (size) {
1083	–	case sz_byte:
1084	–	printf ("\tULONG shift, ccr;\n");
1085	–	printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1086	–	"\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1087	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1088	–	return;
1089	–	case sz_word:
1090	–	printf ("\tULONG shift, ccr;\n");
1091	–	printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1092	–	"\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1093	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1094	–	return;
1095	–	case sz_long:
1096	–	printf ("\tULONG ccr;\n");
1097	–	printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1098	–	"\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1099	–	printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1100	–	/*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1101	–	return;
1102	–	}
1103	–	}
1104	–	break;
1105	–	}
788		#endif
789	+
790		genflags_normal (type, size, value, src, dst);
791		}
792
#	Line 1227 | Line 910 | static void gen_opcode (unsigned long in
910		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
911		break;
912		case i_SBCD:
1230	–	/* Let's hope this works... */
913		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
914		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
915		start_brace ();
916		printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
917		printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
918	<	printf ("\tuae_u16 newv;\n");
919	<	printf ("\tint cflg;\n");
920	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
921	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
922	<	printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
918	>	printf ("\tuae_u16 newv, tmp_newv;\n");
919	>	printf ("\tint bcd = 0;\n");
920	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
921	>	printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
922	>	printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
923	>	printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
924		duplicate_carry ();
1242	–	printf ("\tif (cflg) newv -= 0x60;\n");
925		genflags (flag_zn, curi->size, "newv", "", "");
926	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
926	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
927		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
928		break;
929		case i_ADD:
#	Line 1273 | Line 955 | static void gen_opcode (unsigned long in
955		start_brace ();
956		printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
957		printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
958	<	printf ("\tuae_u16 newv;\n");
958	>	printf ("\tuae_u16 newv, tmp_newv;\n");
959		printf ("\tint cflg;\n");
960	<	printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
961	<	printf ("\tnewv = newv_hi + newv_lo;");
962	<	printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1281	<	duplicate_carry ();
960	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;");
961	>	printf ("\tif (newv_lo > 9) { newv += 6; }\n");
962	>	printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
963		printf ("\tif (cflg) newv += 0x60;\n");
964	+	printf ("\tSET_CFLG (cflg);\n");
965	+	duplicate_carry ();
966		genflags (flag_zn, curi->size, "newv", "", "");
967	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
967	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
968		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
969		break;
970		case i_NEG:
#	Line 1305 | Line 988 | static void gen_opcode (unsigned long in
988		printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
989		printf ("\tuae_u16 newv;\n");
990		printf ("\tint cflg;\n");
991	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
992	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
993	<	printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1311	<	duplicate_carry();
991	>	printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
992	>	printf ("\tnewv = newv_hi + newv_lo;");
993	>	printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
994		printf ("\tif (cflg) newv -= 0x60;\n");
995	+	printf ("\tSET_CFLG (cflg);\n");
996	+	duplicate_carry();
997		genflags (flag_zn, curi->size, "newv", "", "");
998		genastore ("newv", curi->smode, "srcreg", curi->size, "src");
999		break;
#	Line 1346 | Line 1030 | static void gen_opcode (unsigned long in
1030		else
1031		printf ("\tsrc &= 31;\n");
1032		printf ("\tdst ^= (1 << src);\n");
1033	<	printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1033	>	printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1034		genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1035		break;
1036		case i_BCLR:
#	Line 1535 | Line 1219 | static void gen_opcode (unsigned long in
1219		m68k_pc_offset = 0;
1220		break;
1221		case i_RTD:
1538	–	printf ("\tcompiler_flush_jsr_stack();\n");
1222		genamode (Aipi, "7", sz_long, "pc", 1, 0);
1223		genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1224		printf ("\tm68k_areg(regs, 7) += offs;\n");
#	Line 1569 | Line 1252 | static void gen_opcode (unsigned long in
1252		need_endlabel = 1;
1253		break;
1254		case i_RTR:
1572	–	printf ("\tcompiler_flush_jsr_stack();\n");
1255		printf ("\tMakeSR();\n");
1256		genamode (Aipi, "7", sz_word, "sr", 1, 0);
1257		genamode (Aipi, "7", sz_long, "pc", 1, 0);
#	Line 1687 | Line 1369 | static void gen_opcode (unsigned long in
1369		printf ("\tuaecptr oldpc = m68k_getpc();\n");
1370		genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1371		genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1372	<	printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1372	>	sync_m68k_pc ();
1373	>	/* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1374	>	* on this (actually, it's doing a DIVS).  */
1375	>	printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1376		printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1377		printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1378		/* The N flag appears to be set each time there is an overflow.
#	Line 1705 | Line 1390 | static void gen_opcode (unsigned long in
1390		printf ("\tuaecptr oldpc = m68k_getpc();\n");
1391		genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1392		genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1393	<	printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1393	>	sync_m68k_pc ();
1394	>	printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1395		printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1396		printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1397		printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
#	Line 1965 | Line 1651 | static void gen_opcode (unsigned long in
1651		}
1652		printf ("\tcnt &= 63;\n");
1653		printf ("\tCLEAR_CZNV;\n");
1968	–	if (! source_is_imm1_8 (curi))
1969	–	force_range_for_rox ("cnt", curi->size);
1654		if (source_is_imm1_8 (curi))
1655		printf ("{");
1656	<	else
1656	>	else {
1657	>	force_range_for_rox ("cnt", curi->size);
1658		printf ("\tif (cnt > 0) {\n");
1659	+	}
1660		printf ("\tcnt--;\n");
1661		printf ("\t{\n\tuae_u32 carry;\n");
1662		printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
#	Line 1995 | Line 1681 | static void gen_opcode (unsigned long in
1681		}
1682		printf ("\tcnt &= 63;\n");
1683		printf ("\tCLEAR_CZNV;\n");
1998	–	if (! source_is_imm1_8 (curi))
1999	–	force_range_for_rox ("cnt", curi->size);
1684		if (source_is_imm1_8 (curi))
1685		printf ("{");
1686	<	else
1686	>	else {
1687	>	force_range_for_rox ("cnt", curi->size);
1688		printf ("\tif (cnt > 0) {\n");
1689	+	}
1690		printf ("\tcnt--;\n");
1691		printf ("\t{\n\tuae_u32 carry;\n");
1692		printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
#	Line 2156 | Line 1842 | static void gen_opcode (unsigned long in
1842		start_brace ();
1843		printf ("\tint regno = (src >> 12) & 15;\n");
1844		printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1845	<	printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
1845	>	printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1846		break;
1847		case i_MOVE2C:
1848		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1849		start_brace ();
1850		printf ("\tint regno = (src >> 12) & 15;\n");
1851		printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1852	<	printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
1852	>	printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1853		break;
1854		case i_CAS:
1855		{
#	Line 2452 | Line 2138 | static void gen_opcode (unsigned long in
2138		case i_CPUSHA:
2139		break;
2140		case i_MOVE16:
2141	<	printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2142	<	printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2143	<	printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2144	<	printf ("\tput_long(memd, get_long(mems));\n");
2145	<	printf ("\tput_long(memd+4, get_long(mems+4));\n");
2146	<	printf ("\tput_long(memd+8, get_long(mems+8));\n");
2147	<	printf ("\tput_long(memd+12, get_long(mems+12));\n");
2148	<	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2149	<	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2141	>	if ((opcode & 0xfff8) == 0xf620) {
2142	>	/* MOVE16 (Ax)+,(Ay)+ */
2143	>	printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2144	>	printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2145	>	printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2146	>	printf ("\tput_long(memd, get_long(mems));\n");
2147	>	printf ("\tput_long(memd+4, get_long(mems+4));\n");
2148	>	printf ("\tput_long(memd+8, get_long(mems+8));\n");
2149	>	printf ("\tput_long(memd+12, get_long(mems+12));\n");
2150	>	printf ("\tif (srcreg != dstreg)\n");
2151	>	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2152	>	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2153	>	}
2154	>	else {
2155	>	/* Other variants */
2156	>	genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2157	>	genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2158	>	printf ("\tmemsa &= ~15;\n");
2159	>	printf ("\tmemda &= ~15;\n");
2160	>	printf ("\tput_long(memda, get_long(memsa));\n");
2161	>	printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2162	>	printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2163	>	printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2164	>	if ((opcode & 0xfff8) == 0xf600)
2165	>	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2166	>	else if ((opcode & 0xfff8) == 0xf608)
2167	>	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2168	>	}
2169		break;
2170		case i_MMUOP:
2171		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
#	Line 2483 | Line 2188 | static void generate_includes (FILE * f)
2188		fprintf (f, "#include \"memory.h\"\n");
2189		fprintf (f, "#include \"readcpu.h\"\n");
2190		fprintf (f, "#include \"newcpu.h\"\n");
2486	–	fprintf (f, "#include \"compiler.h\"\n");
2191		fprintf (f, "#include \"cputbl.h\"\n");
2192		}
2193
#	Line 2523 | Line 2227 | static void generate_one_opcode (int rp)
2227		case 3: smsk = 7; break;
2228		case 4: smsk = 7; break;
2229		case 5: smsk = 63; break;
2230	+	case 7: smsk = 3; break;
2231		default: abort ();
2232		}
2233		dmsk = 7;
#	Line 2639 | Line 2344 | static void generate_func (void)
2344
2345		using_prefetch = 0;
2346		using_exception_3 = 0;
2347	+	#if !USE_PREFETCH_BUFFER
2348	+	/* gb-- No need for a prefetch buffer, nor exception 3 handling */
2349	+	/* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */
2350	+	for (i = 0; i <= 4; i++) {
2351	+	#else
2352		for (i = 0; i < 6; i++) {
2353	+	#endif
2354		cpu_level = 4 - i;
2355		if (i == 5) {
2356		cpu_level = 0;

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