221 |
|
} |
222 |
|
|
223 |
|
/* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, |
224 |
< |
* the calling routine handles Apdi and Aipi modes. */ |
224 |
> |
* the calling routine handles Apdi and Aipi modes. |
225 |
> |
* gb-- movem == 2 means the same thing but for a MOVE16 instruction */ |
226 |
|
static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem) |
227 |
|
{ |
228 |
|
start_brace (); |
233 |
|
if (getv == 1) |
234 |
|
switch (size) { |
235 |
|
case sz_byte: |
236 |
< |
#ifdef AMIGA |
236 |
> |
#if defined(AMIGA) && !defined(WARPUP) |
237 |
|
/* sam: I don't know why gcc.2.7.2.1 produces a code worse */ |
238 |
|
/* if it is not done like that: */ |
239 |
|
printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg); |
242 |
|
#endif |
243 |
|
break; |
244 |
|
case sz_word: |
245 |
< |
#ifdef AMIGA |
245 |
> |
#if defined(AMIGA) && !defined(WARPUP) |
246 |
|
printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg); |
247 |
|
#else |
248 |
|
printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg); |
724 |
|
switch(size) |
725 |
|
{ |
726 |
|
case sz_byte: |
727 |
< |
printf("\t%s = sparc_v8_flag_add_8(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
727 |
> |
printf("\t%s = sparc_v8_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
728 |
|
break; |
729 |
|
case sz_word: |
730 |
< |
printf("\t%s = sparc_v8_flag_add_16(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
730 |
> |
printf("\t%s = sparc_v8_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
731 |
|
break; |
732 |
|
case sz_long: |
733 |
< |
printf("\t%s = sparc_v8_flag_add_32(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
733 |
> |
printf("\t%s = sparc_v8_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
734 |
|
break; |
735 |
|
} |
736 |
|
return; |
737 |
+ |
|
738 |
+ |
case flag_sub: |
739 |
+ |
start_brace(); |
740 |
+ |
printf("\tuae_u32 %s;\n", value); |
741 |
+ |
switch(size) |
742 |
+ |
{ |
743 |
+ |
case sz_byte: |
744 |
+ |
printf("\t%s = sparc_v8_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
745 |
+ |
break; |
746 |
+ |
case sz_word: |
747 |
+ |
printf("\t%s = sparc_v8_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
748 |
+ |
break; |
749 |
+ |
case sz_long: |
750 |
+ |
printf("\t%s = sparc_v8_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
751 |
+ |
break; |
752 |
+ |
} |
753 |
+ |
return; |
754 |
+ |
|
755 |
+ |
case flag_cmp: |
756 |
+ |
switch(size) |
757 |
+ |
{ |
758 |
+ |
case sz_byte: |
759 |
+ |
// printf("\tsparc_v8_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
760 |
+ |
break; |
761 |
+ |
case sz_word: |
762 |
+ |
// printf("\tsparc_v8_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
763 |
+ |
break; |
764 |
+ |
case sz_long: |
765 |
+ |
#if 1 |
766 |
+ |
printf("\tsparc_v8_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
767 |
+ |
return; |
768 |
+ |
#endif |
769 |
+ |
break; |
770 |
+ |
} |
771 |
+ |
// return; |
772 |
+ |
break; |
773 |
|
} |
774 |
|
#elif defined(SPARC_V9_ASSEMBLY) |
775 |
|
switch(type) |
1536 |
|
m68k_pc_offset = 0; |
1537 |
|
break; |
1538 |
|
case i_RTD: |
1502 |
– |
printf ("\tcompiler_flush_jsr_stack();\n"); |
1539 |
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
1540 |
|
genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0); |
1541 |
|
printf ("\tm68k_areg(regs, 7) += offs;\n"); |
1569 |
|
need_endlabel = 1; |
1570 |
|
break; |
1571 |
|
case i_RTR: |
1536 |
– |
printf ("\tcompiler_flush_jsr_stack();\n"); |
1572 |
|
printf ("\tMakeSR();\n"); |
1573 |
|
genamode (Aipi, "7", sz_word, "sr", 1, 0); |
1574 |
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
2451 |
|
case i_CPUSHA: |
2452 |
|
break; |
2453 |
|
case i_MOVE16: |
2454 |
< |
printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); |
2455 |
< |
printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); |
2456 |
< |
printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); |
2457 |
< |
printf ("\tput_long(memd, get_long(mems));\n"); |
2458 |
< |
printf ("\tput_long(memd+4, get_long(mems+4));\n"); |
2459 |
< |
printf ("\tput_long(memd+8, get_long(mems+8));\n"); |
2460 |
< |
printf ("\tput_long(memd+12, get_long(mems+12));\n"); |
2461 |
< |
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2462 |
< |
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2454 |
> |
if ((opcode & 0xfff8) == 0xf620) { |
2455 |
> |
/* MOVE16 (Ax)+,(Ay)+ */ |
2456 |
> |
printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); |
2457 |
> |
printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); |
2458 |
> |
printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); |
2459 |
> |
printf ("\tput_long(memd, get_long(mems));\n"); |
2460 |
> |
printf ("\tput_long(memd+4, get_long(mems+4));\n"); |
2461 |
> |
printf ("\tput_long(memd+8, get_long(mems+8));\n"); |
2462 |
> |
printf ("\tput_long(memd+12, get_long(mems+12));\n"); |
2463 |
> |
printf ("\tif (srcreg != dstreg)\n"); |
2464 |
> |
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2465 |
> |
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2466 |
> |
} |
2467 |
> |
else { |
2468 |
> |
/* Other variants */ |
2469 |
> |
genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2); |
2470 |
> |
genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2); |
2471 |
> |
printf ("\tmemsa &= ~15;\n"); |
2472 |
> |
printf ("\tmemda &= ~15;\n"); |
2473 |
> |
printf ("\tput_long(memda, get_long(memsa));\n"); |
2474 |
> |
printf ("\tput_long(memda+4, get_long(memsa+4));\n"); |
2475 |
> |
printf ("\tput_long(memda+8, get_long(memsa+8));\n"); |
2476 |
> |
printf ("\tput_long(memda+12, get_long(memsa+12));\n"); |
2477 |
> |
if ((opcode & 0xfff8) == 0xf600) |
2478 |
> |
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2479 |
> |
else if ((opcode & 0xfff8) == 0xf608) |
2480 |
> |
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2481 |
> |
} |
2482 |
|
break; |
2483 |
|
case i_MMUOP: |
2484 |
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2501 |
|
fprintf (f, "#include \"memory.h\"\n"); |
2502 |
|
fprintf (f, "#include \"readcpu.h\"\n"); |
2503 |
|
fprintf (f, "#include \"newcpu.h\"\n"); |
2450 |
– |
fprintf (f, "#include \"compiler.h\"\n"); |
2504 |
|
fprintf (f, "#include \"cputbl.h\"\n"); |
2505 |
|
} |
2506 |
|
|
2531 |
|
} |
2532 |
|
fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); |
2533 |
|
fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix); |
2534 |
< |
printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); |
2534 |
> |
printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); |
2535 |
|
|
2536 |
|
switch (table68k[opcode].stype) { |
2537 |
|
case 0: smsk = 7; break; |
2540 |
|
case 3: smsk = 7; break; |
2541 |
|
case 4: smsk = 7; break; |
2542 |
|
case 5: smsk = 63; break; |
2543 |
+ |
case 7: smsk = 3; break; |
2544 |
|
default: abort (); |
2545 |
|
} |
2546 |
|
dmsk = 7; |
2646 |
|
gen_opcode (opcode); |
2647 |
|
if (need_endlabel) |
2648 |
|
printf ("%s: ;\n", endlabelstr); |
2595 |
– |
printf ("return %d;\n", insn_n_cycles); |
2649 |
|
printf ("}\n"); |
2650 |
|
opcode_next_clev[rp] = next_cpu_level; |
2651 |
|
opcode_last_postfix[rp] = postfix; |
2657 |
|
|
2658 |
|
using_prefetch = 0; |
2659 |
|
using_exception_3 = 0; |
2660 |
+ |
#if !USE_PREFETCH_BUFFER |
2661 |
+ |
/* gb-- No need for a prefetch buffer, nor exception 3 handling */ |
2662 |
+ |
/* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */ |
2663 |
+ |
for (i = 0; i <= 4; i++) { |
2664 |
+ |
#else |
2665 |
|
for (i = 0; i < 6; i++) { |
2666 |
+ |
#endif |
2667 |
|
cpu_level = 4 - i; |
2668 |
|
if (i == 5) { |
2669 |
|
cpu_level = 0; |