--- BasiliskII/src/uae_cpu/gencpu.c 1999/10/03 14:16:26 1.1 +++ BasiliskII/src/uae_cpu/gencpu.c 2001/03/20 17:35:46 1.13 @@ -24,6 +24,10 @@ #include "sysdeps.h" #include "readcpu.h" +#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY) +#define SPARC_ASSEMBLY 0 +#endif + #define BOOL_TYPE "int" static FILE *headerfile; @@ -55,7 +59,7 @@ static void read_counts (void) if (file) { fscanf (file, "Total: %lu\n", &total); while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { - opcode_next_clev[nr] = 3; + opcode_next_clev[nr] = 4; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -68,7 +72,7 @@ static void read_counts (void) if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG && counts[opcode] == 0) { - opcode_next_clev[nr] = 3; + opcode_next_clev[nr] = 4; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -217,7 +221,8 @@ static void sync_m68k_pc (void) } /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, - * the calling routine handles Apdi and Aipi modes. */ + * the calling routine handles Apdi and Aipi modes. + * gb-- movem == 2 means the same thing but for a MOVE16 instruction */ static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem) { start_brace (); @@ -228,7 +233,7 @@ static void genamode (amodes mode, char if (getv == 1) switch (size) { case sz_byte: -#ifdef AMIGA +#if defined(AMIGA) && !defined(WARPUP) /* sam: I don't know why gcc.2.7.2.1 produces a code worse */ /* if it is not done like that: */ printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg); @@ -237,7 +242,7 @@ static void genamode (amodes mode, char #endif break; case sz_word: -#ifdef AMIGA +#if defined(AMIGA) && !defined(WARPUP) printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg); #else printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg); @@ -710,7 +715,156 @@ static void genflags_normal (flagtypes t static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst) { -#ifdef X86_ASSEMBLY +#ifdef SPARC_V8_ASSEMBLY + switch(type) + { + case flag_add: + start_brace(); + printf("\tuae_u32 %s;\n", value); + switch(size) + { + case sz_byte: + printf("\t%s = sparc_v8_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_word: + printf("\t%s = sparc_v8_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_long: + printf("\t%s = sparc_v8_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + } + return; + + case flag_sub: + start_brace(); + printf("\tuae_u32 %s;\n", value); + switch(size) + { + case sz_byte: + printf("\t%s = sparc_v8_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_word: + printf("\t%s = sparc_v8_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_long: + printf("\t%s = sparc_v8_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + } + return; + + case flag_cmp: + switch(size) + { + case sz_byte: +// printf("\tsparc_v8_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + break; + case sz_word: +// printf("\tsparc_v8_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + break; + case sz_long: +#if 1 + printf("\tsparc_v8_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + return; +#endif + break; + } +// return; + break; + } +#elif defined(SPARC_V9_ASSEMBLY) + switch(type) + { + case flag_add: + start_brace(); + printf("\tuae_u32 %s;\n", value); + switch(size) + { + case sz_byte: + printf("\t%s = sparc_v9_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_word: + printf("\t%s = sparc_v9_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_long: + printf("\t%s = sparc_v9_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + } + return; + + case flag_sub: + start_brace(); + printf("\tuae_u32 %s;\n", value); + switch(size) + { + case sz_byte: + printf("\t%s = sparc_v9_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_word: + printf("\t%s = sparc_v9_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + case sz_long: + printf("\t%s = sparc_v9_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); + break; + } + return; + + case flag_cmp: + switch(size) + { + case sz_byte: + printf("\tsparc_v9_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + break; + case sz_word: + printf("\tsparc_v9_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + break; + case sz_long: + printf("\tsparc_v9_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); + break; + } + return; + + case flag_logical: + if (strcmp(value, "0") == 0) { + printf("\tregflags.nzvc = 0x04;\n"); + } else { + switch(size) { + case sz_byte: + printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); + break; + case sz_word: + printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); + break; + case sz_long: + printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); + break; + } + } + return; + +#if 0 + case flag_logical_noclobber: + printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n"); + if (strcmp(value, "0") == 0) { + printf("\tregflags.nzvc = old_flags | 0x04;\n"); + } else { + switch(size) { + case sz_byte: + printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); + break; + case sz_word: + printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); + break; + case sz_long: + printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); + break; + } + printf("\tregflags.nzvc |= old_flags;\n"); + } + printf("\t}\n"); + return; +#endif + } +#elif defined(X86_ASSEMBLY) switch (type) { case flag_add: case flag_sub: @@ -1364,6 +1518,8 @@ static void gen_opcode (unsigned long in printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n"); printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n"); printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n"); printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n"); printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n"); printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n"); @@ -1380,7 +1536,6 @@ static void gen_opcode (unsigned long in m68k_pc_offset = 0; break; case i_RTD: - printf ("\tcompiler_flush_jsr_stack();\n"); genamode (Aipi, "7", sz_long, "pc", 1, 0); genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0); printf ("\tm68k_areg(regs, 7) += offs;\n"); @@ -1414,7 +1569,6 @@ static void gen_opcode (unsigned long in need_endlabel = 1; break; case i_RTR: - printf ("\tcompiler_flush_jsr_stack();\n"); printf ("\tMakeSR();\n"); genamode (Aipi, "7", sz_word, "sr", 1, 0); genamode (Aipi, "7", sz_long, "pc", 1, 0); @@ -2289,6 +2443,43 @@ static void gen_opcode (unsigned long in swap_opcode (); printf ("\tfrestore_opp(opcode);\n"); break; + case i_CINVL: + case i_CINVP: + case i_CINVA: + case i_CPUSHL: + case i_CPUSHP: + case i_CPUSHA: + break; + case i_MOVE16: + if ((opcode & 0xfff8) == 0xf620) { + /* MOVE16 (Ax)+,(Ay)+ */ + printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); + printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); + printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); + printf ("\tput_long(memd, get_long(mems));\n"); + printf ("\tput_long(memd+4, get_long(mems+4));\n"); + printf ("\tput_long(memd+8, get_long(mems+8));\n"); + printf ("\tput_long(memd+12, get_long(mems+12));\n"); + printf ("\tif (srcreg != dstreg)\n"); + printf ("\tm68k_areg(regs, srcreg) += 16;\n"); + printf ("\tm68k_areg(regs, dstreg) += 16;\n"); + } + else { + /* Other variants */ + genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2); + genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2); + printf ("\tmemsa &= ~15;\n"); + printf ("\tmemda &= ~15;\n"); + printf ("\tput_long(memda, get_long(memsa));\n"); + printf ("\tput_long(memda+4, get_long(memsa+4));\n"); + printf ("\tput_long(memda+8, get_long(memsa+8));\n"); + printf ("\tput_long(memda+12, get_long(memsa+12));\n"); + if ((opcode & 0xfff8) == 0xf600) + printf ("\tm68k_areg(regs, srcreg) += 16;\n"); + else if ((opcode & 0xfff8) == 0xf608) + printf ("\tm68k_areg(regs, dstreg) += 16;\n"); + } + break; case i_MMUOP: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); sync_m68k_pc (); @@ -2310,7 +2501,6 @@ static void generate_includes (FILE * f) fprintf (f, "#include \"memory.h\"\n"); fprintf (f, "#include \"readcpu.h\"\n"); fprintf (f, "#include \"newcpu.h\"\n"); - fprintf (f, "#include \"compiler.h\"\n"); fprintf (f, "#include \"cputbl.h\"\n"); } @@ -2341,7 +2531,7 @@ static void generate_one_opcode (int rp) } fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix); - printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); + printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); switch (table68k[opcode].stype) { case 0: smsk = 7; break; @@ -2350,6 +2540,7 @@ static void generate_one_opcode (int rp) case 3: smsk = 7; break; case 4: smsk = 7; break; case 5: smsk = 63; break; + case 7: smsk = 3; break; default: abort (); } dmsk = 7; @@ -2455,7 +2646,6 @@ static void generate_one_opcode (int rp) gen_opcode (opcode); if (need_endlabel) printf ("%s: ;\n", endlabelstr); - printf ("return %d;\n", insn_n_cycles); printf ("}\n"); opcode_next_clev[rp] = next_cpu_level; opcode_last_postfix[rp] = postfix; @@ -2467,9 +2657,15 @@ static void generate_func (void) using_prefetch = 0; using_exception_3 = 0; - for (i = 0; i < 5; i++) { - cpu_level = 3 - i; - if (i == 4) { +#if !USE_PREFETCH_BUFFER + /* gb-- No need for a prefetch buffer, nor exception 3 handling */ + /* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */ + for (i = 0; i <= 4; i++) { +#else + for (i = 0; i < 6; i++) { +#endif + cpu_level = 4 - i; + if (i == 5) { cpu_level = 0; using_prefetch = 1; using_exception_3 = 1; @@ -2507,7 +2703,6 @@ static void generate_func (void) fprintf (stblfile, "{ 0, 0, 0 }};\n"); } - } int main (int argc, char **argv)