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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.26
Committed: 2012-03-30T01:25:46Z (12 years, 8 months ago) by asvitkine
Content type: text/plain
Branch: MAIN
CVS Tags: HEAD
Changes since 1.25: +15 -0 lines
Log Message:
Add GPLv2 notices to files from UAE Amiga Emulator, as retrieved from the
COPYING file of uae-0.8.29, retrieved from http://www.amigaemulator.org/
via uae-0.8.29.tar.bz2 (MD5 = 54abbabb5e8580b679c52de019141d61).

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation generator
5 *
6 * This is a fairly stupid program that generates a lot of case labels that
7 * can be #included in a switch statement.
8 * As an alternative, it can generate functions that handle specific
9 * MC68000 instructions, plus a prototype header file and a function pointer
10 * array to look up the function for an opcode.
11 * Error checking is bad, an illegal table68k file will cause the program to
12 * call abort().
13 * The generated code is sometimes sub-optimal, an optimizing compiler should
14 * take care of this.
15 *
16 * Copyright 1995, 1996 Bernd Schmidt
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
34 #include <ctype.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38
39 #include "sysdeps.h"
40 #include "readcpu.h"
41
42 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
43 #define SPARC_ASSEMBLY 0
44 #endif
45
46 #define BOOL_TYPE "int"
47
48 /* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */
49 #define xBCD_KEEPS_NV_FLAGS 4
50
51 static FILE *headerfile;
52 static FILE *stblfile;
53
54 static int using_prefetch;
55 static int using_exception_3;
56 static int cpu_level;
57
58 /* For the current opcode, the next lower level that will have different code.
59 * Initialized to -1 for each opcode. If it remains unchanged, indicates we
60 * are done with that opcode. */
61 static int next_cpu_level;
62
63 static int *opcode_map;
64 static int *opcode_next_clev;
65 static int *opcode_last_postfix;
66 static unsigned long *counts;
67
68 static void read_counts (void)
69 {
70 FILE *file;
71 unsigned long opcode, count, total;
72 char name[20];
73 int nr = 0;
74 memset (counts, 0, 65536 * sizeof *counts);
75
76 file = fopen ("frequent.68k", "r");
77 if (file) {
78 fscanf (file, "Total: %lu\n", &total);
79 while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
80 opcode_next_clev[nr] = 4;
81 opcode_last_postfix[nr] = -1;
82 opcode_map[nr++] = opcode;
83 counts[opcode] = count;
84 }
85 fclose (file);
86 }
87 if (nr == nr_cpuop_funcs)
88 return;
89 for (opcode = 0; opcode < 0x10000; opcode++) {
90 if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
91 && counts[opcode] == 0)
92 {
93 opcode_next_clev[nr] = 4;
94 opcode_last_postfix[nr] = -1;
95 opcode_map[nr++] = opcode;
96 counts[opcode] = count;
97 }
98 }
99 if (nr != nr_cpuop_funcs)
100 abort ();
101 }
102
103 static char endlabelstr[80];
104 static int endlabelno = 0;
105 static int need_endlabel;
106
107 static int n_braces = 0;
108 static int m68k_pc_offset = 0;
109 static int insn_n_cycles;
110
111 static void start_brace (void)
112 {
113 n_braces++;
114 printf ("{");
115 }
116
117 static void close_brace (void)
118 {
119 assert (n_braces > 0);
120 n_braces--;
121 printf ("}");
122 }
123
124 static void finish_braces (void)
125 {
126 while (n_braces > 0)
127 close_brace ();
128 }
129
130 static void pop_braces (int to)
131 {
132 while (n_braces > to)
133 close_brace ();
134 }
135
136 static int bit_size (int size)
137 {
138 switch (size) {
139 case sz_byte: return 8;
140 case sz_word: return 16;
141 case sz_long: return 32;
142 default: abort ();
143 }
144 return 0;
145 }
146
147 static const char *bit_mask (int size)
148 {
149 switch (size) {
150 case sz_byte: return "0xff";
151 case sz_word: return "0xffff";
152 case sz_long: return "0xffffffff";
153 default: abort ();
154 }
155 return 0;
156 }
157
158 static const char *gen_nextilong (void)
159 {
160 static char buffer[80];
161 int r = m68k_pc_offset;
162 m68k_pc_offset += 4;
163
164 insn_n_cycles += 4;
165
166 if (using_prefetch)
167 sprintf (buffer, "get_ilong_prefetch(%d)", r);
168 else
169 sprintf (buffer, "get_ilong(%d)", r);
170 return buffer;
171 }
172
173 static const char *gen_nextiword (void)
174 {
175 static char buffer[80];
176 int r = m68k_pc_offset;
177 m68k_pc_offset += 2;
178
179 insn_n_cycles += 2;
180
181 if (using_prefetch)
182 sprintf (buffer, "get_iword_prefetch(%d)", r);
183 else
184 sprintf (buffer, "get_iword(%d)", r);
185 return buffer;
186 }
187
188 static const char *gen_nextibyte (void)
189 {
190 static char buffer[80];
191 int r = m68k_pc_offset;
192 m68k_pc_offset += 2;
193
194 insn_n_cycles += 2;
195
196 if (using_prefetch)
197 sprintf (buffer, "get_ibyte_prefetch(%d)", r);
198 else
199 sprintf (buffer, "get_ibyte(%d)", r);
200 return buffer;
201 }
202
203 static void fill_prefetch_0 (void)
204 {
205 if (using_prefetch)
206 printf ("fill_prefetch_0 ();\n");
207 }
208
209 static void fill_prefetch_2 (void)
210 {
211 if (using_prefetch)
212 printf ("fill_prefetch_2 ();\n");
213 }
214
215 static void swap_opcode (void)
216 {
217 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
218 printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
219 printf ("#endif\n");
220 }
221
222 static void sync_m68k_pc (void)
223 {
224 if (m68k_pc_offset == 0)
225 return;
226 printf ("m68k_incpc(%d);\n", m68k_pc_offset);
227 switch (m68k_pc_offset) {
228 case 0:
229 /*fprintf (stderr, "refilling prefetch at 0\n"); */
230 break;
231 case 2:
232 fill_prefetch_2 ();
233 break;
234 default:
235 fill_prefetch_0 ();
236 break;
237 }
238 m68k_pc_offset = 0;
239 }
240
241 /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
242 * the calling routine handles Apdi and Aipi modes.
243 * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
244 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
245 {
246 start_brace ();
247 switch (mode) {
248 case Dreg:
249 if (movem)
250 abort ();
251 if (getv == 1)
252 switch (size) {
253 case sz_byte:
254 #if defined(AMIGA) && !defined(WARPUP)
255 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
256 /* if it is not done like that: */
257 printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
258 #else
259 printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
260 #endif
261 break;
262 case sz_word:
263 #if defined(AMIGA) && !defined(WARPUP)
264 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
265 #else
266 printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
267 #endif
268 break;
269 case sz_long:
270 printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
271 break;
272 default:
273 abort ();
274 }
275 return;
276 case Areg:
277 if (movem)
278 abort ();
279 if (getv == 1)
280 switch (size) {
281 case sz_word:
282 printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
283 break;
284 case sz_long:
285 printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
286 break;
287 default:
288 abort ();
289 }
290 return;
291 case Aind:
292 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
293 break;
294 case Aipi:
295 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
296 break;
297 case Apdi:
298 switch (size) {
299 case sz_byte:
300 if (movem)
301 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
302 else
303 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
304 break;
305 case sz_word:
306 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
307 break;
308 case sz_long:
309 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
310 break;
311 default:
312 abort ();
313 }
314 break;
315 case Ad16:
316 printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
317 break;
318 case Ad8r:
319 if (cpu_level > 1) {
320 if (next_cpu_level < 1)
321 next_cpu_level = 1;
322 sync_m68k_pc ();
323 start_brace ();
324 printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
325 } else
326 printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
327
328 break;
329 case PC16:
330 printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
331 printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
332 break;
333 case PC8r:
334 if (cpu_level > 1) {
335 if (next_cpu_level < 1)
336 next_cpu_level = 1;
337 sync_m68k_pc ();
338 start_brace ();
339 printf ("\tuaecptr tmppc = m68k_getpc();\n");
340 printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
341 } else {
342 printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
343 printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
344 }
345
346 break;
347 case absw:
348 printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
349 break;
350 case absl:
351 printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
352 break;
353 case imm:
354 if (getv != 1)
355 abort ();
356 switch (size) {
357 case sz_byte:
358 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
359 break;
360 case sz_word:
361 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
362 break;
363 case sz_long:
364 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
365 break;
366 default:
367 abort ();
368 }
369 return;
370 case imm0:
371 if (getv != 1)
372 abort ();
373 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
374 return;
375 case imm1:
376 if (getv != 1)
377 abort ();
378 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
379 return;
380 case imm2:
381 if (getv != 1)
382 abort ();
383 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
384 return;
385 case immi:
386 if (getv != 1)
387 abort ();
388 printf ("\tuae_u32 %s = %s;\n", name, reg);
389 return;
390 default:
391 abort ();
392 }
393
394 /* We get here for all non-reg non-immediate addressing modes to
395 * actually fetch the value. */
396
397 if (using_exception_3 && getv != 0 && size != sz_byte) {
398 printf ("\tif ((%sa & 1) != 0) {\n", name);
399 printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
400 printf ("\t\tlast_op_for_exception_3 = opcode;\n");
401 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
402 printf ("\t\tException(3, 0);\n");
403 printf ("\t\tgoto %s;\n", endlabelstr);
404 printf ("\t}\n");
405 need_endlabel = 1;
406 start_brace ();
407 }
408
409 if (getv == 1) {
410 switch (size) {
411 case sz_byte: insn_n_cycles += 2; break;
412 case sz_word: insn_n_cycles += 2; break;
413 case sz_long: insn_n_cycles += 4; break;
414 default: abort ();
415 }
416 start_brace ();
417 switch (size) {
418 case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
419 case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
420 case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
421 default: abort ();
422 }
423 }
424
425 /* We now might have to fix up the register for pre-dec or post-inc
426 * addressing modes. */
427 if (!movem)
428 switch (mode) {
429 case Aipi:
430 switch (size) {
431 case sz_byte:
432 printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
433 break;
434 case sz_word:
435 printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
436 break;
437 case sz_long:
438 printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
439 break;
440 default:
441 abort ();
442 }
443 break;
444 case Apdi:
445 printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
446 break;
447 default:
448 break;
449 }
450 }
451
452 static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
453 {
454 switch (mode) {
455 case Dreg:
456 switch (size) {
457 case sz_byte:
458 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
459 break;
460 case sz_word:
461 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
462 break;
463 case sz_long:
464 printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
465 break;
466 default:
467 abort ();
468 }
469 break;
470 case Areg:
471 switch (size) {
472 case sz_word:
473 fprintf (stderr, "Foo\n");
474 printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
475 break;
476 case sz_long:
477 printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
478 break;
479 default:
480 abort ();
481 }
482 break;
483 case Aind:
484 case Aipi:
485 case Apdi:
486 case Ad16:
487 case Ad8r:
488 case absw:
489 case absl:
490 case PC16:
491 case PC8r:
492 if (using_prefetch)
493 sync_m68k_pc ();
494 switch (size) {
495 case sz_byte:
496 insn_n_cycles += 2;
497 printf ("\tput_byte(%sa,%s);\n", to, from);
498 break;
499 case sz_word:
500 insn_n_cycles += 2;
501 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
502 abort ();
503 printf ("\tput_word(%sa,%s);\n", to, from);
504 break;
505 case sz_long:
506 insn_n_cycles += 4;
507 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
508 abort ();
509 printf ("\tput_long(%sa,%s);\n", to, from);
510 break;
511 default:
512 abort ();
513 }
514 break;
515 case imm:
516 case imm0:
517 case imm1:
518 case imm2:
519 case immi:
520 abort ();
521 break;
522 default:
523 abort ();
524 }
525 }
526
527 static void genmovemel (uae_u16 opcode)
528 {
529 char getcode[100];
530 int size = table68k[opcode].size == sz_long ? 4 : 2;
531
532 if (table68k[opcode].size == sz_long) {
533 strcpy (getcode, "get_long(srca)");
534 } else {
535 strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
536 }
537
538 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
539 printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
540 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
541 start_brace ();
542 printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
543 getcode, size);
544 printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
545 getcode, size);
546
547 if (table68k[opcode].dmode == Aipi)
548 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
549 }
550
551 static void genmovemle (uae_u16 opcode)
552 {
553 char putcode[100];
554 int size = table68k[opcode].size == sz_long ? 4 : 2;
555 if (table68k[opcode].size == sz_long) {
556 strcpy (putcode, "put_long(srca,");
557 } else {
558 strcpy (putcode, "put_word(srca,");
559 }
560
561 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
562 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
563 if (using_prefetch)
564 sync_m68k_pc ();
565
566 start_brace ();
567 if (table68k[opcode].dmode == Apdi) {
568 printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
569 printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
570 size, putcode);
571 printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
572 size, putcode);
573 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
574 } else {
575 printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
576 printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
577 putcode, size);
578 printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
579 putcode, size);
580 }
581 }
582
583 static void duplicate_carry (void)
584 {
585 printf ("\tCOPY_CARRY;\n");
586 }
587
588 typedef enum {
589 flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn,
590 flag_av, flag_sv
591 } flagtypes;
592
593 static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
594 {
595 char vstr[100], sstr[100], dstr[100];
596 char usstr[100], udstr[100];
597 char unsstr[100], undstr[100];
598
599 switch (size) {
600 case sz_byte:
601 strcpy (vstr, "((uae_s8)(");
602 strcpy (usstr, "((uae_u8)(");
603 break;
604 case sz_word:
605 strcpy (vstr, "((uae_s16)(");
606 strcpy (usstr, "((uae_u16)(");
607 break;
608 case sz_long:
609 strcpy (vstr, "((uae_s32)(");
610 strcpy (usstr, "((uae_u32)(");
611 break;
612 default:
613 abort ();
614 }
615 strcpy (unsstr, usstr);
616
617 strcpy (sstr, vstr);
618 strcpy (dstr, vstr);
619 strcat (vstr, value);
620 strcat (vstr, "))");
621 strcat (dstr, dst);
622 strcat (dstr, "))");
623 strcat (sstr, src);
624 strcat (sstr, "))");
625
626 strcpy (udstr, usstr);
627 strcat (udstr, dst);
628 strcat (udstr, "))");
629 strcat (usstr, src);
630 strcat (usstr, "))");
631
632 strcpy (undstr, unsstr);
633 strcat (unsstr, "-");
634 strcat (undstr, "~");
635 strcat (undstr, dst);
636 strcat (undstr, "))");
637 strcat (unsstr, src);
638 strcat (unsstr, "))");
639
640 switch (type) {
641 case flag_logical_noclobber:
642 case flag_logical:
643 case flag_z:
644 case flag_zn:
645 case flag_av:
646 case flag_sv:
647 case flag_addx:
648 case flag_subx:
649 break;
650
651 case flag_add:
652 start_brace ();
653 printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
654 break;
655 case flag_sub:
656 case flag_cmp:
657 start_brace ();
658 printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
659 break;
660 }
661
662 switch (type) {
663 case flag_logical_noclobber:
664 case flag_logical:
665 case flag_z:
666 case flag_zn:
667 break;
668
669 case flag_add:
670 case flag_sub:
671 case flag_addx:
672 case flag_subx:
673 case flag_cmp:
674 case flag_av:
675 case flag_sv:
676 start_brace ();
677 printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
678 printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
679 printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
680 break;
681 }
682
683 switch (type) {
684 case flag_logical:
685 printf ("\tCLEAR_CZNV;\n");
686 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
687 printf ("\tSET_NFLG (%s < 0);\n", vstr);
688 break;
689 case flag_logical_noclobber:
690 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
691 printf ("\tSET_NFLG (%s < 0);\n", vstr);
692 break;
693 case flag_av:
694 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
695 break;
696 case flag_sv:
697 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
698 break;
699 case flag_z:
700 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
701 break;
702 case flag_zn:
703 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
704 printf ("\tSET_NFLG (%s < 0);\n", vstr);
705 break;
706 case flag_add:
707 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
708 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
709 printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
710 duplicate_carry ();
711 printf ("\tSET_NFLG (flgn != 0);\n");
712 break;
713 case flag_sub:
714 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
715 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
716 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
717 duplicate_carry ();
718 printf ("\tSET_NFLG (flgn != 0);\n");
719 break;
720 case flag_addx:
721 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
722 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
723 duplicate_carry ();
724 break;
725 case flag_subx:
726 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
727 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
728 duplicate_carry ();
729 break;
730 case flag_cmp:
731 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
732 printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
733 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
734 printf ("\tSET_NFLG (flgn != 0);\n");
735 break;
736 }
737 }
738
739 static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
740 {
741 /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
742 them in the appropriate m68k.h files and use just one copy of this
743 code here. The API can be changed if necessary. */
744 #ifdef OPTIMIZED_FLAGS
745 switch (type) {
746 case flag_add:
747 case flag_sub:
748 start_brace ();
749 printf ("\tuae_u32 %s;\n", value);
750 break;
751 default:
752 break;
753 }
754
755 /* At least some of those casts are fairly important! */
756 switch (type) {
757 case flag_logical_noclobber:
758 printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
759 if (strcmp (value, "0") == 0) {
760 printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
761 } else {
762 switch (size) {
763 case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
764 case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
765 case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
766 }
767 printf ("\tIOR_CZNV (oldcznv);\n");
768 }
769 printf ("\t}\n");
770 return;
771
772 case flag_logical:
773 if (strcmp (value, "0") == 0) {
774 printf ("\tSET_CZNV (FLAGVAL_Z);\n");
775 } else {
776 switch (size) {
777 case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
778 case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
779 case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
780 }
781 }
782 return;
783
784 case flag_add:
785 switch (size) {
786 case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
787 case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
788 case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
789 }
790 return;
791
792 case flag_sub:
793 switch (size) {
794 case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
795 case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
796 case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
797 }
798 return;
799
800 case flag_cmp:
801 switch (size) {
802 case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
803 case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
804 case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
805 }
806 return;
807
808 default:
809 break;
810 }
811 #endif
812 genflags_normal (type, size, value, src, dst);
813 }
814
815 static void force_range_for_rox (const char *var, wordsizes size)
816 {
817 /* Could do a modulo operation here... which one is faster? */
818 switch (size) {
819 case sz_long:
820 printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
821 break;
822 case sz_word:
823 printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
824 printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
825 break;
826 case sz_byte:
827 printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
828 printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
829 printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
830 break;
831 }
832 }
833
834 static const char *cmask (wordsizes size)
835 {
836 switch (size) {
837 case sz_byte: return "0x80";
838 case sz_word: return "0x8000";
839 case sz_long: return "0x80000000";
840 default: abort ();
841 }
842 }
843
844 static int source_is_imm1_8 (struct instr *i)
845 {
846 return i->stype == 3;
847 }
848
849 static void gen_opcode (unsigned long int opcode)
850 {
851 struct instr *curi = table68k + opcode;
852 insn_n_cycles = 2;
853
854 start_brace ();
855 #if 0
856 printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
857 #endif
858 m68k_pc_offset = 2;
859 switch (curi->plev) {
860 case 0: /* not privileged */
861 break;
862 case 1: /* unprivileged only on 68000 */
863 if (cpu_level == 0)
864 break;
865 if (next_cpu_level < 0)
866 next_cpu_level = 0;
867
868 /* fall through */
869 case 2: /* priviledged */
870 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
871 need_endlabel = 1;
872 start_brace ();
873 break;
874 case 3: /* privileged if size == word */
875 if (curi->size == sz_byte)
876 break;
877 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
878 need_endlabel = 1;
879 start_brace ();
880 break;
881 }
882 switch (curi->mnemo) {
883 case i_OR:
884 case i_AND:
885 case i_EOR:
886 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
887 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
888 printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
889 genflags (flag_logical, curi->size, "src", "", "");
890 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
891 break;
892 case i_ORSR:
893 case i_EORSR:
894 printf ("\tMakeSR();\n");
895 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
896 if (curi->size == sz_byte) {
897 printf ("\tsrc &= 0xFF;\n");
898 }
899 printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
900 printf ("\tMakeFromSR();\n");
901 break;
902 case i_ANDSR:
903 printf ("\tMakeSR();\n");
904 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
905 if (curi->size == sz_byte) {
906 printf ("\tsrc |= 0xFF00;\n");
907 }
908 printf ("\tregs.sr &= src;\n");
909 printf ("\tMakeFromSR();\n");
910 break;
911 case i_SUB:
912 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
913 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
914 start_brace ();
915 genflags (flag_sub, curi->size, "newv", "src", "dst");
916 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
917 break;
918 case i_SUBA:
919 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
920 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
921 start_brace ();
922 printf ("\tuae_u32 newv = dst - src;\n");
923 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
924 break;
925 case i_SUBX:
926 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
927 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
928 start_brace ();
929 printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
930 genflags (flag_subx, curi->size, "newv", "src", "dst");
931 genflags (flag_zn, curi->size, "newv", "", "");
932 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
933 break;
934 case i_SBCD:
935 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
936 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
937 start_brace ();
938 printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
939 printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
940 printf ("\tuae_u16 newv, tmp_newv;\n");
941 printf ("\tint bcd = 0;\n");
942 printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
943 printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
944 printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
945 printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
946 duplicate_carry ();
947 /* Manual says bits NV are undefined though a real 68040 don't change them */
948 if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
949 if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
950 next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
951 genflags (flag_z, curi->size, "newv", "", "");
952 }
953 else {
954 genflags (flag_zn, curi->size, "newv", "", "");
955 printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
956 }
957 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
958 break;
959 case i_ADD:
960 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
961 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
962 start_brace ();
963 genflags (flag_add, curi->size, "newv", "src", "dst");
964 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
965 break;
966 case i_ADDA:
967 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
968 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
969 start_brace ();
970 printf ("\tuae_u32 newv = dst + src;\n");
971 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
972 break;
973 case i_ADDX:
974 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
975 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
976 start_brace ();
977 printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
978 genflags (flag_addx, curi->size, "newv", "src", "dst");
979 genflags (flag_zn, curi->size, "newv", "", "");
980 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
981 break;
982 case i_ABCD:
983 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
984 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
985 start_brace ();
986 printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
987 printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
988 printf ("\tuae_u16 newv, tmp_newv;\n");
989 printf ("\tint cflg;\n");
990 printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
991 printf ("\tif (newv_lo > 9) { newv += 6; }\n");
992 printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
993 printf ("\tif (cflg) newv += 0x60;\n");
994 printf ("\tSET_CFLG (cflg);\n");
995 duplicate_carry ();
996 /* Manual says bits NV are undefined though a real 68040 don't change them */
997 if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
998 if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
999 next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
1000 genflags (flag_z, curi->size, "newv", "", "");
1001 }
1002 else {
1003 genflags (flag_zn, curi->size, "newv", "", "");
1004 printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
1005 }
1006 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1007 break;
1008 case i_NEG:
1009 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1010 start_brace ();
1011 genflags (flag_sub, curi->size, "dst", "src", "0");
1012 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1013 break;
1014 case i_NEGX:
1015 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1016 start_brace ();
1017 printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1018 genflags (flag_subx, curi->size, "newv", "src", "0");
1019 genflags (flag_zn, curi->size, "newv", "", "");
1020 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1021 break;
1022 case i_NBCD:
1023 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1024 start_brace ();
1025 printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1026 printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1027 printf ("\tuae_u16 newv;\n");
1028 printf ("\tint cflg;\n");
1029 printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1030 printf ("\tnewv = newv_hi + newv_lo;\n");
1031 printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1032 printf ("\tif (cflg) newv -= 0x60;\n");
1033 printf ("\tSET_CFLG (cflg);\n");
1034 duplicate_carry();
1035 /* Manual says bits NV are undefined though a real 68040 don't change them */
1036 if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
1037 if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
1038 next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
1039 genflags (flag_z, curi->size, "newv", "", "");
1040 }
1041 else {
1042 genflags (flag_zn, curi->size, "newv", "", "");
1043 }
1044 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1045 break;
1046 case i_CLR:
1047 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1048 genflags (flag_logical, curi->size, "0", "", "");
1049 genastore ("0", curi->smode, "srcreg", curi->size, "src");
1050 break;
1051 case i_NOT:
1052 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1053 start_brace ();
1054 printf ("\tuae_u32 dst = ~src;\n");
1055 genflags (flag_logical, curi->size, "dst", "", "");
1056 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1057 break;
1058 case i_TST:
1059 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1060 genflags (flag_logical, curi->size, "src", "", "");
1061 break;
1062 case i_BTST:
1063 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1064 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1065 if (curi->size == sz_byte)
1066 printf ("\tsrc &= 7;\n");
1067 else
1068 printf ("\tsrc &= 31;\n");
1069 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1070 break;
1071 case i_BCHG:
1072 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1073 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1074 if (curi->size == sz_byte)
1075 printf ("\tsrc &= 7;\n");
1076 else
1077 printf ("\tsrc &= 31;\n");
1078 printf ("\tdst ^= (1 << src);\n");
1079 printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1080 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1081 break;
1082 case i_BCLR:
1083 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1084 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1085 if (curi->size == sz_byte)
1086 printf ("\tsrc &= 7;\n");
1087 else
1088 printf ("\tsrc &= 31;\n");
1089 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1090 printf ("\tdst &= ~(1 << src);\n");
1091 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1092 break;
1093 case i_BSET:
1094 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1095 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1096 if (curi->size == sz_byte)
1097 printf ("\tsrc &= 7;\n");
1098 else
1099 printf ("\tsrc &= 31;\n");
1100 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1101 printf ("\tdst |= (1 << src);\n");
1102 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1103 break;
1104 case i_CMPM:
1105 case i_CMP:
1106 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1107 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1108 start_brace ();
1109 genflags (flag_cmp, curi->size, "newv", "src", "dst");
1110 break;
1111 case i_CMPA:
1112 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1113 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1114 start_brace ();
1115 genflags (flag_cmp, sz_long, "newv", "src", "dst");
1116 break;
1117 /* The next two are coded a little unconventional, but they are doing
1118 * weird things... */
1119 case i_MVPRM:
1120 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1121
1122 printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1123 if (curi->size == sz_word) {
1124 printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1125 } else {
1126 printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1127 printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1128 }
1129 break;
1130 case i_MVPMR:
1131 printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1132 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1133 if (curi->size == sz_word) {
1134 printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1135 } else {
1136 printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1137 printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1138 }
1139 genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1140 break;
1141 case i_MOVE:
1142 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1143 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1144 genflags (flag_logical, curi->size, "src", "", "");
1145 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1146 break;
1147 case i_MOVEA:
1148 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1149 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1150 if (curi->size == sz_word) {
1151 printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1152 } else {
1153 printf ("\tuae_u32 val = src;\n");
1154 }
1155 genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1156 break;
1157 case i_MVSR2:
1158 genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1159 printf ("\tMakeSR();\n");
1160 if (curi->size == sz_byte)
1161 genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1162 else
1163 genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1164 break;
1165 case i_MV2SR:
1166 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1167 if (curi->size == sz_byte)
1168 printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1169 else {
1170 printf ("\tregs.sr = src;\n");
1171 }
1172 printf ("\tMakeFromSR();\n");
1173 break;
1174 case i_SWAP:
1175 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1176 start_brace ();
1177 printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1178 genflags (flag_logical, sz_long, "dst", "", "");
1179 genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1180 break;
1181 case i_EXG:
1182 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1183 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1184 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1185 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1186 break;
1187 case i_EXT:
1188 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1189 start_brace ();
1190 switch (curi->size) {
1191 case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1192 case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1193 case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1194 default: abort ();
1195 }
1196 genflags (flag_logical,
1197 curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1198 genastore ("dst", curi->smode, "srcreg",
1199 curi->size == sz_word ? sz_word : sz_long, "src");
1200 break;
1201 case i_MVMEL:
1202 genmovemel (opcode);
1203 break;
1204 case i_MVMLE:
1205 genmovemle (opcode);
1206 break;
1207 case i_TRAP:
1208 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1209 sync_m68k_pc ();
1210 printf ("\tException(src+32,0);\n");
1211 m68k_pc_offset = 0;
1212 break;
1213 case i_MVR2USP:
1214 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1215 printf ("\tregs.usp = src;\n");
1216 break;
1217 case i_MVUSP2R:
1218 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1219 genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1220 break;
1221 case i_RESET:
1222 break;
1223 case i_NOP:
1224 break;
1225 case i_STOP:
1226 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1227 printf ("\tregs.sr = src;\n");
1228 printf ("\tMakeFromSR();\n");
1229 printf ("\tm68k_setstopped(1);\n");
1230 break;
1231 case i_RTE:
1232 if (cpu_level == 0) {
1233 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1234 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1235 printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1236 fill_prefetch_0 ();
1237 printf ("\tMakeFromSR();\n");
1238 } else {
1239 int old_brace_level = n_braces;
1240 if (next_cpu_level < 0)
1241 next_cpu_level = 0;
1242 printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1243 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1244 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1245 genamode (Aipi, "7", sz_word, "format", 1, 0);
1246 printf ("\tnewsr = sr; newpc = pc;\n");
1247 printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1248 printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1249 printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1250 /* gb-- the next two lines are deleted in Bernie's gencpu.c */
1251 printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1252 printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1253 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1254 printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1255 printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1256 printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1257 printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1258 printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1259 pop_braces (old_brace_level);
1260 printf ("\tregs.sr = newsr; MakeFromSR();\n");
1261 printf ("\tm68k_setpc_rte(newpc);\n");
1262 fill_prefetch_0 ();
1263 need_endlabel = 1;
1264 }
1265 /* PC is set and prefetch filled. */
1266 m68k_pc_offset = 0;
1267 break;
1268 case i_RTD:
1269 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1270 genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1271 printf ("\tm68k_areg(regs, 7) += offs;\n");
1272 printf ("\tm68k_setpc_rte(pc);\n");
1273 fill_prefetch_0 ();
1274 /* PC is set and prefetch filled. */
1275 m68k_pc_offset = 0;
1276 break;
1277 case i_LINK:
1278 genamode (Apdi, "7", sz_long, "old", 2, 0);
1279 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1280 genastore ("src", Apdi, "7", sz_long, "old");
1281 genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1282 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1283 printf ("\tm68k_areg(regs, 7) += offs;\n");
1284 break;
1285 case i_UNLK:
1286 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1287 printf ("\tm68k_areg(regs, 7) = src;\n");
1288 genamode (Aipi, "7", sz_long, "old", 1, 0);
1289 genastore ("old", curi->smode, "srcreg", curi->size, "src");
1290 break;
1291 case i_RTS:
1292 printf ("\tm68k_do_rts();\n");
1293 fill_prefetch_0 ();
1294 m68k_pc_offset = 0;
1295 break;
1296 case i_TRAPV:
1297 sync_m68k_pc ();
1298 printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1299 need_endlabel = 1;
1300 break;
1301 case i_RTR:
1302 printf ("\tMakeSR();\n");
1303 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1304 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1305 printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1306 printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1307 fill_prefetch_0 ();
1308 printf ("\tMakeFromSR();\n");
1309 m68k_pc_offset = 0;
1310 break;
1311 case i_JSR:
1312 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1313 printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1314 fill_prefetch_0 ();
1315 m68k_pc_offset = 0;
1316 break;
1317 case i_JMP:
1318 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1319 printf ("\tm68k_setpc(srca);\n");
1320 fill_prefetch_0 ();
1321 m68k_pc_offset = 0;
1322 break;
1323 case i_BSR:
1324 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1325 printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1326 if (using_exception_3) {
1327 printf ("\tif (src & 1) {\n");
1328 printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1329 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1330 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1331 printf ("\t}\n");
1332 need_endlabel = 1;
1333 }
1334 printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1335 fill_prefetch_0 ();
1336 m68k_pc_offset = 0;
1337 break;
1338 case i_Bcc:
1339 if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) {
1340 /* gb-- variant probably more favorable to compiler optimizations
1341 also assumes no prefetch buffer is used
1342 Hmm, that would make sense with processors capable of conditional moves */
1343 if (curi->size == sz_long && next_cpu_level < 1)
1344 next_cpu_level = 1;
1345 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1346 printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset);
1347 m68k_pc_offset = 0;
1348 }
1349 else {
1350 /* original code for branch instructions */
1351 if (curi->size == sz_long) {
1352 if (cpu_level < 2) {
1353 printf ("\tm68k_incpc(2);\n");
1354 printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1355 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1356 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1357 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1358 need_endlabel = 1;
1359 } else {
1360 if (next_cpu_level < 1)
1361 next_cpu_level = 1;
1362 }
1363 }
1364 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1365 printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1366 if (using_exception_3) {
1367 printf ("\tif (src & 1) {\n");
1368 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1369 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1370 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1371 printf ("\t}\n");
1372 need_endlabel = 1;
1373 }
1374 printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1375 fill_prefetch_0 ();
1376 printf ("return;\n");
1377 printf ("didnt_jump:;\n");
1378 need_endlabel = 1;
1379 }
1380 break;
1381 case i_LEA:
1382 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1383 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1384 genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1385 break;
1386 case i_PEA:
1387 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1388 genamode (Apdi, "7", sz_long, "dst", 2, 0);
1389 genastore ("srca", Apdi, "7", sz_long, "dst");
1390 break;
1391 case i_DBcc:
1392 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1393 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1394
1395 printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1396 genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1397
1398 printf ("\t\tif (src) {\n");
1399 if (using_exception_3) {
1400 printf ("\t\t\tif (offs & 1) {\n");
1401 printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1402 printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1403 printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1404 printf ("\t\t}\n");
1405 need_endlabel = 1;
1406 }
1407 printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1408 fill_prefetch_0 ();
1409 printf ("return;\n");
1410 printf ("\t\t}\n");
1411 printf ("\t}\n");
1412 need_endlabel = 1;
1413 break;
1414 case i_Scc:
1415 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1416 start_brace ();
1417 printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1418 genastore ("val", curi->smode, "srcreg", curi->size, "src");
1419 break;
1420 case i_DIVU:
1421 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1422 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1423 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1424 sync_m68k_pc ();
1425 /* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1426 * on this (actually, it's doing a DIVS). */
1427 printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1428 printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1429 printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1430 /* The N flag appears to be set each time there is an overflow.
1431 * Weird. */
1432 printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1433 genflags (flag_logical, sz_word, "newv", "", "");
1434 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1435 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1436 printf ("\t}\n");
1437 printf ("\t}\n");
1438 insn_n_cycles += 68;
1439 need_endlabel = 1;
1440 break;
1441 case i_DIVS:
1442 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1443 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1444 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1445 sync_m68k_pc ();
1446 printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1447 printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1448 printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1449 printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1450 printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1451 genflags (flag_logical, sz_word, "newv", "", "");
1452 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1453 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1454 printf ("\t}\n");
1455 printf ("\t}\n");
1456 insn_n_cycles += 72;
1457 need_endlabel = 1;
1458 break;
1459 case i_MULU:
1460 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1461 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1462 start_brace ();
1463 printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1464 genflags (flag_logical, sz_long, "newv", "", "");
1465 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1466 insn_n_cycles += 32;
1467 break;
1468 case i_MULS:
1469 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1470 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1471 start_brace ();
1472 printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1473 genflags (flag_logical, sz_long, "newv", "", "");
1474 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1475 insn_n_cycles += 32;
1476 break;
1477 case i_CHK:
1478 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1479 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1480 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1481 printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1482 printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1483 need_endlabel = 1;
1484 break;
1485
1486 case i_CHK2:
1487 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1488 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1489 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1490 printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1491 switch (curi->size) {
1492 case sz_byte:
1493 printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1494 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1495 break;
1496 case sz_word:
1497 printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1498 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1499 break;
1500 case sz_long:
1501 printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1502 break;
1503 default:
1504 abort ();
1505 }
1506 printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1507 printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1508 printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1509 need_endlabel = 1;
1510 break;
1511
1512 case i_ASR:
1513 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1514 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1515 start_brace ();
1516 switch (curi->size) {
1517 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1518 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1519 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1520 default: abort ();
1521 }
1522 printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1523 printf ("\tcnt &= 63;\n");
1524 printf ("\tCLEAR_CZNV;\n");
1525 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1526 printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1527 printf ("\t\tSET_CFLG (sign);\n");
1528 duplicate_carry ();
1529 if (source_is_imm1_8 (curi))
1530 printf ("\t} else {\n");
1531 else
1532 printf ("\t} else if (cnt > 0) {\n");
1533 printf ("\t\tval >>= cnt - 1;\n");
1534 printf ("\t\tSET_CFLG (val & 1);\n");
1535 duplicate_carry ();
1536 printf ("\t\tval >>= 1;\n");
1537 printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1538 bit_mask (curi->size),
1539 bit_size (curi->size));
1540 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1541 printf ("\t}\n");
1542 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1543 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1544 break;
1545 case i_ASL:
1546 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1547 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1548 start_brace ();
1549 switch (curi->size) {
1550 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1551 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1552 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1553 default: abort ();
1554 }
1555 printf ("\tcnt &= 63;\n");
1556 printf ("\tCLEAR_CZNV;\n");
1557 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1558 printf ("\t\tSET_VFLG (val != 0);\n");
1559 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1560 bit_size (curi->size));
1561 duplicate_carry ();
1562 printf ("\t\tval = 0;\n");
1563 if (source_is_imm1_8 (curi))
1564 printf ("\t} else {\n");
1565 else
1566 printf ("\t} else if (cnt > 0) {\n");
1567 printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1568 bit_mask (curi->size),
1569 bit_size (curi->size) - 1,
1570 bit_mask (curi->size));
1571 printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1572 printf ("\t\tval <<= cnt - 1;\n");
1573 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1574 duplicate_carry ();
1575 printf ("\t\tval <<= 1;\n");
1576 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1577 printf ("\t}\n");
1578 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1579 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1580 break;
1581 case i_LSR:
1582 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1583 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1584 start_brace ();
1585 switch (curi->size) {
1586 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1587 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1588 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1589 default: abort ();
1590 }
1591 printf ("\tcnt &= 63;\n");
1592 printf ("\tCLEAR_CZNV;\n");
1593 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1594 printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1595 bit_size (curi->size), bit_size (curi->size) - 1);
1596 duplicate_carry ();
1597 printf ("\t\tval = 0;\n");
1598 if (source_is_imm1_8 (curi))
1599 printf ("\t} else {\n");
1600 else
1601 printf ("\t} else if (cnt > 0) {\n");
1602 printf ("\t\tval >>= cnt - 1;\n");
1603 printf ("\t\tSET_CFLG (val & 1);\n");
1604 duplicate_carry ();
1605 printf ("\t\tval >>= 1;\n");
1606 printf ("\t}\n");
1607 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1608 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1609 break;
1610 case i_LSL:
1611 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1612 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1613 start_brace ();
1614 switch (curi->size) {
1615 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1616 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1617 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1618 default: abort ();
1619 }
1620 printf ("\tcnt &= 63;\n");
1621 printf ("\tCLEAR_CZNV;\n");
1622 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1623 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1624 bit_size (curi->size));
1625 duplicate_carry ();
1626 printf ("\t\tval = 0;\n");
1627 if (source_is_imm1_8 (curi))
1628 printf ("\t} else {\n");
1629 else
1630 printf ("\t} else if (cnt > 0) {\n");
1631 printf ("\t\tval <<= (cnt - 1);\n");
1632 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1633 duplicate_carry ();
1634 printf ("\t\tval <<= 1;\n");
1635 printf ("\tval &= %s;\n", bit_mask (curi->size));
1636 printf ("\t}\n");
1637 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1638 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1639 break;
1640 case i_ROL:
1641 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1642 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1643 start_brace ();
1644 switch (curi->size) {
1645 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1646 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1647 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1648 default: abort ();
1649 }
1650 printf ("\tcnt &= 63;\n");
1651 printf ("\tCLEAR_CZNV;\n");
1652 if (source_is_imm1_8 (curi))
1653 printf ("{");
1654 else
1655 printf ("\tif (cnt > 0) {\n");
1656 printf ("\tuae_u32 loval;\n");
1657 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1658 printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1659 printf ("\tval <<= cnt;\n");
1660 printf ("\tval |= loval;\n");
1661 printf ("\tval &= %s;\n", bit_mask (curi->size));
1662 printf ("\tSET_CFLG (val & 1);\n");
1663 printf ("}\n");
1664 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1665 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1666 break;
1667 case i_ROR:
1668 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1669 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1670 start_brace ();
1671 switch (curi->size) {
1672 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1673 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1674 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1675 default: abort ();
1676 }
1677 printf ("\tcnt &= 63;\n");
1678 printf ("\tCLEAR_CZNV;\n");
1679 if (source_is_imm1_8 (curi))
1680 printf ("{");
1681 else
1682 printf ("\tif (cnt > 0) {");
1683 printf ("\tuae_u32 hival;\n");
1684 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1685 printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1686 printf ("\tval >>= cnt;\n");
1687 printf ("\tval |= hival;\n");
1688 printf ("\tval &= %s;\n", bit_mask (curi->size));
1689 printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1690 printf ("\t}\n");
1691 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1692 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1693 break;
1694 case i_ROXL:
1695 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1696 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1697 start_brace ();
1698 switch (curi->size) {
1699 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1700 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1701 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1702 default: abort ();
1703 }
1704 printf ("\tcnt &= 63;\n");
1705 printf ("\tCLEAR_CZNV;\n");
1706 if (source_is_imm1_8 (curi))
1707 printf ("{");
1708 else {
1709 force_range_for_rox ("cnt", curi->size);
1710 printf ("\tif (cnt > 0) {\n");
1711 }
1712 printf ("\tcnt--;\n");
1713 printf ("\t{\n\tuae_u32 carry;\n");
1714 printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1715 printf ("\tcarry = loval & 1;\n");
1716 printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1717 printf ("\tSET_XFLG (carry);\n");
1718 printf ("\tval &= %s;\n", bit_mask (curi->size));
1719 printf ("\t} }\n");
1720 printf ("\tSET_CFLG (GET_XFLG);\n");
1721 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1722 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1723 break;
1724 case i_ROXR:
1725 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1726 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1727 start_brace ();
1728 switch (curi->size) {
1729 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1730 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1731 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1732 default: abort ();
1733 }
1734 printf ("\tcnt &= 63;\n");
1735 printf ("\tCLEAR_CZNV;\n");
1736 if (source_is_imm1_8 (curi))
1737 printf ("{");
1738 else {
1739 force_range_for_rox ("cnt", curi->size);
1740 printf ("\tif (cnt > 0) {\n");
1741 }
1742 printf ("\tcnt--;\n");
1743 printf ("\t{\n\tuae_u32 carry;\n");
1744 printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
1745 printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
1746 printf ("\tval >>= cnt;\n");
1747 printf ("\tcarry = val & 1;\n");
1748 printf ("\tval >>= 1;\n");
1749 printf ("\tval |= hival;\n");
1750 printf ("\tSET_XFLG (carry);\n");
1751 printf ("\tval &= %s;\n", bit_mask (curi->size));
1752 printf ("\t} }\n");
1753 printf ("\tSET_CFLG (GET_XFLG);\n");
1754 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1755 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1756 break;
1757 case i_ASRW:
1758 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1759 start_brace ();
1760 switch (curi->size) {
1761 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1762 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1763 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1764 default: abort ();
1765 }
1766 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1767 printf ("\tuae_u32 cflg = val & 1;\n");
1768 printf ("\tval = (val >> 1) | sign;\n");
1769 genflags (flag_logical, curi->size, "val", "", "");
1770 printf ("\tSET_CFLG (cflg);\n");
1771 duplicate_carry ();
1772 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1773 break;
1774 case i_ASLW:
1775 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1776 start_brace ();
1777 switch (curi->size) {
1778 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1779 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1780 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1781 default: abort ();
1782 }
1783 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1784 printf ("\tuae_u32 sign2;\n");
1785 printf ("\tval <<= 1;\n");
1786 genflags (flag_logical, curi->size, "val", "", "");
1787 printf ("\tsign2 = %s & val;\n", cmask (curi->size));
1788 printf ("\tSET_CFLG (sign != 0);\n");
1789 duplicate_carry ();
1790
1791 printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
1792 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1793 break;
1794 case i_LSRW:
1795 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1796 start_brace ();
1797 switch (curi->size) {
1798 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1799 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1800 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1801 default: abort ();
1802 }
1803 printf ("\tuae_u32 carry = val & 1;\n");
1804 printf ("\tval >>= 1;\n");
1805 genflags (flag_logical, curi->size, "val", "", "");
1806 printf ("SET_CFLG (carry);\n");
1807 duplicate_carry ();
1808 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1809 break;
1810 case i_LSLW:
1811 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1812 start_brace ();
1813 switch (curi->size) {
1814 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1815 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1816 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1817 default: abort ();
1818 }
1819 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1820 printf ("\tval <<= 1;\n");
1821 genflags (flag_logical, curi->size, "val", "", "");
1822 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1823 duplicate_carry ();
1824 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1825 break;
1826 case i_ROLW:
1827 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1828 start_brace ();
1829 switch (curi->size) {
1830 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1831 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1832 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1833 default: abort ();
1834 }
1835 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1836 printf ("\tval <<= 1;\n");
1837 printf ("\tif (carry) val |= 1;\n");
1838 genflags (flag_logical, curi->size, "val", "", "");
1839 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1840 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1841 break;
1842 case i_RORW:
1843 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1844 start_brace ();
1845 switch (curi->size) {
1846 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1847 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1848 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1849 default: abort ();
1850 }
1851 printf ("\tuae_u32 carry = val & 1;\n");
1852 printf ("\tval >>= 1;\n");
1853 printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
1854 genflags (flag_logical, curi->size, "val", "", "");
1855 printf ("SET_CFLG (carry);\n");
1856 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1857 break;
1858 case i_ROXLW:
1859 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1860 start_brace ();
1861 switch (curi->size) {
1862 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1863 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1864 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1865 default: abort ();
1866 }
1867 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1868 printf ("\tval <<= 1;\n");
1869 printf ("\tif (GET_XFLG) val |= 1;\n");
1870 genflags (flag_logical, curi->size, "val", "", "");
1871 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1872 duplicate_carry ();
1873 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1874 break;
1875 case i_ROXRW:
1876 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1877 start_brace ();
1878 switch (curi->size) {
1879 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1880 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1881 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1882 default: abort ();
1883 }
1884 printf ("\tuae_u32 carry = val & 1;\n");
1885 printf ("\tval >>= 1;\n");
1886 printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
1887 genflags (flag_logical, curi->size, "val", "", "");
1888 printf ("SET_CFLG (carry);\n");
1889 duplicate_carry ();
1890 genastore ("val", curi->smode, "srcreg", curi->size, "data");
1891 break;
1892 case i_MOVEC2:
1893 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1894 start_brace ();
1895 printf ("\tint regno = (src >> 12) & 15;\n");
1896 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1897 printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1898 break;
1899 case i_MOVE2C:
1900 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1901 start_brace ();
1902 printf ("\tint regno = (src >> 12) & 15;\n");
1903 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
1904 printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
1905 break;
1906 case i_CAS:
1907 {
1908 int old_brace_level;
1909 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1910 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1911 start_brace ();
1912 printf ("\tint ru = (src >> 6) & 7;\n");
1913 printf ("\tint rc = src & 7;\n");
1914 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
1915 printf ("\tif (GET_ZFLG)");
1916 old_brace_level = n_braces;
1917 start_brace ();
1918 genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
1919 pop_braces (old_brace_level);
1920 printf ("else");
1921 start_brace ();
1922 printf ("m68k_dreg(regs, rc) = dst;\n");
1923 pop_braces (old_brace_level);
1924 }
1925 break;
1926 case i_CAS2:
1927 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1928 printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
1929 printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
1930 if (curi->size == sz_word) {
1931 int old_brace_level = n_braces;
1932 printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
1933 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
1934 printf ("\tif (GET_ZFLG) {\n");
1935 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
1936 printf ("\tif (GET_ZFLG) {\n");
1937 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
1938 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
1939 printf ("\t}}\n");
1940 pop_braces (old_brace_level);
1941 printf ("\tif (! GET_ZFLG) {\n");
1942 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
1943 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
1944 printf ("\t}\n");
1945 } else {
1946 int old_brace_level = n_braces;
1947 printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
1948 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
1949 printf ("\tif (GET_ZFLG) {\n");
1950 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
1951 printf ("\tif (GET_ZFLG) {\n");
1952 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
1953 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
1954 printf ("\t}}\n");
1955 pop_braces (old_brace_level);
1956 printf ("\tif (! GET_ZFLG) {\n");
1957 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
1958 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
1959 printf ("\t}\n");
1960 }
1961 break;
1962 case i_MOVES: /* ignore DFC and SFC because we have no MMU */
1963 {
1964 int old_brace_level;
1965 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1966 printf ("\tif (extra & 0x800)\n");
1967 old_brace_level = n_braces;
1968 start_brace ();
1969 printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
1970 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1971 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1972 pop_braces (old_brace_level);
1973 printf ("else");
1974 start_brace ();
1975 genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
1976 printf ("\tif (extra & 0x8000) {\n");
1977 switch (curi->size) {
1978 case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
1979 case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
1980 case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
1981 default: abort ();
1982 }
1983 printf ("\t} else {\n");
1984 genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
1985 printf ("\t}\n");
1986 pop_braces (old_brace_level);
1987 }
1988 break;
1989 case i_BKPT: /* only needed for hardware emulators */
1990 sync_m68k_pc ();
1991 printf ("\top_illg(opcode);\n");
1992 break;
1993 case i_CALLM: /* not present in 68030 */
1994 sync_m68k_pc ();
1995 printf ("\top_illg(opcode);\n");
1996 break;
1997 case i_RTM: /* not present in 68030 */
1998 sync_m68k_pc ();
1999 printf ("\top_illg(opcode);\n");
2000 break;
2001 case i_TRAPcc:
2002 if (curi->smode != am_unknown && curi->smode != am_illg)
2003 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2004 printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2005 need_endlabel = 1;
2006 break;
2007 case i_DIVL:
2008 sync_m68k_pc ();
2009 start_brace ();
2010 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2011 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2012 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2013 sync_m68k_pc ();
2014 printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2015 break;
2016 case i_MULL:
2017 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2018 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2019 sync_m68k_pc ();
2020 printf ("\tm68k_mull(opcode, dst, extra);\n");
2021 break;
2022 case i_BFTST:
2023 case i_BFEXTU:
2024 case i_BFCHG:
2025 case i_BFEXTS:
2026 case i_BFCLR:
2027 case i_BFFFO:
2028 case i_BFSET:
2029 case i_BFINS:
2030 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2031 genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2032 start_brace ();
2033 printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2034 printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2035 if (curi->dmode == Dreg) {
2036 printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2037 } else {
2038 printf ("\tuae_u32 tmp,bf0,bf1;\n");
2039 printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2040 printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2041 printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2042 }
2043 printf ("\ttmp >>= (32 - width);\n");
2044 printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n");
2045 printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2046 switch (curi->mnemo) {
2047 case i_BFTST:
2048 break;
2049 case i_BFEXTU:
2050 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2051 break;
2052 case i_BFCHG:
2053 printf ("\ttmp = ~tmp;\n");
2054 break;
2055 case i_BFEXTS:
2056 printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2057 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2058 break;
2059 case i_BFCLR:
2060 printf ("\ttmp = 0;\n");
2061 break;
2062 case i_BFFFO:
2063 printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2064 printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2065 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2066 break;
2067 case i_BFSET:
2068 printf ("\ttmp = 0xffffffff;\n");
2069 break;
2070 case i_BFINS:
2071 printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2072 printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2073 printf ("\tSET_ZFLG (tmp == 0);\n");
2074 break;
2075 default:
2076 break;
2077 }
2078 if (curi->mnemo == i_BFCHG
2079 || curi->mnemo == i_BFCLR
2080 || curi->mnemo == i_BFSET
2081 || curi->mnemo == i_BFINS)
2082 {
2083 printf ("\ttmp <<= (32 - width);\n");
2084 if (curi->dmode == Dreg) {
2085 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2086 printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2087 printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2088 printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2089 printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2090 } else {
2091 printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2092 printf ("\t\t(tmp >> (offset & 7)) |\n");
2093 printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2094 printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2095 printf ("\tput_long(dsta,bf0 );\n");
2096 printf ("\tif (((offset & 7) + width) > 32) {\n");
2097 printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2098 printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2099 printf ("\t\tput_byte(dsta+4,bf1);\n");
2100 printf ("\t}\n");
2101 }
2102 }
2103 break;
2104 case i_PACK:
2105 if (curi->smode == Dreg) {
2106 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2107 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2108 } else {
2109 printf ("\tuae_u16 val;\n");
2110 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2111 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2112 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2113 printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2114 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2115 printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2116 }
2117 break;
2118 case i_UNPK:
2119 if (curi->smode == Dreg) {
2120 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2121 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2122 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2123 } else {
2124 printf ("\tuae_u16 val;\n");
2125 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2126 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2127 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2128 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2129 printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2130 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2131 printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2132 }
2133 break;
2134 case i_TAS:
2135 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2136 genflags (flag_logical, curi->size, "src", "", "");
2137 printf ("\tsrc |= 0x80;\n");
2138 genastore ("src", curi->smode, "srcreg", curi->size, "src");
2139 break;
2140 case i_FPP:
2141 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2142 sync_m68k_pc ();
2143 swap_opcode ();
2144 printf ("\tfpuop_arithmetic(opcode, extra);\n");
2145 break;
2146 case i_FDBcc:
2147 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2148 sync_m68k_pc ();
2149 swap_opcode ();
2150 printf ("\tfpuop_dbcc(opcode, extra);\n");
2151 break;
2152 case i_FScc:
2153 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2154 sync_m68k_pc ();
2155 swap_opcode ();
2156 printf ("\tfpuop_scc(opcode,extra);\n");
2157 break;
2158 case i_FTRAPcc:
2159 sync_m68k_pc ();
2160 start_brace ();
2161 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2162 if (curi->smode != am_unknown && curi->smode != am_illg)
2163 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2164 sync_m68k_pc ();
2165 swap_opcode ();
2166 printf ("\tfpuop_trapcc(opcode,oldpc);\n");
2167 break;
2168 case i_FBcc:
2169 sync_m68k_pc ();
2170 start_brace ();
2171 printf ("\tuaecptr pc = m68k_getpc();\n");
2172 genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2173 sync_m68k_pc ();
2174 swap_opcode ();
2175 printf ("\tfpuop_bcc(opcode,pc,extra);\n");
2176 break;
2177 case i_FSAVE:
2178 sync_m68k_pc ();
2179 swap_opcode ();
2180 printf ("\tfpuop_save(opcode);\n");
2181 break;
2182 case i_FRESTORE:
2183 sync_m68k_pc ();
2184 swap_opcode ();
2185 printf ("\tfpuop_restore(opcode);\n");
2186 break;
2187 case i_CINVL:
2188 case i_CINVP:
2189 case i_CINVA:
2190 /* gb-- srcreg now contains the cache field */
2191 printf ("\tif (srcreg&0x2)\n");
2192 printf ("\t\tflush_icache(%d);\n", 30 + ((opcode >> 3) & 3));
2193 break;
2194 case i_CPUSHL:
2195 case i_CPUSHP:
2196 case i_CPUSHA:
2197 /* gb-- srcreg now contains the cache field */
2198 printf ("\tif (srcreg&0x2)\n");
2199 printf ("\t\tflush_icache(%d);\n", 40 + ((opcode >> 3) & 3));
2200 break;
2201 case i_MOVE16:
2202 if ((opcode & 0xfff8) == 0xf620) {
2203 /* MOVE16 (Ax)+,(Ay)+ */
2204 printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2205 printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2206 printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2207 printf ("\tput_long(memd, get_long(mems));\n");
2208 printf ("\tput_long(memd+4, get_long(mems+4));\n");
2209 printf ("\tput_long(memd+8, get_long(mems+8));\n");
2210 printf ("\tput_long(memd+12, get_long(mems+12));\n");
2211 printf ("\tif (srcreg != dstreg)\n");
2212 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2213 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2214 }
2215 else {
2216 /* Other variants */
2217 genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2218 genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2219 printf ("\tmemsa &= ~15;\n");
2220 printf ("\tmemda &= ~15;\n");
2221 printf ("\tput_long(memda, get_long(memsa));\n");
2222 printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2223 printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2224 printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2225 if ((opcode & 0xfff8) == 0xf600)
2226 printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2227 else if ((opcode & 0xfff8) == 0xf608)
2228 printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2229 }
2230 break;
2231 case i_MMUOP:
2232 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2233 sync_m68k_pc ();
2234 swap_opcode ();
2235 printf ("\tmmu_op(opcode,extra);\n");
2236 break;
2237
2238 case i_EMULOP_RETURN:
2239 printf ("\tm68k_emulop_return();\n");
2240 m68k_pc_offset = 0;
2241 break;
2242
2243 case i_EMULOP:
2244 printf ("\n");
2245 swap_opcode ();
2246 printf ("\tm68k_emulop(opcode);\n");
2247 break;
2248
2249 default:
2250 abort ();
2251 break;
2252 }
2253 finish_braces ();
2254 sync_m68k_pc ();
2255 }
2256
2257 static void generate_includes (FILE * f)
2258 {
2259 fprintf (f, "#include \"sysdeps.h\"\n");
2260
2261 fprintf (f, "#include \"m68k.h\"\n");
2262 fprintf (f, "#include \"memory.h\"\n");
2263 fprintf (f, "#include \"readcpu.h\"\n");
2264 fprintf (f, "#include \"newcpu.h\"\n");
2265 fprintf (f, "#include \"compiler/compemu.h\"\n");
2266 fprintf (f, "#include \"fpu/fpu.h\"\n");
2267 fprintf (f, "#include \"cputbl.h\"\n");
2268
2269 fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n");
2270 fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n");
2271 fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n");
2272 fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n");
2273 fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n");
2274
2275 fprintf (f, "#ifdef NOFLAGS\n");
2276 fprintf (f, "# include \"noflags.h\"\n");
2277 fprintf (f, "#endif\n");
2278 }
2279
2280 static int postfix;
2281
2282 static void generate_one_opcode (int rp)
2283 {
2284 uae_u16 smsk, dmsk;
2285 long int opcode = opcode_map[rp];
2286 const char *opcode_str;
2287
2288 if (table68k[opcode].mnemo == i_ILLG
2289 || table68k[opcode].clev > cpu_level)
2290 return;
2291
2292 if (table68k[opcode].handler != -1)
2293 return;
2294
2295 opcode_str = get_instruction_string (opcode);
2296
2297 if (opcode_next_clev[rp] != cpu_level) {
2298 if (table68k[opcode].flagdead == 0)
2299 /* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2300 fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2301 opcode, opcode_str);
2302 else
2303 fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2304 opcode, opcode_str);
2305 return;
2306 }
2307
2308 if (table68k[opcode].flagdead == 0)
2309 /* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2310 fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, opcode_str);
2311 else
2312 fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, opcode_str);
2313
2314 fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2315 fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2316
2317 /* gb-- The "nf" variant for an instruction that doesn't set the condition
2318 codes at all is the same as the "ff" variant, so we don't need the "nf"
2319 variant to be compiled since it is mapped to the "ff" variant in the
2320 smalltbl. */
2321 if (table68k[opcode].flagdead == 0)
2322 printf ("#ifndef NOFLAGS\n");
2323
2324 printf ("void REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, opcode_str);
2325 printf ("\tcpuop_begin();\n");
2326
2327 switch (table68k[opcode].stype) {
2328 case 0: smsk = 7; break;
2329 case 1: smsk = 255; break;
2330 case 2: smsk = 15; break;
2331 case 3: smsk = 7; break;
2332 case 4: smsk = 7; break;
2333 case 5: smsk = 63; break;
2334 case 6: smsk = 255; break;
2335 case 7: smsk = 3; break;
2336 default: abort ();
2337 }
2338 dmsk = 7;
2339
2340 next_cpu_level = -1;
2341 if (table68k[opcode].suse
2342 && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2343 && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2344 && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2345 && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16
2346 /* gb-- We don't want to fetch the EmulOp code since the EmulOp()
2347 routine uses the whole opcode value. Maybe all the EmulOps
2348 could be expanded out but I don't think it is an improvement */
2349 && table68k[opcode].stype != 6
2350 )
2351 {
2352 if (table68k[opcode].spos == -1) {
2353 if (((int) table68k[opcode].sreg) >= 128)
2354 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2355 else
2356 printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2357 } else {
2358 char source[100];
2359 int pos = table68k[opcode].spos;
2360
2361 #if 0
2362 /* Check that we can do the little endian optimization safely. */
2363 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2364 abort ();
2365 #endif
2366 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2367
2368 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2369 sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2370 pos ^ 8, 8 - pos, dmsk);
2371 else if (pos != 8)
2372 sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2373 else
2374 sprintf (source, "(opcode & %d)", smsk);
2375
2376 if (table68k[opcode].stype == 3)
2377 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2378 else if (table68k[opcode].stype == 1)
2379 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2380 else
2381 printf ("\tuae_u32 srcreg = %s;\n", source);
2382
2383 printf ("#else\n");
2384
2385 if (pos)
2386 sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2387 else
2388 sprintf (source, "(opcode & %d)", smsk);
2389
2390 if (table68k[opcode].stype == 3)
2391 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2392 else if (table68k[opcode].stype == 1)
2393 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2394 else
2395 printf ("\tuae_u32 srcreg = %s;\n", source);
2396
2397 printf ("#endif\n");
2398 }
2399 }
2400 if (table68k[opcode].duse
2401 /* Yes, the dmode can be imm, in case of LINK or DBcc */
2402 && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2403 && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2404 && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2405 {
2406 if (table68k[opcode].dpos == -1) {
2407 if (((int) table68k[opcode].dreg) >= 128)
2408 printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2409 else
2410 printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2411 } else {
2412 int pos = table68k[opcode].dpos;
2413 #if 0
2414 /* Check that we can do the little endian optimization safely. */
2415 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2416 abort ();
2417 #endif
2418 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2419
2420 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2421 printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2422 pos ^ 8, 8 - pos, dmsk);
2423 else if (pos != 8)
2424 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2425 pos ^ 8, dmsk);
2426 else
2427 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2428
2429 printf ("#else\n");
2430
2431 if (pos)
2432 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2433 pos, dmsk);
2434 else
2435 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2436
2437 printf ("#endif\n");
2438 }
2439 }
2440 need_endlabel = 0;
2441 endlabelno++;
2442 sprintf (endlabelstr, "endlabel%d", endlabelno);
2443 gen_opcode (opcode);
2444 if (need_endlabel)
2445 printf ("%s: ;\n", endlabelstr);
2446 printf ("\tcpuop_end();\n");
2447 printf ("}\n");
2448 if (table68k[opcode].flagdead == 0)
2449 printf ("\n#endif\n");
2450 opcode_next_clev[rp] = next_cpu_level;
2451 opcode_last_postfix[rp] = postfix;
2452 }
2453
2454 static void generate_func (void)
2455 {
2456 int i, j, rp;
2457
2458 using_prefetch = 0;
2459 using_exception_3 = 0;
2460 #if !USE_PREFETCH_BUFFER
2461 /* gb-- No need for a prefetch buffer, nor exception 3 handling */
2462 /* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */
2463 for (i = 0; i <= 4; i++) {
2464 #else
2465 for (i = 0; i < 6; i++) {
2466 #endif
2467 cpu_level = 4 - i;
2468 if (i == 5) {
2469 cpu_level = 0;
2470 using_prefetch = 1;
2471 using_exception_3 = 1;
2472 for (rp = 0; rp < nr_cpuop_funcs; rp++)
2473 opcode_next_clev[rp] = 0;
2474 }
2475 postfix = i;
2476 fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2477
2478 /* sam: this is for people with low memory (eg. me :)) */
2479 printf ("\n"
2480 "#if !defined(PART_1) && !defined(PART_2) && "
2481 "!defined(PART_3) && !defined(PART_4) && "
2482 "!defined(PART_5) && !defined(PART_6) && "
2483 "!defined(PART_7) && !defined(PART_8)"
2484 "\n"
2485 "#define PART_1 1\n"
2486 "#define PART_2 1\n"
2487 "#define PART_3 1\n"
2488 "#define PART_4 1\n"
2489 "#define PART_5 1\n"
2490 "#define PART_6 1\n"
2491 "#define PART_7 1\n"
2492 "#define PART_8 1\n"
2493 "#endif\n\n");
2494
2495 rp = 0;
2496 for(j=1;j<=8;++j) {
2497 int k = (j*nr_cpuop_funcs)/8;
2498 printf ("#ifdef PART_%d\n",j);
2499 for (; rp < k; rp++)
2500 generate_one_opcode (rp);
2501 printf ("#endif\n\n");
2502 }
2503
2504 fprintf (stblfile, "{ 0, 0, 0 }};\n");
2505 }
2506 }
2507
2508 int main (int argc, char **argv)
2509 {
2510 FILE *out;
2511 read_table68k ();
2512 do_merges ();
2513
2514 opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2515 opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2516 opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2517 counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2518 read_counts ();
2519
2520 /* It would be a lot nicer to put all in one file (we'd also get rid of
2521 * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2522 * I don't dare to touch the 68k version. */
2523
2524 headerfile = fopen ("cputbl.h", "w");
2525 stblfile = fopen ("cpustbl.cpp", "w");
2526 out = freopen ("cpuemu.cpp", "w", stdout);
2527
2528 generate_includes (stdout);
2529 generate_includes (stblfile);
2530
2531 generate_func ();
2532
2533 free (table68k);
2534 fclose (headerfile);
2535 fclose (stblfile);
2536 fflush (out);
2537 return 0;
2538 }