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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.2 by cebix, 1999-10-21T13:19:27Z

#	Line 24 | Line 24
24		#include "sysdeps.h"
25		#include "readcpu.h"
26
27	+	#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28	+	#define SPARC_ASSEMBLY 0
29	+	#endif
30	+
31		#define BOOL_TYPE "int"
32
33		static FILE *headerfile;
#	Line 710 | Line 714 | static void genflags_normal (flagtypes t
714
715		static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
716		{
717	<	#ifdef X86_ASSEMBLY
717	>	#ifdef SPARC_V8_ASSEMBLY
718	>	switch(type)
719	>	{
720	>	case flag_add:
721	>	start_brace();
722	>	printf("\tuae_u32 %s;\n", value);
723	>	switch(size)
724	>	{
725	>	case sz_byte:
726	>	printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
727	>	break;
728	>	case sz_word:
729	>	printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
730	>	break;
731	>	case sz_long:
732	>	printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
733	>	break;
734	>	}
735	>	return;
736	>
737	>	case flag_sub:
738	>	start_brace();
739	>	printf("\tuae_u32 %s;\n", value);
740	>	switch(size)
741	>	{
742	>	case sz_byte:
743	>	printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
744	>	break;
745	>	case sz_word:
746	>	printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
747	>	break;
748	>	case sz_long:
749	>	printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
750	>	break;
751	>	}
752	>	return;
753	>
754	>	case flag_cmp:
755	>	switch(size)
756	>	{
757	>	case sz_byte:
758	>	//                                      printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
759	>	break;
760	>	case sz_word:
761	>	//                                      printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
762	>	break;
763	>	case sz_long:
764	>	#if 1
765	>	printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
766	>	return;
767	>	#endif
768	>	break;
769	>	}
770	>	//                      return;
771	>	break;
772	>	}
773	>	#elif defined(SPARC_V9_ASSEMBLY)
774	>	switch(type)
775	>	{
776	>	case flag_add:
777	>	start_brace();
778	>	printf("\tuae_u32 %s;\n", value);
779	>	switch(size)
780	>	{
781	>	case sz_byte:
782	>	printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
783	>	break;
784	>	case sz_word:
785	>	printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
786	>	break;
787	>	case sz_long:
788	>	printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
789	>	break;
790	>	}
791	>	return;
792	>
793	>	case flag_sub:
794	>	start_brace();
795	>	printf("\tuae_u32 %s;\n", value);
796	>	switch(size)
797	>	{
798	>	case sz_byte:
799	>	printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
800	>	break;
801	>	case sz_word:
802	>	printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
803	>	break;
804	>	case sz_long:
805	>	printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
806	>	break;
807	>	}
808	>	return;
809	>
810	>	case flag_cmp:
811	>	switch(size)
812	>	{
813	>	case sz_byte:
814	>	printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
815	>	break;
816	>	case sz_word:
817	>	printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
818	>	break;
819	>	case sz_long:
820	>	printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
821	>	break;
822	>	}
823	>	return;
824	>
825	>	case flag_logical:
826	>	if (strcmp(value, "0") == 0) {
827	>	printf("\tregflags.nzvc = 0x04;\n");
828	>	} else {
829	>	switch(size) {
830	>	case sz_byte:
831	>	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
832	>	break;
833	>	case sz_word:
834	>	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
835	>	break;
836	>	case sz_long:
837	>	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
838	>	break;
839	>	}
840	>	}
841	>	return;
842	>
843	>	#if 0
844	>	case flag_logical_noclobber:
845	>	printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
846	>	if (strcmp(value, "0") == 0) {
847	>	printf("\tregflags.nzvc = old_flags | 0x04;\n");
848	>	} else {
849	>	switch(size) {
850	>	case sz_byte:
851	>	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
852	>	break;
853	>	case sz_word:
854	>	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
855	>	break;
856	>	case sz_long:
857	>	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
858	>	break;
859	>	}
860	>	printf("\tregflags.nzvc |= old_flags;\n");
861	>	}
862	>	printf("\t}\n");
863	>	return;
864	>	#endif
865	>	}
866	>	#elif defined(X86_ASSEMBLY)
867		switch (type) {
868		case flag_add:
869		case flag_sub:
#	Line 2341 | Line 2494 | static void generate_one_opcode (int rp)
2494		}
2495		fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2496		fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2497	+	/*      fprintf (headerfile, "extern unsigned long REGPARAM2 op_%lx_%d(uae_u32);\n", opcode, postfix); */
2498		printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2499
2500		switch (table68k[opcode].stype) {
#	Line 2507 | Line 2661 | static void generate_func (void)
2661
2662		fprintf (stblfile, "{ 0, 0, 0 }};\n");
2663		}
2510	–
2664		}
2665
2666		int main (int argc, char **argv)

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