24 |
|
#include "sysdeps.h" |
25 |
|
#include "readcpu.h" |
26 |
|
|
27 |
+ |
#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY) |
28 |
+ |
#define SPARC_ASSEMBLY 0 |
29 |
+ |
#endif |
30 |
+ |
|
31 |
|
#define BOOL_TYPE "int" |
32 |
|
|
33 |
|
static FILE *headerfile; |
59 |
|
if (file) { |
60 |
|
fscanf (file, "Total: %lu\n", &total); |
61 |
|
while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { |
62 |
< |
opcode_next_clev[nr] = 3; |
62 |
> |
opcode_next_clev[nr] = 4; |
63 |
|
opcode_last_postfix[nr] = -1; |
64 |
|
opcode_map[nr++] = opcode; |
65 |
|
counts[opcode] = count; |
72 |
|
if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG |
73 |
|
&& counts[opcode] == 0) |
74 |
|
{ |
75 |
< |
opcode_next_clev[nr] = 3; |
75 |
> |
opcode_next_clev[nr] = 4; |
76 |
|
opcode_last_postfix[nr] = -1; |
77 |
|
opcode_map[nr++] = opcode; |
78 |
|
counts[opcode] = count; |
714 |
|
|
715 |
|
static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst) |
716 |
|
{ |
717 |
< |
#ifdef X86_ASSEMBLY |
717 |
> |
#ifdef SPARC_V8_ASSEMBLY |
718 |
> |
switch(type) |
719 |
> |
{ |
720 |
> |
case flag_add: |
721 |
> |
start_brace(); |
722 |
> |
printf("\tuae_u32 %s;\n", value); |
723 |
> |
switch(size) |
724 |
> |
{ |
725 |
> |
case sz_byte: |
726 |
> |
printf("\t%s = sparc_v8_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
727 |
> |
break; |
728 |
> |
case sz_word: |
729 |
> |
printf("\t%s = sparc_v8_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
730 |
> |
break; |
731 |
> |
case sz_long: |
732 |
> |
printf("\t%s = sparc_v8_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
733 |
> |
break; |
734 |
> |
} |
735 |
> |
return; |
736 |
> |
|
737 |
> |
case flag_sub: |
738 |
> |
start_brace(); |
739 |
> |
printf("\tuae_u32 %s;\n", value); |
740 |
> |
switch(size) |
741 |
> |
{ |
742 |
> |
case sz_byte: |
743 |
> |
printf("\t%s = sparc_v8_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
744 |
> |
break; |
745 |
> |
case sz_word: |
746 |
> |
printf("\t%s = sparc_v8_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
747 |
> |
break; |
748 |
> |
case sz_long: |
749 |
> |
printf("\t%s = sparc_v8_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
750 |
> |
break; |
751 |
> |
} |
752 |
> |
return; |
753 |
> |
|
754 |
> |
case flag_cmp: |
755 |
> |
switch(size) |
756 |
> |
{ |
757 |
> |
case sz_byte: |
758 |
> |
// printf("\tsparc_v8_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
759 |
> |
break; |
760 |
> |
case sz_word: |
761 |
> |
// printf("\tsparc_v8_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
762 |
> |
break; |
763 |
> |
case sz_long: |
764 |
> |
#if 1 |
765 |
> |
printf("\tsparc_v8_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
766 |
> |
return; |
767 |
> |
#endif |
768 |
> |
break; |
769 |
> |
} |
770 |
> |
// return; |
771 |
> |
break; |
772 |
> |
} |
773 |
> |
#elif defined(SPARC_V9_ASSEMBLY) |
774 |
> |
switch(type) |
775 |
> |
{ |
776 |
> |
case flag_add: |
777 |
> |
start_brace(); |
778 |
> |
printf("\tuae_u32 %s;\n", value); |
779 |
> |
switch(size) |
780 |
> |
{ |
781 |
> |
case sz_byte: |
782 |
> |
printf("\t%s = sparc_v9_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
783 |
> |
break; |
784 |
> |
case sz_word: |
785 |
> |
printf("\t%s = sparc_v9_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
786 |
> |
break; |
787 |
> |
case sz_long: |
788 |
> |
printf("\t%s = sparc_v9_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
789 |
> |
break; |
790 |
> |
} |
791 |
> |
return; |
792 |
> |
|
793 |
> |
case flag_sub: |
794 |
> |
start_brace(); |
795 |
> |
printf("\tuae_u32 %s;\n", value); |
796 |
> |
switch(size) |
797 |
> |
{ |
798 |
> |
case sz_byte: |
799 |
> |
printf("\t%s = sparc_v9_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
800 |
> |
break; |
801 |
> |
case sz_word: |
802 |
> |
printf("\t%s = sparc_v9_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
803 |
> |
break; |
804 |
> |
case sz_long: |
805 |
> |
printf("\t%s = sparc_v9_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
806 |
> |
break; |
807 |
> |
} |
808 |
> |
return; |
809 |
> |
|
810 |
> |
case flag_cmp: |
811 |
> |
switch(size) |
812 |
> |
{ |
813 |
> |
case sz_byte: |
814 |
> |
printf("\tsparc_v9_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
815 |
> |
break; |
816 |
> |
case sz_word: |
817 |
> |
printf("\tsparc_v9_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
818 |
> |
break; |
819 |
> |
case sz_long: |
820 |
> |
printf("\tsparc_v9_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
821 |
> |
break; |
822 |
> |
} |
823 |
> |
return; |
824 |
> |
|
825 |
> |
case flag_logical: |
826 |
> |
if (strcmp(value, "0") == 0) { |
827 |
> |
printf("\tregflags.nzvc = 0x04;\n"); |
828 |
> |
} else { |
829 |
> |
switch(size) { |
830 |
> |
case sz_byte: |
831 |
> |
printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); |
832 |
> |
break; |
833 |
> |
case sz_word: |
834 |
> |
printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); |
835 |
> |
break; |
836 |
> |
case sz_long: |
837 |
> |
printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); |
838 |
> |
break; |
839 |
> |
} |
840 |
> |
} |
841 |
> |
return; |
842 |
> |
|
843 |
> |
#if 0 |
844 |
> |
case flag_logical_noclobber: |
845 |
> |
printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n"); |
846 |
> |
if (strcmp(value, "0") == 0) { |
847 |
> |
printf("\tregflags.nzvc = old_flags | 0x04;\n"); |
848 |
> |
} else { |
849 |
> |
switch(size) { |
850 |
> |
case sz_byte: |
851 |
> |
printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); |
852 |
> |
break; |
853 |
> |
case sz_word: |
854 |
> |
printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); |
855 |
> |
break; |
856 |
> |
case sz_long: |
857 |
> |
printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); |
858 |
> |
break; |
859 |
> |
} |
860 |
> |
printf("\tregflags.nzvc |= old_flags;\n"); |
861 |
> |
} |
862 |
> |
printf("\t}\n"); |
863 |
> |
return; |
864 |
> |
#endif |
865 |
> |
} |
866 |
> |
#elif defined(X86_ASSEMBLY) |
867 |
|
switch (type) { |
868 |
|
case flag_add: |
869 |
|
case flag_sub: |
1517 |
|
printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n"); |
1518 |
|
printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n"); |
1519 |
|
printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1520 |
+ |
printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1521 |
+ |
printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n"); |
1522 |
|
printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n"); |
1523 |
|
printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n"); |
1524 |
|
printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n"); |
2444 |
|
swap_opcode (); |
2445 |
|
printf ("\tfrestore_opp(opcode);\n"); |
2446 |
|
break; |
2447 |
+ |
case i_CINVL: |
2448 |
+ |
case i_CINVP: |
2449 |
+ |
case i_CINVA: |
2450 |
+ |
case i_CPUSHL: |
2451 |
+ |
case i_CPUSHP: |
2452 |
+ |
case i_CPUSHA: |
2453 |
+ |
break; |
2454 |
+ |
case i_MOVE16: |
2455 |
+ |
printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); |
2456 |
+ |
printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); |
2457 |
+ |
printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); |
2458 |
+ |
printf ("\tput_long(memd, get_long(mems));\n"); |
2459 |
+ |
printf ("\tput_long(memd+4, get_long(mems+4));\n"); |
2460 |
+ |
printf ("\tput_long(memd+8, get_long(mems+8));\n"); |
2461 |
+ |
printf ("\tput_long(memd+12, get_long(mems+12));\n"); |
2462 |
+ |
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2463 |
+ |
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2464 |
+ |
break; |
2465 |
|
case i_MMUOP: |
2466 |
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2467 |
|
sync_m68k_pc (); |
2514 |
|
} |
2515 |
|
fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); |
2516 |
|
fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix); |
2517 |
< |
printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); |
2517 |
> |
printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); |
2518 |
|
|
2519 |
|
switch (table68k[opcode].stype) { |
2520 |
|
case 0: smsk = 7; break; |
2628 |
|
gen_opcode (opcode); |
2629 |
|
if (need_endlabel) |
2630 |
|
printf ("%s: ;\n", endlabelstr); |
2458 |
– |
printf ("return %d;\n", insn_n_cycles); |
2631 |
|
printf ("}\n"); |
2632 |
|
opcode_next_clev[rp] = next_cpu_level; |
2633 |
|
opcode_last_postfix[rp] = postfix; |
2639 |
|
|
2640 |
|
using_prefetch = 0; |
2641 |
|
using_exception_3 = 0; |
2642 |
< |
for (i = 0; i < 5; i++) { |
2643 |
< |
cpu_level = 3 - i; |
2644 |
< |
if (i == 4) { |
2642 |
> |
for (i = 0; i < 6; i++) { |
2643 |
> |
cpu_level = 4 - i; |
2644 |
> |
if (i == 5) { |
2645 |
|
cpu_level = 0; |
2646 |
|
using_prefetch = 1; |
2647 |
|
using_exception_3 = 1; |
2679 |
|
|
2680 |
|
fprintf (stblfile, "{ 0, 0, 0 }};\n"); |
2681 |
|
} |
2510 |
– |
|
2682 |
|
} |
2683 |
|
|
2684 |
|
int main (int argc, char **argv) |