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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.11 by gbeauche, 2000-09-22T17:19:12Z vs.
Revision 1.13 by gbeauche, 2001-03-20T17:35:46Z

#	Line 221 | Line 221 | static void sync_m68k_pc (void)
221		}
222
223		/* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224	<	* the calling routine handles Apdi and Aipi modes. */
224	>	* the calling routine handles Apdi and Aipi modes.
225	>	* gb-- movem == 2 means the same thing but for a MOVE16 instruction */
226		static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
227		{
228		start_brace ();
#	Line 1535 | Line 1536 | static void gen_opcode (unsigned long in
1536		m68k_pc_offset = 0;
1537		break;
1538		case i_RTD:
1538	–	printf ("\tcompiler_flush_jsr_stack();\n");
1539		genamode (Aipi, "7", sz_long, "pc", 1, 0);
1540		genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1541		printf ("\tm68k_areg(regs, 7) += offs;\n");
#	Line 1569 | Line 1569 | static void gen_opcode (unsigned long in
1569		need_endlabel = 1;
1570		break;
1571		case i_RTR:
1572	–	printf ("\tcompiler_flush_jsr_stack();\n");
1572		printf ("\tMakeSR();\n");
1573		genamode (Aipi, "7", sz_word, "sr", 1, 0);
1574		genamode (Aipi, "7", sz_long, "pc", 1, 0);
#	Line 2452 | Line 2451 | static void gen_opcode (unsigned long in
2451		case i_CPUSHA:
2452		break;
2453		case i_MOVE16:
2454	<	printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2455	<	printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2456	<	printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2457	<	printf ("\tput_long(memd, get_long(mems));\n");
2458	<	printf ("\tput_long(memd+4, get_long(mems+4));\n");
2459	<	printf ("\tput_long(memd+8, get_long(mems+8));\n");
2460	<	printf ("\tput_long(memd+12, get_long(mems+12));\n");
2461	<	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2462	<	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2454	>	if ((opcode & 0xfff8) == 0xf620) {
2455	>	/* MOVE16 (Ax)+,(Ay)+ */
2456	>	printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2457	>	printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2458	>	printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2459	>	printf ("\tput_long(memd, get_long(mems));\n");
2460	>	printf ("\tput_long(memd+4, get_long(mems+4));\n");
2461	>	printf ("\tput_long(memd+8, get_long(mems+8));\n");
2462	>	printf ("\tput_long(memd+12, get_long(mems+12));\n");
2463	>	printf ("\tif (srcreg != dstreg)\n");
2464	>	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2465	>	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2466	>	}
2467	>	else {
2468	>	/* Other variants */
2469	>	genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2470	>	genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2471	>	printf ("\tmemsa &= ~15;\n");
2472	>	printf ("\tmemda &= ~15;\n");
2473	>	printf ("\tput_long(memda, get_long(memsa));\n");
2474	>	printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2475	>	printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2476	>	printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2477	>	if ((opcode & 0xfff8) == 0xf600)
2478	>	printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2479	>	else if ((opcode & 0xfff8) == 0xf608)
2480	>	printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2481	>	}
2482		break;
2483		case i_MMUOP:
2484		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
#	Line 2483 | Line 2501 | static void generate_includes (FILE * f)
2501		fprintf (f, "#include \"memory.h\"\n");
2502		fprintf (f, "#include \"readcpu.h\"\n");
2503		fprintf (f, "#include \"newcpu.h\"\n");
2486	–	fprintf (f, "#include \"compiler.h\"\n");
2504		fprintf (f, "#include \"cputbl.h\"\n");
2505		}
2506
#	Line 2523 | Line 2540 | static void generate_one_opcode (int rp)
2540		case 3: smsk = 7; break;
2541		case 4: smsk = 7; break;
2542		case 5: smsk = 63; break;
2543	+	case 7: smsk = 3; break;
2544		default: abort ();
2545		}
2546		dmsk = 7;

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