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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.4
Committed: 1999-10-21T15:27:08Z (24 years, 8 months ago) by cebix
Content type: text/plain
Branch: MAIN
Changes since 1.3: +0 -1 lines
Log Message:
- integrated SPARC assembly optimizations

File Contents

# Content
1 /*
2 * UAE - The Un*x Amiga Emulator
3 *
4 * MC68000 emulation generator
5 *
6 * This is a fairly stupid program that generates a lot of case labels that
7 * can be #included in a switch statement.
8 * As an alternative, it can generate functions that handle specific
9 * MC68000 instructions, plus a prototype header file and a function pointer
10 * array to look up the function for an opcode.
11 * Error checking is bad, an illegal table68k file will cause the program to
12 * call abort().
13 * The generated code is sometimes sub-optimal, an optimizing compiler should
14 * take care of this.
15 *
16 * Copyright 1995, 1996 Bernd Schmidt
17 */
18
19 #include <ctype.h>
20 #include <stdio.h>
21 #include <stdlib.h>
22 #include <string.h>
23
24 #include "sysdeps.h"
25 #include "readcpu.h"
26
27 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28 #define SPARC_ASSEMBLY 0
29 #include "sparcasm.h"
30 #endif
31
32 #define BOOL_TYPE "int"
33
34 static FILE *headerfile;
35 static FILE *stblfile;
36
37 static int using_prefetch;
38 static int using_exception_3;
39 static int cpu_level;
40
41 /* For the current opcode, the next lower level that will have different code.
42 * Initialized to -1 for each opcode. If it remains unchanged, indicates we
43 * are done with that opcode. */
44 static int next_cpu_level;
45
46 static int *opcode_map;
47 static int *opcode_next_clev;
48 static int *opcode_last_postfix;
49 static unsigned long *counts;
50
51 static void read_counts (void)
52 {
53 FILE *file;
54 unsigned long opcode, count, total;
55 char name[20];
56 int nr = 0;
57 memset (counts, 0, 65536 * sizeof *counts);
58
59 file = fopen ("frequent.68k", "r");
60 if (file) {
61 fscanf (file, "Total: %lu\n", &total);
62 while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
63 opcode_next_clev[nr] = 3;
64 opcode_last_postfix[nr] = -1;
65 opcode_map[nr++] = opcode;
66 counts[opcode] = count;
67 }
68 fclose (file);
69 }
70 if (nr == nr_cpuop_funcs)
71 return;
72 for (opcode = 0; opcode < 0x10000; opcode++) {
73 if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
74 && counts[opcode] == 0)
75 {
76 opcode_next_clev[nr] = 3;
77 opcode_last_postfix[nr] = -1;
78 opcode_map[nr++] = opcode;
79 counts[opcode] = count;
80 }
81 }
82 if (nr != nr_cpuop_funcs)
83 abort ();
84 }
85
86 static char endlabelstr[80];
87 static int endlabelno = 0;
88 static int need_endlabel;
89
90 static int n_braces = 0;
91 static int m68k_pc_offset = 0;
92 static int insn_n_cycles;
93
94 static void start_brace (void)
95 {
96 n_braces++;
97 printf ("{");
98 }
99
100 static void close_brace (void)
101 {
102 assert (n_braces > 0);
103 n_braces--;
104 printf ("}");
105 }
106
107 static void finish_braces (void)
108 {
109 while (n_braces > 0)
110 close_brace ();
111 }
112
113 static void pop_braces (int to)
114 {
115 while (n_braces > to)
116 close_brace ();
117 }
118
119 static int bit_size (int size)
120 {
121 switch (size) {
122 case sz_byte: return 8;
123 case sz_word: return 16;
124 case sz_long: return 32;
125 default: abort ();
126 }
127 return 0;
128 }
129
130 static const char *bit_mask (int size)
131 {
132 switch (size) {
133 case sz_byte: return "0xff";
134 case sz_word: return "0xffff";
135 case sz_long: return "0xffffffff";
136 default: abort ();
137 }
138 return 0;
139 }
140
141 static const char *gen_nextilong (void)
142 {
143 static char buffer[80];
144 int r = m68k_pc_offset;
145 m68k_pc_offset += 4;
146
147 insn_n_cycles += 4;
148
149 if (using_prefetch)
150 sprintf (buffer, "get_ilong_prefetch(%d)", r);
151 else
152 sprintf (buffer, "get_ilong(%d)", r);
153 return buffer;
154 }
155
156 static const char *gen_nextiword (void)
157 {
158 static char buffer[80];
159 int r = m68k_pc_offset;
160 m68k_pc_offset += 2;
161
162 insn_n_cycles += 2;
163
164 if (using_prefetch)
165 sprintf (buffer, "get_iword_prefetch(%d)", r);
166 else
167 sprintf (buffer, "get_iword(%d)", r);
168 return buffer;
169 }
170
171 static const char *gen_nextibyte (void)
172 {
173 static char buffer[80];
174 int r = m68k_pc_offset;
175 m68k_pc_offset += 2;
176
177 insn_n_cycles += 2;
178
179 if (using_prefetch)
180 sprintf (buffer, "get_ibyte_prefetch(%d)", r);
181 else
182 sprintf (buffer, "get_ibyte(%d)", r);
183 return buffer;
184 }
185
186 static void fill_prefetch_0 (void)
187 {
188 if (using_prefetch)
189 printf ("fill_prefetch_0 ();\n");
190 }
191
192 static void fill_prefetch_2 (void)
193 {
194 if (using_prefetch)
195 printf ("fill_prefetch_2 ();\n");
196 }
197
198 static void swap_opcode (void)
199 {
200 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
201 printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
202 printf ("#endif\n");
203 }
204
205 static void sync_m68k_pc (void)
206 {
207 if (m68k_pc_offset == 0)
208 return;
209 printf ("m68k_incpc(%d);\n", m68k_pc_offset);
210 switch (m68k_pc_offset) {
211 case 0:
212 /*fprintf (stderr, "refilling prefetch at 0\n"); */
213 break;
214 case 2:
215 fill_prefetch_2 ();
216 break;
217 default:
218 fill_prefetch_0 ();
219 break;
220 }
221 m68k_pc_offset = 0;
222 }
223
224 /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
225 * the calling routine handles Apdi and Aipi modes. */
226 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
227 {
228 start_brace ();
229 switch (mode) {
230 case Dreg:
231 if (movem)
232 abort ();
233 if (getv == 1)
234 switch (size) {
235 case sz_byte:
236 #ifdef AMIGA
237 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
238 /* if it is not done like that: */
239 printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
240 #else
241 printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
242 #endif
243 break;
244 case sz_word:
245 #ifdef AMIGA
246 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
247 #else
248 printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
249 #endif
250 break;
251 case sz_long:
252 printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
253 break;
254 default:
255 abort ();
256 }
257 return;
258 case Areg:
259 if (movem)
260 abort ();
261 if (getv == 1)
262 switch (size) {
263 case sz_word:
264 printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
265 break;
266 case sz_long:
267 printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
268 break;
269 default:
270 abort ();
271 }
272 return;
273 case Aind:
274 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
275 break;
276 case Aipi:
277 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
278 break;
279 case Apdi:
280 switch (size) {
281 case sz_byte:
282 if (movem)
283 printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
284 else
285 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
286 break;
287 case sz_word:
288 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
289 break;
290 case sz_long:
291 printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
292 break;
293 default:
294 abort ();
295 }
296 break;
297 case Ad16:
298 printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
299 break;
300 case Ad8r:
301 if (cpu_level > 1) {
302 if (next_cpu_level < 1)
303 next_cpu_level = 1;
304 sync_m68k_pc ();
305 start_brace ();
306 printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
307 } else
308 printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
309
310 break;
311 case PC16:
312 printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
313 printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
314 break;
315 case PC8r:
316 if (cpu_level > 1) {
317 if (next_cpu_level < 1)
318 next_cpu_level = 1;
319 sync_m68k_pc ();
320 start_brace ();
321 printf ("\tuaecptr tmppc = m68k_getpc();\n");
322 printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
323 } else {
324 printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
325 printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
326 }
327
328 break;
329 case absw:
330 printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
331 break;
332 case absl:
333 printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
334 break;
335 case imm:
336 if (getv != 1)
337 abort ();
338 switch (size) {
339 case sz_byte:
340 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
341 break;
342 case sz_word:
343 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
344 break;
345 case sz_long:
346 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
347 break;
348 default:
349 abort ();
350 }
351 return;
352 case imm0:
353 if (getv != 1)
354 abort ();
355 printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
356 return;
357 case imm1:
358 if (getv != 1)
359 abort ();
360 printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
361 return;
362 case imm2:
363 if (getv != 1)
364 abort ();
365 printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
366 return;
367 case immi:
368 if (getv != 1)
369 abort ();
370 printf ("\tuae_u32 %s = %s;\n", name, reg);
371 return;
372 default:
373 abort ();
374 }
375
376 /* We get here for all non-reg non-immediate addressing modes to
377 * actually fetch the value. */
378
379 if (using_exception_3 && getv != 0 && size != sz_byte) {
380 printf ("\tif ((%sa & 1) != 0) {\n", name);
381 printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
382 printf ("\t\tlast_op_for_exception_3 = opcode;\n");
383 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
384 printf ("\t\tException(3, 0);\n");
385 printf ("\t\tgoto %s;\n", endlabelstr);
386 printf ("\t}\n");
387 need_endlabel = 1;
388 start_brace ();
389 }
390
391 if (getv == 1) {
392 switch (size) {
393 case sz_byte: insn_n_cycles += 2; break;
394 case sz_word: insn_n_cycles += 2; break;
395 case sz_long: insn_n_cycles += 4; break;
396 default: abort ();
397 }
398 start_brace ();
399 switch (size) {
400 case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
401 case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
402 case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
403 default: abort ();
404 }
405 }
406
407 /* We now might have to fix up the register for pre-dec or post-inc
408 * addressing modes. */
409 if (!movem)
410 switch (mode) {
411 case Aipi:
412 switch (size) {
413 case sz_byte:
414 printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
415 break;
416 case sz_word:
417 printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
418 break;
419 case sz_long:
420 printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
421 break;
422 default:
423 abort ();
424 }
425 break;
426 case Apdi:
427 printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
428 break;
429 default:
430 break;
431 }
432 }
433
434 static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
435 {
436 switch (mode) {
437 case Dreg:
438 switch (size) {
439 case sz_byte:
440 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
441 break;
442 case sz_word:
443 printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
444 break;
445 case sz_long:
446 printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
447 break;
448 default:
449 abort ();
450 }
451 break;
452 case Areg:
453 switch (size) {
454 case sz_word:
455 fprintf (stderr, "Foo\n");
456 printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
457 break;
458 case sz_long:
459 printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
460 break;
461 default:
462 abort ();
463 }
464 break;
465 case Aind:
466 case Aipi:
467 case Apdi:
468 case Ad16:
469 case Ad8r:
470 case absw:
471 case absl:
472 case PC16:
473 case PC8r:
474 if (using_prefetch)
475 sync_m68k_pc ();
476 switch (size) {
477 case sz_byte:
478 insn_n_cycles += 2;
479 printf ("\tput_byte(%sa,%s);\n", to, from);
480 break;
481 case sz_word:
482 insn_n_cycles += 2;
483 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
484 abort ();
485 printf ("\tput_word(%sa,%s);\n", to, from);
486 break;
487 case sz_long:
488 insn_n_cycles += 4;
489 if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
490 abort ();
491 printf ("\tput_long(%sa,%s);\n", to, from);
492 break;
493 default:
494 abort ();
495 }
496 break;
497 case imm:
498 case imm0:
499 case imm1:
500 case imm2:
501 case immi:
502 abort ();
503 break;
504 default:
505 abort ();
506 }
507 }
508
509 static void genmovemel (uae_u16 opcode)
510 {
511 char getcode[100];
512 int size = table68k[opcode].size == sz_long ? 4 : 2;
513
514 if (table68k[opcode].size == sz_long) {
515 strcpy (getcode, "get_long(srca)");
516 } else {
517 strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
518 }
519
520 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
521 printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
522 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
523 start_brace ();
524 printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
525 getcode, size);
526 printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
527 getcode, size);
528
529 if (table68k[opcode].dmode == Aipi)
530 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
531 }
532
533 static void genmovemle (uae_u16 opcode)
534 {
535 char putcode[100];
536 int size = table68k[opcode].size == sz_long ? 4 : 2;
537 if (table68k[opcode].size == sz_long) {
538 strcpy (putcode, "put_long(srca,");
539 } else {
540 strcpy (putcode, "put_word(srca,");
541 }
542
543 printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
544 genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
545 if (using_prefetch)
546 sync_m68k_pc ();
547
548 start_brace ();
549 if (table68k[opcode].dmode == Apdi) {
550 printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
551 printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
552 size, putcode);
553 printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
554 size, putcode);
555 printf ("\tm68k_areg(regs, dstreg) = srca;\n");
556 } else {
557 printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
558 printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
559 putcode, size);
560 printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
561 putcode, size);
562 }
563 }
564
565 static void duplicate_carry (void)
566 {
567 printf ("\tCOPY_CARRY;\n");
568 }
569
570 typedef enum {
571 flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
572 flag_av, flag_sv
573 } flagtypes;
574
575 static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
576 {
577 char vstr[100], sstr[100], dstr[100];
578 char usstr[100], udstr[100];
579 char unsstr[100], undstr[100];
580
581 switch (size) {
582 case sz_byte:
583 strcpy (vstr, "((uae_s8)(");
584 strcpy (usstr, "((uae_u8)(");
585 break;
586 case sz_word:
587 strcpy (vstr, "((uae_s16)(");
588 strcpy (usstr, "((uae_u16)(");
589 break;
590 case sz_long:
591 strcpy (vstr, "((uae_s32)(");
592 strcpy (usstr, "((uae_u32)(");
593 break;
594 default:
595 abort ();
596 }
597 strcpy (unsstr, usstr);
598
599 strcpy (sstr, vstr);
600 strcpy (dstr, vstr);
601 strcat (vstr, value);
602 strcat (vstr, "))");
603 strcat (dstr, dst);
604 strcat (dstr, "))");
605 strcat (sstr, src);
606 strcat (sstr, "))");
607
608 strcpy (udstr, usstr);
609 strcat (udstr, dst);
610 strcat (udstr, "))");
611 strcat (usstr, src);
612 strcat (usstr, "))");
613
614 strcpy (undstr, unsstr);
615 strcat (unsstr, "-");
616 strcat (undstr, "~");
617 strcat (undstr, dst);
618 strcat (undstr, "))");
619 strcat (unsstr, src);
620 strcat (unsstr, "))");
621
622 switch (type) {
623 case flag_logical_noclobber:
624 case flag_logical:
625 case flag_zn:
626 case flag_av:
627 case flag_sv:
628 case flag_addx:
629 case flag_subx:
630 break;
631
632 case flag_add:
633 start_brace ();
634 printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
635 break;
636 case flag_sub:
637 case flag_cmp:
638 start_brace ();
639 printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
640 break;
641 }
642
643 switch (type) {
644 case flag_logical_noclobber:
645 case flag_logical:
646 case flag_zn:
647 break;
648
649 case flag_add:
650 case flag_sub:
651 case flag_addx:
652 case flag_subx:
653 case flag_cmp:
654 case flag_av:
655 case flag_sv:
656 start_brace ();
657 printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
658 printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
659 printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
660 break;
661 }
662
663 switch (type) {
664 case flag_logical:
665 printf ("\tCLEAR_CZNV;\n");
666 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
667 printf ("\tSET_NFLG (%s < 0);\n", vstr);
668 break;
669 case flag_logical_noclobber:
670 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
671 printf ("\tSET_NFLG (%s < 0);\n", vstr);
672 break;
673 case flag_av:
674 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
675 break;
676 case flag_sv:
677 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
678 break;
679 case flag_zn:
680 printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
681 printf ("\tSET_NFLG (%s < 0);\n", vstr);
682 break;
683 case flag_add:
684 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
685 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
686 printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
687 duplicate_carry ();
688 printf ("\tSET_NFLG (flgn != 0);\n");
689 break;
690 case flag_sub:
691 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
692 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
693 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
694 duplicate_carry ();
695 printf ("\tSET_NFLG (flgn != 0);\n");
696 break;
697 case flag_addx:
698 printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
699 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
700 duplicate_carry ();
701 break;
702 case flag_subx:
703 printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
704 printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
705 duplicate_carry ();
706 break;
707 case flag_cmp:
708 printf ("\tSET_ZFLG (%s == 0);\n", vstr);
709 printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
710 printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
711 printf ("\tSET_NFLG (flgn != 0);\n");
712 break;
713 }
714 }
715
716 static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717 {
718 #ifdef SPARC_V8_ASSEMBLY
719 switch(type)
720 {
721 case flag_add:
722 start_brace();
723 printf("\tuae_u32 %s;\n", value);
724 switch(size)
725 {
726 case sz_byte:
727 printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
728 break;
729 case sz_word:
730 printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
731 break;
732 case sz_long:
733 printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
734 break;
735 }
736 return;
737
738 case flag_sub:
739 start_brace();
740 printf("\tuae_u32 %s;\n", value);
741 switch(size)
742 {
743 case sz_byte:
744 printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
745 break;
746 case sz_word:
747 printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
748 break;
749 case sz_long:
750 printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
751 break;
752 }
753 return;
754
755 case flag_cmp:
756 switch(size)
757 {
758 case sz_byte:
759 // printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
760 break;
761 case sz_word:
762 // printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
763 break;
764 case sz_long:
765 #if 1
766 printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
767 return;
768 #endif
769 break;
770 }
771 // return;
772 break;
773 }
774 #elif defined(SPARC_V9_ASSEMBLY)
775 switch(type)
776 {
777 case flag_add:
778 start_brace();
779 printf("\tuae_u32 %s;\n", value);
780 switch(size)
781 {
782 case sz_byte:
783 printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
784 break;
785 case sz_word:
786 printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
787 break;
788 case sz_long:
789 printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
790 break;
791 }
792 return;
793
794 case flag_sub:
795 start_brace();
796 printf("\tuae_u32 %s;\n", value);
797 switch(size)
798 {
799 case sz_byte:
800 printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
801 break;
802 case sz_word:
803 printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
804 break;
805 case sz_long:
806 printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
807 break;
808 }
809 return;
810
811 case flag_cmp:
812 switch(size)
813 {
814 case sz_byte:
815 printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
816 break;
817 case sz_word:
818 printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
819 break;
820 case sz_long:
821 printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
822 break;
823 }
824 return;
825
826 case flag_logical:
827 if (strcmp(value, "0") == 0) {
828 printf("\tregflags.nzvc = 0x04;\n");
829 } else {
830 switch(size) {
831 case sz_byte:
832 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
833 break;
834 case sz_word:
835 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
836 break;
837 case sz_long:
838 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
839 break;
840 }
841 }
842 return;
843
844 #if 0
845 case flag_logical_noclobber:
846 printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
847 if (strcmp(value, "0") == 0) {
848 printf("\tregflags.nzvc = old_flags | 0x04;\n");
849 } else {
850 switch(size) {
851 case sz_byte:
852 printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
853 break;
854 case sz_word:
855 printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
856 break;
857 case sz_long:
858 printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
859 break;
860 }
861 printf("\tregflags.nzvc |= old_flags;\n");
862 }
863 printf("\t}\n");
864 return;
865 #endif
866 }
867 #elif defined(X86_ASSEMBLY)
868 switch (type) {
869 case flag_add:
870 case flag_sub:
871 start_brace ();
872 printf ("\tuae_u32 %s;\n", value);
873 break;
874
875 default:
876 break;
877 }
878
879 /* At least some of those casts are fairly important! */
880 switch (type) {
881 case flag_logical_noclobber:
882 printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
883 if (strcmp (value, "0") == 0) {
884 printf ("\tregflags.cznv = olcznv | 64;\n");
885 } else {
886 switch (size) {
887 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
888 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
889 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
890 }
891 printf ("\tregflags.cznv |= oldcznv;\n");
892 }
893 printf ("\t}\n");
894 return;
895 case flag_logical:
896 if (strcmp (value, "0") == 0) {
897 printf ("\tregflags.cznv = 64;\n");
898 } else {
899 switch (size) {
900 case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
901 case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
902 case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
903 }
904 }
905 return;
906
907 case flag_add:
908 switch (size) {
909 case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
910 case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
911 case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
912 }
913 return;
914
915 case flag_sub:
916 switch (size) {
917 case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
918 case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
919 case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
920 }
921 return;
922
923 case flag_cmp:
924 switch (size) {
925 case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
926 case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
927 case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
928 }
929 return;
930
931 default:
932 break;
933 }
934 #elif defined(M68K_FLAG_OPT)
935 /* sam: here I'm cloning what X86_ASSEMBLY does */
936 #define EXT(size) (size==sz_byte?"b":(size==sz_word?"w":"l"))
937 #define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
938 switch (type) {
939 case flag_add:
940 case flag_sub:
941 start_brace ();
942 printf ("\tuae_u32 %s;\n", value);
943 break;
944
945 default:
946 break;
947 }
948
949 switch (type) {
950 case flag_logical:
951 if (strcmp (value, "0") == 0) {
952 printf ("\t*(uae_u16 *)&regflags = 4;\n"); /* Z = 1 */
953 } else {
954 printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
955 EXT (size), CAST (size), value);
956 }
957 return;
958
959 case flag_add:
960 printf ("\t{uae_u16 ccr;\n");
961 printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
962 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
963 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
964 return;
965
966 case flag_sub:
967 printf ("\t{uae_u16 ccr;\n");
968 printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
969 EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
970 printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
971 return;
972
973 case flag_cmp:
974 printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
975 EXT (size), CAST (size), src, CAST (size), dst);
976 return;
977
978 default:
979 break;
980 }
981 #elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
982 /*
983 * This is new. Might be quite buggy.
984 */
985 switch (type) {
986 case flag_av:
987 case flag_sv:
988 case flag_zn:
989 case flag_addx:
990 case flag_subx:
991 break;
992
993 case flag_logical:
994 if (strcmp (value, "0") == 0) {
995 /* v=c=n=0 z=1 */
996 printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
997 return;
998 } else {
999 start_brace ();
1000 switch (size) {
1001 case sz_byte:
1002 printf ("\tUBYTE ccr;\n");
1003 printf ("\tULONG shift;\n");
1004 printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1005 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
1006 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1007 return;
1008 case sz_word:
1009 printf ("\tUBYTE ccr;\n");
1010 printf ("\tULONG shift;\n");
1011 printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1012 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
1013 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1014 return;
1015 case sz_long:
1016 printf ("\tUBYTE ccr;\n");
1017 printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1018 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
1019 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1020 return;
1021 }
1022 }
1023 break;
1024 case flag_add:
1025 if (strcmp (dst, "0") == 0) {
1026 printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
1027 } else {
1028 start_brace ();
1029 switch (size) {
1030 case sz_byte:
1031 printf ("\tULONG ccr, shift, %s;\n", value);
1032 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1033 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1034 printf ("\t*(ULONG*)&regflags = ccr;\n");
1035 return;
1036 case sz_word:
1037 printf ("\tULONG ccr, shift, %s;\n", value);
1038 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1039 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1040 printf ("\t*(ULONG*)&regflags = ccr;\n");
1041 return;
1042 case sz_long:
1043 printf ("\tULONG ccr, %s;\n", value);
1044 printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1045 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1046 printf ("\t*(ULONG*)&regflags = ccr;\n");
1047 return;
1048 }
1049 }
1050 break;
1051 case flag_sub:
1052 if (strcmp (dst, "0") == 0) {
1053 printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1054 } else {
1055 start_brace ();
1056 switch (size) {
1057 case sz_byte:
1058 printf ("\tULONG ccr, shift, %s;\n", value);
1059 printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1060 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1061 printf ("\t*(ULONG*)&regflags = ccr;\n");
1062 return;
1063 case sz_word:
1064 printf ("\tULONG ccr, shift, %s;\n", value);
1065 printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1066 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1067 printf ("\t*(ULONG*)&regflags = ccr;\n");
1068 return;
1069 case sz_long:
1070 printf ("\tULONG ccr, %s;\n", value);
1071 printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1072 "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1073 printf ("\t*(ULONG*)&regflags = ccr;\n");
1074 return;
1075 }
1076 }
1077 break;
1078 case flag_cmp:
1079 if (strcmp (dst, "0") == 0) {
1080 printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1081 } else {
1082 start_brace ();
1083 switch (size) {
1084 case sz_byte:
1085 printf ("\tULONG shift, ccr;\n");
1086 printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1087 "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1088 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1089 return;
1090 case sz_word:
1091 printf ("\tULONG shift, ccr;\n");
1092 printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1093 "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1094 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1095 return;
1096 case sz_long:
1097 printf ("\tULONG ccr;\n");
1098 printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1099 "\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1100 printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1101 /*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1102 return;
1103 }
1104 }
1105 break;
1106 }
1107 #endif
1108 genflags_normal (type, size, value, src, dst);
1109 }
1110
1111 static void force_range_for_rox (const char *var, wordsizes size)
1112 {
1113 /* Could do a modulo operation here... which one is faster? */
1114 switch (size) {
1115 case sz_long:
1116 printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
1117 break;
1118 case sz_word:
1119 printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
1120 printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
1121 break;
1122 case sz_byte:
1123 printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
1124 printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
1125 printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
1126 break;
1127 }
1128 }
1129
1130 static const char *cmask (wordsizes size)
1131 {
1132 switch (size) {
1133 case sz_byte: return "0x80";
1134 case sz_word: return "0x8000";
1135 case sz_long: return "0x80000000";
1136 default: abort ();
1137 }
1138 }
1139
1140 static int source_is_imm1_8 (struct instr *i)
1141 {
1142 return i->stype == 3;
1143 }
1144
1145 static void gen_opcode (unsigned long int opcode)
1146 {
1147 struct instr *curi = table68k + opcode;
1148 insn_n_cycles = 2;
1149
1150 start_brace ();
1151 #if 0
1152 printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
1153 #endif
1154 m68k_pc_offset = 2;
1155 switch (curi->plev) {
1156 case 0: /* not privileged */
1157 break;
1158 case 1: /* unprivileged only on 68000 */
1159 if (cpu_level == 0)
1160 break;
1161 if (next_cpu_level < 0)
1162 next_cpu_level = 0;
1163
1164 /* fall through */
1165 case 2: /* priviledged */
1166 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1167 need_endlabel = 1;
1168 start_brace ();
1169 break;
1170 case 3: /* privileged if size == word */
1171 if (curi->size == sz_byte)
1172 break;
1173 printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1174 need_endlabel = 1;
1175 start_brace ();
1176 break;
1177 }
1178 switch (curi->mnemo) {
1179 case i_OR:
1180 case i_AND:
1181 case i_EOR:
1182 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1183 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1184 printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
1185 genflags (flag_logical, curi->size, "src", "", "");
1186 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1187 break;
1188 case i_ORSR:
1189 case i_EORSR:
1190 printf ("\tMakeSR();\n");
1191 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1192 if (curi->size == sz_byte) {
1193 printf ("\tsrc &= 0xFF;\n");
1194 }
1195 printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1196 printf ("\tMakeFromSR();\n");
1197 break;
1198 case i_ANDSR:
1199 printf ("\tMakeSR();\n");
1200 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1201 if (curi->size == sz_byte) {
1202 printf ("\tsrc |= 0xFF00;\n");
1203 }
1204 printf ("\tregs.sr &= src;\n");
1205 printf ("\tMakeFromSR();\n");
1206 break;
1207 case i_SUB:
1208 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1209 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1210 start_brace ();
1211 genflags (flag_sub, curi->size, "newv", "src", "dst");
1212 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1213 break;
1214 case i_SUBA:
1215 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1216 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1217 start_brace ();
1218 printf ("\tuae_u32 newv = dst - src;\n");
1219 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1220 break;
1221 case i_SUBX:
1222 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1223 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1224 start_brace ();
1225 printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
1226 genflags (flag_subx, curi->size, "newv", "src", "dst");
1227 genflags (flag_zn, curi->size, "newv", "", "");
1228 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1229 break;
1230 case i_SBCD:
1231 /* Let's hope this works... */
1232 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1233 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1234 start_brace ();
1235 printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1236 printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1237 printf ("\tuae_u16 newv;\n");
1238 printf ("\tint cflg;\n");
1239 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1240 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1241 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1242 duplicate_carry ();
1243 printf ("\tif (cflg) newv -= 0x60;\n");
1244 genflags (flag_zn, curi->size, "newv", "", "");
1245 genflags (flag_sv, curi->size, "newv", "src", "dst");
1246 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1247 break;
1248 case i_ADD:
1249 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1250 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1251 start_brace ();
1252 genflags (flag_add, curi->size, "newv", "src", "dst");
1253 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1254 break;
1255 case i_ADDA:
1256 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1257 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1258 start_brace ();
1259 printf ("\tuae_u32 newv = dst + src;\n");
1260 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1261 break;
1262 case i_ADDX:
1263 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1264 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1265 start_brace ();
1266 printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1267 genflags (flag_addx, curi->size, "newv", "src", "dst");
1268 genflags (flag_zn, curi->size, "newv", "", "");
1269 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1270 break;
1271 case i_ABCD:
1272 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1273 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1274 start_brace ();
1275 printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1276 printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1277 printf ("\tuae_u16 newv;\n");
1278 printf ("\tint cflg;\n");
1279 printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
1280 printf ("\tnewv = newv_hi + newv_lo;");
1281 printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1282 duplicate_carry ();
1283 printf ("\tif (cflg) newv += 0x60;\n");
1284 genflags (flag_zn, curi->size, "newv", "", "");
1285 genflags (flag_sv, curi->size, "newv", "src", "dst");
1286 genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1287 break;
1288 case i_NEG:
1289 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1290 start_brace ();
1291 genflags (flag_sub, curi->size, "dst", "src", "0");
1292 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1293 break;
1294 case i_NEGX:
1295 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1296 start_brace ();
1297 printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1298 genflags (flag_subx, curi->size, "newv", "src", "0");
1299 genflags (flag_zn, curi->size, "newv", "", "");
1300 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1301 break;
1302 case i_NBCD:
1303 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1304 start_brace ();
1305 printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1306 printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1307 printf ("\tuae_u16 newv;\n");
1308 printf ("\tint cflg;\n");
1309 printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1310 printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1311 printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1312 duplicate_carry();
1313 printf ("\tif (cflg) newv -= 0x60;\n");
1314 genflags (flag_zn, curi->size, "newv", "", "");
1315 genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1316 break;
1317 case i_CLR:
1318 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1319 genflags (flag_logical, curi->size, "0", "", "");
1320 genastore ("0", curi->smode, "srcreg", curi->size, "src");
1321 break;
1322 case i_NOT:
1323 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1324 start_brace ();
1325 printf ("\tuae_u32 dst = ~src;\n");
1326 genflags (flag_logical, curi->size, "dst", "", "");
1327 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1328 break;
1329 case i_TST:
1330 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1331 genflags (flag_logical, curi->size, "src", "", "");
1332 break;
1333 case i_BTST:
1334 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1335 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1336 if (curi->size == sz_byte)
1337 printf ("\tsrc &= 7;\n");
1338 else
1339 printf ("\tsrc &= 31;\n");
1340 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1341 break;
1342 case i_BCHG:
1343 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1344 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1345 if (curi->size == sz_byte)
1346 printf ("\tsrc &= 7;\n");
1347 else
1348 printf ("\tsrc &= 31;\n");
1349 printf ("\tdst ^= (1 << src);\n");
1350 printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1351 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1352 break;
1353 case i_BCLR:
1354 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1355 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1356 if (curi->size == sz_byte)
1357 printf ("\tsrc &= 7;\n");
1358 else
1359 printf ("\tsrc &= 31;\n");
1360 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1361 printf ("\tdst &= ~(1 << src);\n");
1362 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1363 break;
1364 case i_BSET:
1365 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1366 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1367 if (curi->size == sz_byte)
1368 printf ("\tsrc &= 7;\n");
1369 else
1370 printf ("\tsrc &= 31;\n");
1371 printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1372 printf ("\tdst |= (1 << src);\n");
1373 genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1374 break;
1375 case i_CMPM:
1376 case i_CMP:
1377 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1378 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1379 start_brace ();
1380 genflags (flag_cmp, curi->size, "newv", "src", "dst");
1381 break;
1382 case i_CMPA:
1383 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1384 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1385 start_brace ();
1386 genflags (flag_cmp, sz_long, "newv", "src", "dst");
1387 break;
1388 /* The next two are coded a little unconventional, but they are doing
1389 * weird things... */
1390 case i_MVPRM:
1391 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1392
1393 printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1394 if (curi->size == sz_word) {
1395 printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1396 } else {
1397 printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1398 printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1399 }
1400 break;
1401 case i_MVPMR:
1402 printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1403 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1404 if (curi->size == sz_word) {
1405 printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1406 } else {
1407 printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1408 printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1409 }
1410 genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1411 break;
1412 case i_MOVE:
1413 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1414 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1415 genflags (flag_logical, curi->size, "src", "", "");
1416 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1417 break;
1418 case i_MOVEA:
1419 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1420 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1421 if (curi->size == sz_word) {
1422 printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1423 } else {
1424 printf ("\tuae_u32 val = src;\n");
1425 }
1426 genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1427 break;
1428 case i_MVSR2:
1429 genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1430 printf ("\tMakeSR();\n");
1431 if (curi->size == sz_byte)
1432 genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1433 else
1434 genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1435 break;
1436 case i_MV2SR:
1437 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1438 if (curi->size == sz_byte)
1439 printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1440 else {
1441 printf ("\tregs.sr = src;\n");
1442 }
1443 printf ("\tMakeFromSR();\n");
1444 break;
1445 case i_SWAP:
1446 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1447 start_brace ();
1448 printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1449 genflags (flag_logical, sz_long, "dst", "", "");
1450 genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1451 break;
1452 case i_EXG:
1453 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1454 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1455 genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1456 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1457 break;
1458 case i_EXT:
1459 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1460 start_brace ();
1461 switch (curi->size) {
1462 case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1463 case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1464 case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1465 default: abort ();
1466 }
1467 genflags (flag_logical,
1468 curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1469 genastore ("dst", curi->smode, "srcreg",
1470 curi->size == sz_word ? sz_word : sz_long, "src");
1471 break;
1472 case i_MVMEL:
1473 genmovemel (opcode);
1474 break;
1475 case i_MVMLE:
1476 genmovemle (opcode);
1477 break;
1478 case i_TRAP:
1479 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1480 sync_m68k_pc ();
1481 printf ("\tException(src+32,0);\n");
1482 m68k_pc_offset = 0;
1483 break;
1484 case i_MVR2USP:
1485 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1486 printf ("\tregs.usp = src;\n");
1487 break;
1488 case i_MVUSP2R:
1489 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1490 genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1491 break;
1492 case i_RESET:
1493 break;
1494 case i_NOP:
1495 break;
1496 case i_STOP:
1497 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1498 printf ("\tregs.sr = src;\n");
1499 printf ("\tMakeFromSR();\n");
1500 printf ("\tm68k_setstopped(1);\n");
1501 break;
1502 case i_RTE:
1503 if (cpu_level == 0) {
1504 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1505 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1506 printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1507 fill_prefetch_0 ();
1508 printf ("\tMakeFromSR();\n");
1509 } else {
1510 int old_brace_level = n_braces;
1511 if (next_cpu_level < 0)
1512 next_cpu_level = 0;
1513 printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1514 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1515 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1516 genamode (Aipi, "7", sz_word, "format", 1, 0);
1517 printf ("\tnewsr = sr; newpc = pc;\n");
1518 printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1519 printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1520 printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1521 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1522 printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1523 printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1524 printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1525 printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1526 printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1527 pop_braces (old_brace_level);
1528 printf ("\tregs.sr = newsr; MakeFromSR();\n");
1529 printf ("\tm68k_setpc_rte(newpc);\n");
1530 fill_prefetch_0 ();
1531 need_endlabel = 1;
1532 }
1533 /* PC is set and prefetch filled. */
1534 m68k_pc_offset = 0;
1535 break;
1536 case i_RTD:
1537 printf ("\tcompiler_flush_jsr_stack();\n");
1538 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1539 genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1540 printf ("\tm68k_areg(regs, 7) += offs;\n");
1541 printf ("\tm68k_setpc_rte(pc);\n");
1542 fill_prefetch_0 ();
1543 /* PC is set and prefetch filled. */
1544 m68k_pc_offset = 0;
1545 break;
1546 case i_LINK:
1547 genamode (Apdi, "7", sz_long, "old", 2, 0);
1548 genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1549 genastore ("src", Apdi, "7", sz_long, "old");
1550 genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1551 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1552 printf ("\tm68k_areg(regs, 7) += offs;\n");
1553 break;
1554 case i_UNLK:
1555 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1556 printf ("\tm68k_areg(regs, 7) = src;\n");
1557 genamode (Aipi, "7", sz_long, "old", 1, 0);
1558 genastore ("old", curi->smode, "srcreg", curi->size, "src");
1559 break;
1560 case i_RTS:
1561 printf ("\tm68k_do_rts();\n");
1562 fill_prefetch_0 ();
1563 m68k_pc_offset = 0;
1564 break;
1565 case i_TRAPV:
1566 sync_m68k_pc ();
1567 printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1568 need_endlabel = 1;
1569 break;
1570 case i_RTR:
1571 printf ("\tcompiler_flush_jsr_stack();\n");
1572 printf ("\tMakeSR();\n");
1573 genamode (Aipi, "7", sz_word, "sr", 1, 0);
1574 genamode (Aipi, "7", sz_long, "pc", 1, 0);
1575 printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1576 printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1577 fill_prefetch_0 ();
1578 printf ("\tMakeFromSR();\n");
1579 m68k_pc_offset = 0;
1580 break;
1581 case i_JSR:
1582 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1583 printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1584 fill_prefetch_0 ();
1585 m68k_pc_offset = 0;
1586 break;
1587 case i_JMP:
1588 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1589 printf ("\tm68k_setpc(srca);\n");
1590 fill_prefetch_0 ();
1591 m68k_pc_offset = 0;
1592 break;
1593 case i_BSR:
1594 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1595 printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1596 if (using_exception_3) {
1597 printf ("\tif (src & 1) {\n");
1598 printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1599 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1600 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1601 printf ("\t}\n");
1602 need_endlabel = 1;
1603 }
1604 printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1605 fill_prefetch_0 ();
1606 m68k_pc_offset = 0;
1607 break;
1608 case i_Bcc:
1609 if (curi->size == sz_long) {
1610 if (cpu_level < 2) {
1611 printf ("\tm68k_incpc(2);\n");
1612 printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1613 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1614 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1615 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1616 need_endlabel = 1;
1617 } else {
1618 if (next_cpu_level < 1)
1619 next_cpu_level = 1;
1620 }
1621 }
1622 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1623 printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1624 if (using_exception_3) {
1625 printf ("\tif (src & 1) {\n");
1626 printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1627 printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1628 printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1629 printf ("\t}\n");
1630 need_endlabel = 1;
1631 }
1632 #ifdef USE_COMPILER
1633 printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1634 #else
1635 printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1636 #endif
1637 fill_prefetch_0 ();
1638 printf ("\tgoto %s;\n", endlabelstr);
1639 printf ("didnt_jump:;\n");
1640 need_endlabel = 1;
1641 break;
1642 case i_LEA:
1643 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1644 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1645 genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1646 break;
1647 case i_PEA:
1648 genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1649 genamode (Apdi, "7", sz_long, "dst", 2, 0);
1650 genastore ("srca", Apdi, "7", sz_long, "dst");
1651 break;
1652 case i_DBcc:
1653 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1654 genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1655
1656 printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1657 genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1658
1659 printf ("\t\tif (src) {\n");
1660 if (using_exception_3) {
1661 printf ("\t\t\tif (offs & 1) {\n");
1662 printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1663 printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1664 printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1665 printf ("\t\t}\n");
1666 need_endlabel = 1;
1667 }
1668 #ifdef USE_COMPILER
1669 printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1670 #else
1671 printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1672 #endif
1673 fill_prefetch_0 ();
1674 printf ("\t\tgoto %s;\n", endlabelstr);
1675 printf ("\t\t}\n");
1676 printf ("\t}\n");
1677 need_endlabel = 1;
1678 break;
1679 case i_Scc:
1680 genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1681 start_brace ();
1682 printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1683 genastore ("val", curi->smode, "srcreg", curi->size, "src");
1684 break;
1685 case i_DIVU:
1686 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1687 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1688 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1689 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1690 printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1691 printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1692 /* The N flag appears to be set each time there is an overflow.
1693 * Weird. */
1694 printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1695 genflags (flag_logical, sz_word, "newv", "", "");
1696 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1697 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1698 printf ("\t}\n");
1699 printf ("\t}\n");
1700 insn_n_cycles += 68;
1701 need_endlabel = 1;
1702 break;
1703 case i_DIVS:
1704 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1705 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1706 genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1707 printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1708 printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1709 printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1710 printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1711 printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1712 genflags (flag_logical, sz_word, "newv", "", "");
1713 printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1714 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1715 printf ("\t}\n");
1716 printf ("\t}\n");
1717 insn_n_cycles += 72;
1718 need_endlabel = 1;
1719 break;
1720 case i_MULU:
1721 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1722 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1723 start_brace ();
1724 printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1725 genflags (flag_logical, sz_long, "newv", "", "");
1726 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1727 insn_n_cycles += 32;
1728 break;
1729 case i_MULS:
1730 genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1731 genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1732 start_brace ();
1733 printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1734 genflags (flag_logical, sz_long, "newv", "", "");
1735 genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1736 insn_n_cycles += 32;
1737 break;
1738 case i_CHK:
1739 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1740 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1741 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1742 printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1743 printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1744 need_endlabel = 1;
1745 break;
1746
1747 case i_CHK2:
1748 printf ("\tuaecptr oldpc = m68k_getpc();\n");
1749 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1750 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1751 printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1752 switch (curi->size) {
1753 case sz_byte:
1754 printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1755 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1756 break;
1757 case sz_word:
1758 printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1759 printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1760 break;
1761 case sz_long:
1762 printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1763 break;
1764 default:
1765 abort ();
1766 }
1767 printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1768 printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1769 printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1770 need_endlabel = 1;
1771 break;
1772
1773 case i_ASR:
1774 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1775 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1776 start_brace ();
1777 switch (curi->size) {
1778 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1779 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1780 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1781 default: abort ();
1782 }
1783 printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1784 printf ("\tcnt &= 63;\n");
1785 printf ("\tCLEAR_CZNV;\n");
1786 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1787 printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1788 printf ("\t\tSET_CFLG (sign);\n");
1789 duplicate_carry ();
1790 if (source_is_imm1_8 (curi))
1791 printf ("\t} else {\n");
1792 else
1793 printf ("\t} else if (cnt > 0) {\n");
1794 printf ("\t\tval >>= cnt - 1;\n");
1795 printf ("\t\tSET_CFLG (val & 1);\n");
1796 duplicate_carry ();
1797 printf ("\t\tval >>= 1;\n");
1798 printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1799 bit_mask (curi->size),
1800 bit_size (curi->size));
1801 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1802 printf ("\t}\n");
1803 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1804 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1805 break;
1806 case i_ASL:
1807 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1808 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1809 start_brace ();
1810 switch (curi->size) {
1811 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1812 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1813 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1814 default: abort ();
1815 }
1816 printf ("\tcnt &= 63;\n");
1817 printf ("\tCLEAR_CZNV;\n");
1818 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1819 printf ("\t\tSET_VFLG (val != 0);\n");
1820 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1821 bit_size (curi->size));
1822 duplicate_carry ();
1823 printf ("\t\tval = 0;\n");
1824 if (source_is_imm1_8 (curi))
1825 printf ("\t} else {\n");
1826 else
1827 printf ("\t} else if (cnt > 0) {\n");
1828 printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1829 bit_mask (curi->size),
1830 bit_size (curi->size) - 1,
1831 bit_mask (curi->size));
1832 printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1833 printf ("\t\tval <<= cnt - 1;\n");
1834 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1835 duplicate_carry ();
1836 printf ("\t\tval <<= 1;\n");
1837 printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1838 printf ("\t}\n");
1839 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1840 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1841 break;
1842 case i_LSR:
1843 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1844 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1845 start_brace ();
1846 switch (curi->size) {
1847 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1848 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1849 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1850 default: abort ();
1851 }
1852 printf ("\tcnt &= 63;\n");
1853 printf ("\tCLEAR_CZNV;\n");
1854 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1855 printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1856 bit_size (curi->size), bit_size (curi->size) - 1);
1857 duplicate_carry ();
1858 printf ("\t\tval = 0;\n");
1859 if (source_is_imm1_8 (curi))
1860 printf ("\t} else {\n");
1861 else
1862 printf ("\t} else if (cnt > 0) {\n");
1863 printf ("\t\tval >>= cnt - 1;\n");
1864 printf ("\t\tSET_CFLG (val & 1);\n");
1865 duplicate_carry ();
1866 printf ("\t\tval >>= 1;\n");
1867 printf ("\t}\n");
1868 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1869 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1870 break;
1871 case i_LSL:
1872 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1873 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1874 start_brace ();
1875 switch (curi->size) {
1876 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1877 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1878 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1879 default: abort ();
1880 }
1881 printf ("\tcnt &= 63;\n");
1882 printf ("\tCLEAR_CZNV;\n");
1883 printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1884 printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1885 bit_size (curi->size));
1886 duplicate_carry ();
1887 printf ("\t\tval = 0;\n");
1888 if (source_is_imm1_8 (curi))
1889 printf ("\t} else {\n");
1890 else
1891 printf ("\t} else if (cnt > 0) {\n");
1892 printf ("\t\tval <<= (cnt - 1);\n");
1893 printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1894 duplicate_carry ();
1895 printf ("\t\tval <<= 1;\n");
1896 printf ("\tval &= %s;\n", bit_mask (curi->size));
1897 printf ("\t}\n");
1898 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1899 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1900 break;
1901 case i_ROL:
1902 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1903 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1904 start_brace ();
1905 switch (curi->size) {
1906 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1907 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1908 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1909 default: abort ();
1910 }
1911 printf ("\tcnt &= 63;\n");
1912 printf ("\tCLEAR_CZNV;\n");
1913 if (source_is_imm1_8 (curi))
1914 printf ("{");
1915 else
1916 printf ("\tif (cnt > 0) {\n");
1917 printf ("\tuae_u32 loval;\n");
1918 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1919 printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1920 printf ("\tval <<= cnt;\n");
1921 printf ("\tval |= loval;\n");
1922 printf ("\tval &= %s;\n", bit_mask (curi->size));
1923 printf ("\tSET_CFLG (val & 1);\n");
1924 printf ("}\n");
1925 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1926 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1927 break;
1928 case i_ROR:
1929 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1930 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1931 start_brace ();
1932 switch (curi->size) {
1933 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1934 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1935 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1936 default: abort ();
1937 }
1938 printf ("\tcnt &= 63;\n");
1939 printf ("\tCLEAR_CZNV;\n");
1940 if (source_is_imm1_8 (curi))
1941 printf ("{");
1942 else
1943 printf ("\tif (cnt > 0) {");
1944 printf ("\tuae_u32 hival;\n");
1945 printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1946 printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1947 printf ("\tval >>= cnt;\n");
1948 printf ("\tval |= hival;\n");
1949 printf ("\tval &= %s;\n", bit_mask (curi->size));
1950 printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1951 printf ("\t}\n");
1952 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1953 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1954 break;
1955 case i_ROXL:
1956 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1957 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1958 start_brace ();
1959 switch (curi->size) {
1960 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1961 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1962 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1963 default: abort ();
1964 }
1965 printf ("\tcnt &= 63;\n");
1966 printf ("\tCLEAR_CZNV;\n");
1967 if (! source_is_imm1_8 (curi))
1968 force_range_for_rox ("cnt", curi->size);
1969 if (source_is_imm1_8 (curi))
1970 printf ("{");
1971 else
1972 printf ("\tif (cnt > 0) {\n");
1973 printf ("\tcnt--;\n");
1974 printf ("\t{\n\tuae_u32 carry;\n");
1975 printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1976 printf ("\tcarry = loval & 1;\n");
1977 printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1978 printf ("\tSET_XFLG (carry);\n");
1979 printf ("\tval &= %s;\n", bit_mask (curi->size));
1980 printf ("\t} }\n");
1981 printf ("\tSET_CFLG (GET_XFLG);\n");
1982 genflags (flag_logical_noclobber, curi->size, "val", "", "");
1983 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1984 break;
1985 case i_ROXR:
1986 genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1987 genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1988 start_brace ();
1989 switch (curi->size) {
1990 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1991 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1992 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1993 default: abort ();
1994 }
1995 printf ("\tcnt &= 63;\n");
1996 printf ("\tCLEAR_CZNV;\n");
1997 if (! source_is_imm1_8 (curi))
1998 force_range_for_rox ("cnt", curi->size);
1999 if (source_is_imm1_8 (curi))
2000 printf ("{");
2001 else
2002 printf ("\tif (cnt > 0) {\n");
2003 printf ("\tcnt--;\n");
2004 printf ("\t{\n\tuae_u32 carry;\n");
2005 printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
2006 printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
2007 printf ("\tval >>= cnt;\n");
2008 printf ("\tcarry = val & 1;\n");
2009 printf ("\tval >>= 1;\n");
2010 printf ("\tval |= hival;\n");
2011 printf ("\tSET_XFLG (carry);\n");
2012 printf ("\tval &= %s;\n", bit_mask (curi->size));
2013 printf ("\t} }\n");
2014 printf ("\tSET_CFLG (GET_XFLG);\n");
2015 genflags (flag_logical_noclobber, curi->size, "val", "", "");
2016 genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2017 break;
2018 case i_ASRW:
2019 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2020 start_brace ();
2021 switch (curi->size) {
2022 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2023 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2024 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2025 default: abort ();
2026 }
2027 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2028 printf ("\tuae_u32 cflg = val & 1;\n");
2029 printf ("\tval = (val >> 1) | sign;\n");
2030 genflags (flag_logical, curi->size, "val", "", "");
2031 printf ("\tSET_CFLG (cflg);\n");
2032 duplicate_carry ();
2033 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2034 break;
2035 case i_ASLW:
2036 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2037 start_brace ();
2038 switch (curi->size) {
2039 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2040 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2041 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2042 default: abort ();
2043 }
2044 printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2045 printf ("\tuae_u32 sign2;\n");
2046 printf ("\tval <<= 1;\n");
2047 genflags (flag_logical, curi->size, "val", "", "");
2048 printf ("\tsign2 = %s & val;\n", cmask (curi->size));
2049 printf ("\tSET_CFLG (sign != 0);\n");
2050 duplicate_carry ();
2051
2052 printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
2053 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2054 break;
2055 case i_LSRW:
2056 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2057 start_brace ();
2058 switch (curi->size) {
2059 case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2060 case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2061 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2062 default: abort ();
2063 }
2064 printf ("\tuae_u32 carry = val & 1;\n");
2065 printf ("\tval >>= 1;\n");
2066 genflags (flag_logical, curi->size, "val", "", "");
2067 printf ("SET_CFLG (carry);\n");
2068 duplicate_carry ();
2069 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2070 break;
2071 case i_LSLW:
2072 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2073 start_brace ();
2074 switch (curi->size) {
2075 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2076 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2077 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2078 default: abort ();
2079 }
2080 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2081 printf ("\tval <<= 1;\n");
2082 genflags (flag_logical, curi->size, "val", "", "");
2083 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2084 duplicate_carry ();
2085 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2086 break;
2087 case i_ROLW:
2088 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2089 start_brace ();
2090 switch (curi->size) {
2091 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2092 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2093 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2094 default: abort ();
2095 }
2096 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2097 printf ("\tval <<= 1;\n");
2098 printf ("\tif (carry) val |= 1;\n");
2099 genflags (flag_logical, curi->size, "val", "", "");
2100 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2101 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2102 break;
2103 case i_RORW:
2104 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2105 start_brace ();
2106 switch (curi->size) {
2107 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2108 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2109 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2110 default: abort ();
2111 }
2112 printf ("\tuae_u32 carry = val & 1;\n");
2113 printf ("\tval >>= 1;\n");
2114 printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2115 genflags (flag_logical, curi->size, "val", "", "");
2116 printf ("SET_CFLG (carry);\n");
2117 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2118 break;
2119 case i_ROXLW:
2120 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2121 start_brace ();
2122 switch (curi->size) {
2123 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2124 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2125 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2126 default: abort ();
2127 }
2128 printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2129 printf ("\tval <<= 1;\n");
2130 printf ("\tif (GET_XFLG) val |= 1;\n");
2131 genflags (flag_logical, curi->size, "val", "", "");
2132 printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2133 duplicate_carry ();
2134 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2135 break;
2136 case i_ROXRW:
2137 genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2138 start_brace ();
2139 switch (curi->size) {
2140 case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2141 case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2142 case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2143 default: abort ();
2144 }
2145 printf ("\tuae_u32 carry = val & 1;\n");
2146 printf ("\tval >>= 1;\n");
2147 printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2148 genflags (flag_logical, curi->size, "val", "", "");
2149 printf ("SET_CFLG (carry);\n");
2150 duplicate_carry ();
2151 genastore ("val", curi->smode, "srcreg", curi->size, "data");
2152 break;
2153 case i_MOVEC2:
2154 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2155 start_brace ();
2156 printf ("\tint regno = (src >> 12) & 15;\n");
2157 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2158 printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
2159 break;
2160 case i_MOVE2C:
2161 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2162 start_brace ();
2163 printf ("\tint regno = (src >> 12) & 15;\n");
2164 printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2165 printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
2166 break;
2167 case i_CAS:
2168 {
2169 int old_brace_level;
2170 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2171 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2172 start_brace ();
2173 printf ("\tint ru = (src >> 6) & 7;\n");
2174 printf ("\tint rc = src & 7;\n");
2175 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2176 printf ("\tif (GET_ZFLG)");
2177 old_brace_level = n_braces;
2178 start_brace ();
2179 genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2180 pop_braces (old_brace_level);
2181 printf ("else");
2182 start_brace ();
2183 printf ("m68k_dreg(regs, rc) = dst;\n");
2184 pop_braces (old_brace_level);
2185 }
2186 break;
2187 case i_CAS2:
2188 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2189 printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2190 printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2191 if (curi->size == sz_word) {
2192 int old_brace_level = n_braces;
2193 printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2194 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2195 printf ("\tif (GET_ZFLG) {\n");
2196 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2197 printf ("\tif (GET_ZFLG) {\n");
2198 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2199 printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2200 printf ("\t}}\n");
2201 pop_braces (old_brace_level);
2202 printf ("\tif (! GET_ZFLG) {\n");
2203 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2204 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2205 printf ("\t}\n");
2206 } else {
2207 int old_brace_level = n_braces;
2208 printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2209 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2210 printf ("\tif (GET_ZFLG) {\n");
2211 genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2212 printf ("\tif (GET_ZFLG) {\n");
2213 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2214 printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2215 printf ("\t}}\n");
2216 pop_braces (old_brace_level);
2217 printf ("\tif (! GET_ZFLG) {\n");
2218 printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2219 printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2220 printf ("\t}\n");
2221 }
2222 break;
2223 case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2224 {
2225 int old_brace_level;
2226 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2227 printf ("\tif (extra & 0x800)\n");
2228 old_brace_level = n_braces;
2229 start_brace ();
2230 printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2231 genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2232 genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2233 pop_braces (old_brace_level);
2234 printf ("else");
2235 start_brace ();
2236 genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2237 printf ("\tif (extra & 0x8000) {\n");
2238 switch (curi->size) {
2239 case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2240 case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2241 case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2242 default: abort ();
2243 }
2244 printf ("\t} else {\n");
2245 genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2246 printf ("\t}\n");
2247 pop_braces (old_brace_level);
2248 }
2249 break;
2250 case i_BKPT: /* only needed for hardware emulators */
2251 sync_m68k_pc ();
2252 printf ("\top_illg(opcode);\n");
2253 break;
2254 case i_CALLM: /* not present in 68030 */
2255 sync_m68k_pc ();
2256 printf ("\top_illg(opcode);\n");
2257 break;
2258 case i_RTM: /* not present in 68030 */
2259 sync_m68k_pc ();
2260 printf ("\top_illg(opcode);\n");
2261 break;
2262 case i_TRAPcc:
2263 if (curi->smode != am_unknown && curi->smode != am_illg)
2264 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2265 printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2266 need_endlabel = 1;
2267 break;
2268 case i_DIVL:
2269 sync_m68k_pc ();
2270 start_brace ();
2271 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2272 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2273 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2274 sync_m68k_pc ();
2275 printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2276 break;
2277 case i_MULL:
2278 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2279 genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2280 sync_m68k_pc ();
2281 printf ("\tm68k_mull(opcode, dst, extra);\n");
2282 break;
2283 case i_BFTST:
2284 case i_BFEXTU:
2285 case i_BFCHG:
2286 case i_BFEXTS:
2287 case i_BFCLR:
2288 case i_BFFFO:
2289 case i_BFSET:
2290 case i_BFINS:
2291 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2292 genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2293 start_brace ();
2294 printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2295 printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2296 if (curi->dmode == Dreg) {
2297 printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2298 } else {
2299 printf ("\tuae_u32 tmp,bf0,bf1;\n");
2300 printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2301 printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2302 printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2303 }
2304 printf ("\ttmp >>= (32 - width);\n");
2305 printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2306 printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2307 switch (curi->mnemo) {
2308 case i_BFTST:
2309 break;
2310 case i_BFEXTU:
2311 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2312 break;
2313 case i_BFCHG:
2314 printf ("\ttmp = ~tmp;\n");
2315 break;
2316 case i_BFEXTS:
2317 printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2318 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2319 break;
2320 case i_BFCLR:
2321 printf ("\ttmp = 0;\n");
2322 break;
2323 case i_BFFFO:
2324 printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2325 printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2326 printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2327 break;
2328 case i_BFSET:
2329 printf ("\ttmp = 0xffffffff;\n");
2330 break;
2331 case i_BFINS:
2332 printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2333 break;
2334 default:
2335 break;
2336 }
2337 if (curi->mnemo == i_BFCHG
2338 || curi->mnemo == i_BFCLR
2339 || curi->mnemo == i_BFSET
2340 || curi->mnemo == i_BFINS)
2341 {
2342 printf ("\ttmp <<= (32 - width);\n");
2343 if (curi->dmode == Dreg) {
2344 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2345 printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2346 printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2347 printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2348 printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2349 } else {
2350 printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2351 printf ("\t\t(tmp >> (offset & 7)) |\n");
2352 printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2353 printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2354 printf ("\tput_long(dsta,bf0 );\n");
2355 printf ("\tif (((offset & 7) + width) > 32) {\n");
2356 printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2357 printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2358 printf ("\t\tput_byte(dsta+4,bf1);\n");
2359 printf ("\t}\n");
2360 }
2361 }
2362 break;
2363 case i_PACK:
2364 if (curi->smode == Dreg) {
2365 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2366 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2367 } else {
2368 printf ("\tuae_u16 val;\n");
2369 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2370 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2371 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2372 printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2373 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2374 printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2375 }
2376 break;
2377 case i_UNPK:
2378 if (curi->smode == Dreg) {
2379 printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2380 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2381 printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2382 } else {
2383 printf ("\tuae_u16 val;\n");
2384 printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2385 printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2386 printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2387 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2388 printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2389 printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2390 printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2391 }
2392 break;
2393 case i_TAS:
2394 genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2395 genflags (flag_logical, curi->size, "src", "", "");
2396 printf ("\tsrc |= 0x80;\n");
2397 genastore ("src", curi->smode, "srcreg", curi->size, "src");
2398 break;
2399 case i_FPP:
2400 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2401 sync_m68k_pc ();
2402 swap_opcode ();
2403 printf ("\tfpp_opp(opcode,extra);\n");
2404 break;
2405 case i_FDBcc:
2406 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2407 sync_m68k_pc ();
2408 swap_opcode ();
2409 printf ("\tfdbcc_opp(opcode,extra);\n");
2410 break;
2411 case i_FScc:
2412 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2413 sync_m68k_pc ();
2414 swap_opcode ();
2415 printf ("\tfscc_opp(opcode,extra);\n");
2416 break;
2417 case i_FTRAPcc:
2418 sync_m68k_pc ();
2419 start_brace ();
2420 printf ("\tuaecptr oldpc = m68k_getpc();\n");
2421 if (curi->smode != am_unknown && curi->smode != am_illg)
2422 genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2423 sync_m68k_pc ();
2424 swap_opcode ();
2425 printf ("\tftrapcc_opp(opcode,oldpc);\n");
2426 break;
2427 case i_FBcc:
2428 sync_m68k_pc ();
2429 start_brace ();
2430 printf ("\tuaecptr pc = m68k_getpc();\n");
2431 genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2432 sync_m68k_pc ();
2433 swap_opcode ();
2434 printf ("\tfbcc_opp(opcode,pc,extra);\n");
2435 break;
2436 case i_FSAVE:
2437 sync_m68k_pc ();
2438 swap_opcode ();
2439 printf ("\tfsave_opp(opcode);\n");
2440 break;
2441 case i_FRESTORE:
2442 sync_m68k_pc ();
2443 swap_opcode ();
2444 printf ("\tfrestore_opp(opcode);\n");
2445 break;
2446 case i_MMUOP:
2447 genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2448 sync_m68k_pc ();
2449 swap_opcode ();
2450 printf ("\tmmu_op(opcode,extra);\n");
2451 break;
2452 default:
2453 abort ();
2454 break;
2455 }
2456 finish_braces ();
2457 sync_m68k_pc ();
2458 }
2459
2460 static void generate_includes (FILE * f)
2461 {
2462 fprintf (f, "#include \"sysdeps.h\"\n");
2463 fprintf (f, "#include \"m68k.h\"\n");
2464 fprintf (f, "#include \"memory.h\"\n");
2465 fprintf (f, "#include \"readcpu.h\"\n");
2466 fprintf (f, "#include \"newcpu.h\"\n");
2467 fprintf (f, "#include \"compiler.h\"\n");
2468 fprintf (f, "#include \"cputbl.h\"\n");
2469 }
2470
2471 static int postfix;
2472
2473 static void generate_one_opcode (int rp)
2474 {
2475 int i;
2476 uae_u16 smsk, dmsk;
2477 long int opcode = opcode_map[rp];
2478
2479 if (table68k[opcode].mnemo == i_ILLG
2480 || table68k[opcode].clev > cpu_level)
2481 return;
2482
2483 for (i = 0; lookuptab[i].name[0]; i++) {
2484 if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2485 break;
2486 }
2487
2488 if (table68k[opcode].handler != -1)
2489 return;
2490
2491 if (opcode_next_clev[rp] != cpu_level) {
2492 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2493 opcode, lookuptab[i].name);
2494 return;
2495 }
2496 fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2497 fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2498 printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2499
2500 switch (table68k[opcode].stype) {
2501 case 0: smsk = 7; break;
2502 case 1: smsk = 255; break;
2503 case 2: smsk = 15; break;
2504 case 3: smsk = 7; break;
2505 case 4: smsk = 7; break;
2506 case 5: smsk = 63; break;
2507 default: abort ();
2508 }
2509 dmsk = 7;
2510
2511 next_cpu_level = -1;
2512 if (table68k[opcode].suse
2513 && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2514 && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2515 && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2516 && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2517 {
2518 if (table68k[opcode].spos == -1) {
2519 if (((int) table68k[opcode].sreg) >= 128)
2520 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2521 else
2522 printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2523 } else {
2524 char source[100];
2525 int pos = table68k[opcode].spos;
2526
2527 #if 0
2528 /* Check that we can do the little endian optimization safely. */
2529 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2530 abort ();
2531 #endif
2532 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2533
2534 if (pos < 8 && (smsk >> (8 - pos)) != 0)
2535 sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2536 pos ^ 8, 8 - pos, dmsk);
2537 else if (pos != 8)
2538 sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2539 else
2540 sprintf (source, "(opcode & %d)", smsk);
2541
2542 if (table68k[opcode].stype == 3)
2543 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2544 else if (table68k[opcode].stype == 1)
2545 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2546 else
2547 printf ("\tuae_u32 srcreg = %s;\n", source);
2548
2549 printf ("#else\n");
2550
2551 if (pos)
2552 sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2553 else
2554 sprintf (source, "(opcode & %d)", smsk);
2555
2556 if (table68k[opcode].stype == 3)
2557 printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2558 else if (table68k[opcode].stype == 1)
2559 printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2560 else
2561 printf ("\tuae_u32 srcreg = %s;\n", source);
2562
2563 printf ("#endif\n");
2564 }
2565 }
2566 if (table68k[opcode].duse
2567 /* Yes, the dmode can be imm, in case of LINK or DBcc */
2568 && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2569 && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2570 && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2571 {
2572 if (table68k[opcode].dpos == -1) {
2573 if (((int) table68k[opcode].dreg) >= 128)
2574 printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2575 else
2576 printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2577 } else {
2578 int pos = table68k[opcode].dpos;
2579 #if 0
2580 /* Check that we can do the little endian optimization safely. */
2581 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2582 abort ();
2583 #endif
2584 printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2585
2586 if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2587 printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2588 pos ^ 8, 8 - pos, dmsk);
2589 else if (pos != 8)
2590 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2591 pos ^ 8, dmsk);
2592 else
2593 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2594
2595 printf ("#else\n");
2596
2597 if (pos)
2598 printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2599 pos, dmsk);
2600 else
2601 printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2602
2603 printf ("#endif\n");
2604 }
2605 }
2606 need_endlabel = 0;
2607 endlabelno++;
2608 sprintf (endlabelstr, "endlabel%d", endlabelno);
2609 gen_opcode (opcode);
2610 if (need_endlabel)
2611 printf ("%s: ;\n", endlabelstr);
2612 printf ("return %d;\n", insn_n_cycles);
2613 printf ("}\n");
2614 opcode_next_clev[rp] = next_cpu_level;
2615 opcode_last_postfix[rp] = postfix;
2616 }
2617
2618 static void generate_func (void)
2619 {
2620 int i, j, rp;
2621
2622 using_prefetch = 0;
2623 using_exception_3 = 0;
2624 for (i = 0; i < 5; i++) {
2625 cpu_level = 3 - i;
2626 if (i == 4) {
2627 cpu_level = 0;
2628 using_prefetch = 1;
2629 using_exception_3 = 1;
2630 for (rp = 0; rp < nr_cpuop_funcs; rp++)
2631 opcode_next_clev[rp] = 0;
2632 }
2633 postfix = i;
2634 fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2635
2636 /* sam: this is for people with low memory (eg. me :)) */
2637 printf ("\n"
2638 "#if !defined(PART_1) && !defined(PART_2) && "
2639 "!defined(PART_3) && !defined(PART_4) && "
2640 "!defined(PART_5) && !defined(PART_6) && "
2641 "!defined(PART_7) && !defined(PART_8)"
2642 "\n"
2643 "#define PART_1 1\n"
2644 "#define PART_2 1\n"
2645 "#define PART_3 1\n"
2646 "#define PART_4 1\n"
2647 "#define PART_5 1\n"
2648 "#define PART_6 1\n"
2649 "#define PART_7 1\n"
2650 "#define PART_8 1\n"
2651 "#endif\n\n");
2652
2653 rp = 0;
2654 for(j=1;j<=8;++j) {
2655 int k = (j*nr_cpuop_funcs)/8;
2656 printf ("#ifdef PART_%d\n",j);
2657 for (; rp < k; rp++)
2658 generate_one_opcode (rp);
2659 printf ("#endif\n\n");
2660 }
2661
2662 fprintf (stblfile, "{ 0, 0, 0 }};\n");
2663 }
2664 }
2665
2666 int main (int argc, char **argv)
2667 {
2668 read_table68k ();
2669 do_merges ();
2670
2671 opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2672 opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2673 opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2674 counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2675 read_counts ();
2676
2677 /* It would be a lot nicer to put all in one file (we'd also get rid of
2678 * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2679 * I don't dare to touch the 68k version. */
2680
2681 headerfile = fopen ("cputbl.h", "wb");
2682 stblfile = fopen ("cpustbl.cpp", "wb");
2683 freopen ("cpuemu.cpp", "wb", stdout);
2684
2685 generate_includes (stdout);
2686 generate_includes (stblfile);
2687
2688 generate_func ();
2689
2690 free (table68k);
2691 return 0;
2692 }