1 |
cebix |
1.1 |
/* |
2 |
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* UAE - The Un*x Amiga Emulator |
3 |
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* |
4 |
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* MC68000 emulation generator |
5 |
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* |
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* This is a fairly stupid program that generates a lot of case labels that |
7 |
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* can be #included in a switch statement. |
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* As an alternative, it can generate functions that handle specific |
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* MC68000 instructions, plus a prototype header file and a function pointer |
10 |
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* array to look up the function for an opcode. |
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* Error checking is bad, an illegal table68k file will cause the program to |
12 |
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* call abort(). |
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* The generated code is sometimes sub-optimal, an optimizing compiler should |
14 |
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* take care of this. |
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* |
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* Copyright 1995, 1996 Bernd Schmidt |
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*/ |
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#include <ctype.h> |
20 |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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24 |
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#include "sysdeps.h" |
25 |
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#include "readcpu.h" |
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27 |
cebix |
1.2 |
#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY) |
28 |
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#define SPARC_ASSEMBLY 0 |
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#endif |
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31 |
cebix |
1.1 |
#define BOOL_TYPE "int" |
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33 |
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static FILE *headerfile; |
34 |
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static FILE *stblfile; |
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36 |
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static int using_prefetch; |
37 |
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static int using_exception_3; |
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static int cpu_level; |
39 |
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40 |
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/* For the current opcode, the next lower level that will have different code. |
41 |
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* Initialized to -1 for each opcode. If it remains unchanged, indicates we |
42 |
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* are done with that opcode. */ |
43 |
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static int next_cpu_level; |
44 |
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45 |
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static int *opcode_map; |
46 |
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static int *opcode_next_clev; |
47 |
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static int *opcode_last_postfix; |
48 |
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static unsigned long *counts; |
49 |
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50 |
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static void read_counts (void) |
51 |
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{ |
52 |
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FILE *file; |
53 |
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unsigned long opcode, count, total; |
54 |
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char name[20]; |
55 |
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int nr = 0; |
56 |
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memset (counts, 0, 65536 * sizeof *counts); |
57 |
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58 |
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file = fopen ("frequent.68k", "r"); |
59 |
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if (file) { |
60 |
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fscanf (file, "Total: %lu\n", &total); |
61 |
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while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { |
62 |
cebix |
1.6 |
opcode_next_clev[nr] = 4; |
63 |
cebix |
1.1 |
opcode_last_postfix[nr] = -1; |
64 |
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opcode_map[nr++] = opcode; |
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counts[opcode] = count; |
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} |
67 |
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fclose (file); |
68 |
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} |
69 |
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if (nr == nr_cpuop_funcs) |
70 |
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return; |
71 |
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for (opcode = 0; opcode < 0x10000; opcode++) { |
72 |
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if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG |
73 |
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&& counts[opcode] == 0) |
74 |
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{ |
75 |
cebix |
1.6 |
opcode_next_clev[nr] = 4; |
76 |
cebix |
1.1 |
opcode_last_postfix[nr] = -1; |
77 |
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opcode_map[nr++] = opcode; |
78 |
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counts[opcode] = count; |
79 |
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} |
80 |
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} |
81 |
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if (nr != nr_cpuop_funcs) |
82 |
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abort (); |
83 |
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} |
84 |
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85 |
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static char endlabelstr[80]; |
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static int endlabelno = 0; |
87 |
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static int need_endlabel; |
88 |
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89 |
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static int n_braces = 0; |
90 |
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static int m68k_pc_offset = 0; |
91 |
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static int insn_n_cycles; |
92 |
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93 |
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static void start_brace (void) |
94 |
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{ |
95 |
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n_braces++; |
96 |
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printf ("{"); |
97 |
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} |
98 |
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99 |
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static void close_brace (void) |
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{ |
101 |
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assert (n_braces > 0); |
102 |
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n_braces--; |
103 |
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printf ("}"); |
104 |
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} |
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106 |
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static void finish_braces (void) |
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{ |
108 |
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while (n_braces > 0) |
109 |
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close_brace (); |
110 |
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} |
111 |
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112 |
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static void pop_braces (int to) |
113 |
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{ |
114 |
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while (n_braces > to) |
115 |
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close_brace (); |
116 |
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} |
117 |
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118 |
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static int bit_size (int size) |
119 |
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{ |
120 |
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switch (size) { |
121 |
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case sz_byte: return 8; |
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case sz_word: return 16; |
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case sz_long: return 32; |
124 |
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default: abort (); |
125 |
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} |
126 |
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return 0; |
127 |
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} |
128 |
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129 |
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static const char *bit_mask (int size) |
130 |
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{ |
131 |
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switch (size) { |
132 |
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case sz_byte: return "0xff"; |
133 |
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case sz_word: return "0xffff"; |
134 |
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case sz_long: return "0xffffffff"; |
135 |
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default: abort (); |
136 |
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} |
137 |
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return 0; |
138 |
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} |
139 |
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140 |
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static const char *gen_nextilong (void) |
141 |
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{ |
142 |
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static char buffer[80]; |
143 |
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int r = m68k_pc_offset; |
144 |
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m68k_pc_offset += 4; |
145 |
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146 |
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insn_n_cycles += 4; |
147 |
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148 |
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if (using_prefetch) |
149 |
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sprintf (buffer, "get_ilong_prefetch(%d)", r); |
150 |
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else |
151 |
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sprintf (buffer, "get_ilong(%d)", r); |
152 |
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return buffer; |
153 |
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} |
154 |
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155 |
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static const char *gen_nextiword (void) |
156 |
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{ |
157 |
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static char buffer[80]; |
158 |
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int r = m68k_pc_offset; |
159 |
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m68k_pc_offset += 2; |
160 |
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161 |
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insn_n_cycles += 2; |
162 |
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163 |
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if (using_prefetch) |
164 |
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sprintf (buffer, "get_iword_prefetch(%d)", r); |
165 |
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else |
166 |
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sprintf (buffer, "get_iword(%d)", r); |
167 |
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return buffer; |
168 |
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} |
169 |
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170 |
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static const char *gen_nextibyte (void) |
171 |
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{ |
172 |
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static char buffer[80]; |
173 |
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int r = m68k_pc_offset; |
174 |
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m68k_pc_offset += 2; |
175 |
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176 |
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insn_n_cycles += 2; |
177 |
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178 |
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if (using_prefetch) |
179 |
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sprintf (buffer, "get_ibyte_prefetch(%d)", r); |
180 |
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else |
181 |
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sprintf (buffer, "get_ibyte(%d)", r); |
182 |
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return buffer; |
183 |
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} |
184 |
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185 |
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static void fill_prefetch_0 (void) |
186 |
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{ |
187 |
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if (using_prefetch) |
188 |
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printf ("fill_prefetch_0 ();\n"); |
189 |
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} |
190 |
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191 |
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static void fill_prefetch_2 (void) |
192 |
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{ |
193 |
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if (using_prefetch) |
194 |
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printf ("fill_prefetch_2 ();\n"); |
195 |
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} |
196 |
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197 |
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static void swap_opcode (void) |
198 |
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{ |
199 |
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printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); |
200 |
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printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n"); |
201 |
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printf ("#endif\n"); |
202 |
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} |
203 |
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204 |
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static void sync_m68k_pc (void) |
205 |
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{ |
206 |
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if (m68k_pc_offset == 0) |
207 |
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return; |
208 |
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printf ("m68k_incpc(%d);\n", m68k_pc_offset); |
209 |
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switch (m68k_pc_offset) { |
210 |
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case 0: |
211 |
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/*fprintf (stderr, "refilling prefetch at 0\n"); */ |
212 |
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break; |
213 |
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case 2: |
214 |
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fill_prefetch_2 (); |
215 |
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break; |
216 |
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default: |
217 |
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fill_prefetch_0 (); |
218 |
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break; |
219 |
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} |
220 |
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m68k_pc_offset = 0; |
221 |
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} |
222 |
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223 |
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/* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, |
224 |
gbeauche |
1.12 |
* the calling routine handles Apdi and Aipi modes. |
225 |
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* gb-- movem == 2 means the same thing but for a MOVE16 instruction */ |
226 |
cebix |
1.1 |
static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem) |
227 |
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{ |
228 |
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start_brace (); |
229 |
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switch (mode) { |
230 |
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case Dreg: |
231 |
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if (movem) |
232 |
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abort (); |
233 |
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if (getv == 1) |
234 |
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switch (size) { |
235 |
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case sz_byte: |
236 |
cebix |
1.10 |
#if defined(AMIGA) && !defined(WARPUP) |
237 |
cebix |
1.1 |
/* sam: I don't know why gcc.2.7.2.1 produces a code worse */ |
238 |
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/* if it is not done like that: */ |
239 |
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printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg); |
240 |
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#else |
241 |
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printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg); |
242 |
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#endif |
243 |
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break; |
244 |
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case sz_word: |
245 |
cebix |
1.10 |
#if defined(AMIGA) && !defined(WARPUP) |
246 |
cebix |
1.1 |
printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg); |
247 |
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#else |
248 |
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printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg); |
249 |
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#endif |
250 |
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break; |
251 |
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case sz_long: |
252 |
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printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg); |
253 |
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break; |
254 |
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default: |
255 |
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abort (); |
256 |
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} |
257 |
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return; |
258 |
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case Areg: |
259 |
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if (movem) |
260 |
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abort (); |
261 |
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if (getv == 1) |
262 |
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switch (size) { |
263 |
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case sz_word: |
264 |
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printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg); |
265 |
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break; |
266 |
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case sz_long: |
267 |
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printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg); |
268 |
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break; |
269 |
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default: |
270 |
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abort (); |
271 |
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} |
272 |
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return; |
273 |
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case Aind: |
274 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); |
275 |
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break; |
276 |
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case Aipi: |
277 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); |
278 |
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break; |
279 |
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case Apdi: |
280 |
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switch (size) { |
281 |
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case sz_byte: |
282 |
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if (movem) |
283 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); |
284 |
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else |
285 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg); |
286 |
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break; |
287 |
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case sz_word: |
288 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2); |
289 |
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break; |
290 |
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case sz_long: |
291 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4); |
292 |
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break; |
293 |
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default: |
294 |
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abort (); |
295 |
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} |
296 |
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break; |
297 |
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case Ad16: |
298 |
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printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ()); |
299 |
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break; |
300 |
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case Ad8r: |
301 |
|
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if (cpu_level > 1) { |
302 |
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if (next_cpu_level < 1) |
303 |
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next_cpu_level = 1; |
304 |
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sync_m68k_pc (); |
305 |
|
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start_brace (); |
306 |
|
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printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg); |
307 |
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} else |
308 |
|
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printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ()); |
309 |
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310 |
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break; |
311 |
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case PC16: |
312 |
|
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printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset); |
313 |
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printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ()); |
314 |
|
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break; |
315 |
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case PC8r: |
316 |
|
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if (cpu_level > 1) { |
317 |
|
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if (next_cpu_level < 1) |
318 |
|
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next_cpu_level = 1; |
319 |
|
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sync_m68k_pc (); |
320 |
|
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start_brace (); |
321 |
|
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printf ("\tuaecptr tmppc = m68k_getpc();\n"); |
322 |
|
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printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name); |
323 |
|
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} else { |
324 |
|
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printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset); |
325 |
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printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ()); |
326 |
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} |
327 |
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328 |
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break; |
329 |
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case absw: |
330 |
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printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ()); |
331 |
|
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break; |
332 |
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case absl: |
333 |
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printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ()); |
334 |
|
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break; |
335 |
|
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case imm: |
336 |
|
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if (getv != 1) |
337 |
|
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abort (); |
338 |
|
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switch (size) { |
339 |
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case sz_byte: |
340 |
|
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printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ()); |
341 |
|
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break; |
342 |
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case sz_word: |
343 |
|
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printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ()); |
344 |
|
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break; |
345 |
|
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case sz_long: |
346 |
|
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printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ()); |
347 |
|
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break; |
348 |
|
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default: |
349 |
|
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abort (); |
350 |
|
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} |
351 |
|
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return; |
352 |
|
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case imm0: |
353 |
|
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if (getv != 1) |
354 |
|
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abort (); |
355 |
|
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printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ()); |
356 |
|
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return; |
357 |
|
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case imm1: |
358 |
|
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if (getv != 1) |
359 |
|
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abort (); |
360 |
|
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printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ()); |
361 |
|
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return; |
362 |
|
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case imm2: |
363 |
|
|
if (getv != 1) |
364 |
|
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abort (); |
365 |
|
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printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ()); |
366 |
|
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return; |
367 |
|
|
case immi: |
368 |
|
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if (getv != 1) |
369 |
|
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abort (); |
370 |
|
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printf ("\tuae_u32 %s = %s;\n", name, reg); |
371 |
|
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return; |
372 |
|
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default: |
373 |
|
|
abort (); |
374 |
|
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} |
375 |
|
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|
376 |
|
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/* We get here for all non-reg non-immediate addressing modes to |
377 |
|
|
* actually fetch the value. */ |
378 |
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|
379 |
|
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if (using_exception_3 && getv != 0 && size != sz_byte) { |
380 |
|
|
printf ("\tif ((%sa & 1) != 0) {\n", name); |
381 |
|
|
printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name); |
382 |
|
|
printf ("\t\tlast_op_for_exception_3 = opcode;\n"); |
383 |
|
|
printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset); |
384 |
|
|
printf ("\t\tException(3, 0);\n"); |
385 |
|
|
printf ("\t\tgoto %s;\n", endlabelstr); |
386 |
|
|
printf ("\t}\n"); |
387 |
|
|
need_endlabel = 1; |
388 |
|
|
start_brace (); |
389 |
|
|
} |
390 |
|
|
|
391 |
|
|
if (getv == 1) { |
392 |
|
|
switch (size) { |
393 |
|
|
case sz_byte: insn_n_cycles += 2; break; |
394 |
|
|
case sz_word: insn_n_cycles += 2; break; |
395 |
|
|
case sz_long: insn_n_cycles += 4; break; |
396 |
|
|
default: abort (); |
397 |
|
|
} |
398 |
|
|
start_brace (); |
399 |
|
|
switch (size) { |
400 |
|
|
case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break; |
401 |
|
|
case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break; |
402 |
|
|
case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break; |
403 |
|
|
default: abort (); |
404 |
|
|
} |
405 |
|
|
} |
406 |
|
|
|
407 |
|
|
/* We now might have to fix up the register for pre-dec or post-inc |
408 |
|
|
* addressing modes. */ |
409 |
|
|
if (!movem) |
410 |
|
|
switch (mode) { |
411 |
|
|
case Aipi: |
412 |
|
|
switch (size) { |
413 |
|
|
case sz_byte: |
414 |
|
|
printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg); |
415 |
|
|
break; |
416 |
|
|
case sz_word: |
417 |
|
|
printf ("\tm68k_areg(regs, %s) += 2;\n", reg); |
418 |
|
|
break; |
419 |
|
|
case sz_long: |
420 |
|
|
printf ("\tm68k_areg(regs, %s) += 4;\n", reg); |
421 |
|
|
break; |
422 |
|
|
default: |
423 |
|
|
abort (); |
424 |
|
|
} |
425 |
|
|
break; |
426 |
|
|
case Apdi: |
427 |
|
|
printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name); |
428 |
|
|
break; |
429 |
|
|
default: |
430 |
|
|
break; |
431 |
|
|
} |
432 |
|
|
} |
433 |
|
|
|
434 |
|
|
static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to) |
435 |
|
|
{ |
436 |
|
|
switch (mode) { |
437 |
|
|
case Dreg: |
438 |
|
|
switch (size) { |
439 |
|
|
case sz_byte: |
440 |
|
|
printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from); |
441 |
|
|
break; |
442 |
|
|
case sz_word: |
443 |
|
|
printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from); |
444 |
|
|
break; |
445 |
|
|
case sz_long: |
446 |
|
|
printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from); |
447 |
|
|
break; |
448 |
|
|
default: |
449 |
|
|
abort (); |
450 |
|
|
} |
451 |
|
|
break; |
452 |
|
|
case Areg: |
453 |
|
|
switch (size) { |
454 |
|
|
case sz_word: |
455 |
|
|
fprintf (stderr, "Foo\n"); |
456 |
|
|
printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from); |
457 |
|
|
break; |
458 |
|
|
case sz_long: |
459 |
|
|
printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from); |
460 |
|
|
break; |
461 |
|
|
default: |
462 |
|
|
abort (); |
463 |
|
|
} |
464 |
|
|
break; |
465 |
|
|
case Aind: |
466 |
|
|
case Aipi: |
467 |
|
|
case Apdi: |
468 |
|
|
case Ad16: |
469 |
|
|
case Ad8r: |
470 |
|
|
case absw: |
471 |
|
|
case absl: |
472 |
|
|
case PC16: |
473 |
|
|
case PC8r: |
474 |
|
|
if (using_prefetch) |
475 |
|
|
sync_m68k_pc (); |
476 |
|
|
switch (size) { |
477 |
|
|
case sz_byte: |
478 |
|
|
insn_n_cycles += 2; |
479 |
|
|
printf ("\tput_byte(%sa,%s);\n", to, from); |
480 |
|
|
break; |
481 |
|
|
case sz_word: |
482 |
|
|
insn_n_cycles += 2; |
483 |
|
|
if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) |
484 |
|
|
abort (); |
485 |
|
|
printf ("\tput_word(%sa,%s);\n", to, from); |
486 |
|
|
break; |
487 |
|
|
case sz_long: |
488 |
|
|
insn_n_cycles += 4; |
489 |
|
|
if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) |
490 |
|
|
abort (); |
491 |
|
|
printf ("\tput_long(%sa,%s);\n", to, from); |
492 |
|
|
break; |
493 |
|
|
default: |
494 |
|
|
abort (); |
495 |
|
|
} |
496 |
|
|
break; |
497 |
|
|
case imm: |
498 |
|
|
case imm0: |
499 |
|
|
case imm1: |
500 |
|
|
case imm2: |
501 |
|
|
case immi: |
502 |
|
|
abort (); |
503 |
|
|
break; |
504 |
|
|
default: |
505 |
|
|
abort (); |
506 |
|
|
} |
507 |
|
|
} |
508 |
|
|
|
509 |
|
|
static void genmovemel (uae_u16 opcode) |
510 |
|
|
{ |
511 |
|
|
char getcode[100]; |
512 |
|
|
int size = table68k[opcode].size == sz_long ? 4 : 2; |
513 |
|
|
|
514 |
|
|
if (table68k[opcode].size == sz_long) { |
515 |
|
|
strcpy (getcode, "get_long(srca)"); |
516 |
|
|
} else { |
517 |
|
|
strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)"); |
518 |
|
|
} |
519 |
|
|
|
520 |
|
|
printf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); |
521 |
|
|
printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); |
522 |
|
|
genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); |
523 |
|
|
start_brace (); |
524 |
|
|
printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n", |
525 |
|
|
getcode, size); |
526 |
|
|
printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n", |
527 |
|
|
getcode, size); |
528 |
|
|
|
529 |
|
|
if (table68k[opcode].dmode == Aipi) |
530 |
|
|
printf ("\tm68k_areg(regs, dstreg) = srca;\n"); |
531 |
|
|
} |
532 |
|
|
|
533 |
|
|
static void genmovemle (uae_u16 opcode) |
534 |
|
|
{ |
535 |
|
|
char putcode[100]; |
536 |
|
|
int size = table68k[opcode].size == sz_long ? 4 : 2; |
537 |
|
|
if (table68k[opcode].size == sz_long) { |
538 |
|
|
strcpy (putcode, "put_long(srca,"); |
539 |
|
|
} else { |
540 |
|
|
strcpy (putcode, "put_word(srca,"); |
541 |
|
|
} |
542 |
|
|
|
543 |
|
|
printf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); |
544 |
|
|
genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); |
545 |
|
|
if (using_prefetch) |
546 |
|
|
sync_m68k_pc (); |
547 |
|
|
|
548 |
|
|
start_brace (); |
549 |
|
|
if (table68k[opcode].dmode == Apdi) { |
550 |
|
|
printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); |
551 |
|
|
printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n", |
552 |
|
|
size, putcode); |
553 |
|
|
printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", |
554 |
|
|
size, putcode); |
555 |
|
|
printf ("\tm68k_areg(regs, dstreg) = srca;\n"); |
556 |
|
|
} else { |
557 |
|
|
printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); |
558 |
|
|
printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", |
559 |
|
|
putcode, size); |
560 |
|
|
printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", |
561 |
|
|
putcode, size); |
562 |
|
|
} |
563 |
|
|
} |
564 |
|
|
|
565 |
|
|
static void duplicate_carry (void) |
566 |
|
|
{ |
567 |
|
|
printf ("\tCOPY_CARRY;\n"); |
568 |
|
|
} |
569 |
|
|
|
570 |
|
|
typedef enum { |
571 |
|
|
flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn, |
572 |
|
|
flag_av, flag_sv |
573 |
|
|
} flagtypes; |
574 |
|
|
|
575 |
|
|
static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst) |
576 |
|
|
{ |
577 |
|
|
char vstr[100], sstr[100], dstr[100]; |
578 |
|
|
char usstr[100], udstr[100]; |
579 |
|
|
char unsstr[100], undstr[100]; |
580 |
|
|
|
581 |
|
|
switch (size) { |
582 |
|
|
case sz_byte: |
583 |
|
|
strcpy (vstr, "((uae_s8)("); |
584 |
|
|
strcpy (usstr, "((uae_u8)("); |
585 |
|
|
break; |
586 |
|
|
case sz_word: |
587 |
|
|
strcpy (vstr, "((uae_s16)("); |
588 |
|
|
strcpy (usstr, "((uae_u16)("); |
589 |
|
|
break; |
590 |
|
|
case sz_long: |
591 |
|
|
strcpy (vstr, "((uae_s32)("); |
592 |
|
|
strcpy (usstr, "((uae_u32)("); |
593 |
|
|
break; |
594 |
|
|
default: |
595 |
|
|
abort (); |
596 |
|
|
} |
597 |
|
|
strcpy (unsstr, usstr); |
598 |
|
|
|
599 |
|
|
strcpy (sstr, vstr); |
600 |
|
|
strcpy (dstr, vstr); |
601 |
|
|
strcat (vstr, value); |
602 |
|
|
strcat (vstr, "))"); |
603 |
|
|
strcat (dstr, dst); |
604 |
|
|
strcat (dstr, "))"); |
605 |
|
|
strcat (sstr, src); |
606 |
|
|
strcat (sstr, "))"); |
607 |
|
|
|
608 |
|
|
strcpy (udstr, usstr); |
609 |
|
|
strcat (udstr, dst); |
610 |
|
|
strcat (udstr, "))"); |
611 |
|
|
strcat (usstr, src); |
612 |
|
|
strcat (usstr, "))"); |
613 |
|
|
|
614 |
|
|
strcpy (undstr, unsstr); |
615 |
|
|
strcat (unsstr, "-"); |
616 |
|
|
strcat (undstr, "~"); |
617 |
|
|
strcat (undstr, dst); |
618 |
|
|
strcat (undstr, "))"); |
619 |
|
|
strcat (unsstr, src); |
620 |
|
|
strcat (unsstr, "))"); |
621 |
|
|
|
622 |
|
|
switch (type) { |
623 |
|
|
case flag_logical_noclobber: |
624 |
|
|
case flag_logical: |
625 |
|
|
case flag_zn: |
626 |
|
|
case flag_av: |
627 |
|
|
case flag_sv: |
628 |
|
|
case flag_addx: |
629 |
|
|
case flag_subx: |
630 |
|
|
break; |
631 |
|
|
|
632 |
|
|
case flag_add: |
633 |
|
|
start_brace (); |
634 |
|
|
printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr); |
635 |
|
|
break; |
636 |
|
|
case flag_sub: |
637 |
|
|
case flag_cmp: |
638 |
|
|
start_brace (); |
639 |
|
|
printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr); |
640 |
|
|
break; |
641 |
|
|
} |
642 |
|
|
|
643 |
|
|
switch (type) { |
644 |
|
|
case flag_logical_noclobber: |
645 |
|
|
case flag_logical: |
646 |
|
|
case flag_zn: |
647 |
|
|
break; |
648 |
|
|
|
649 |
|
|
case flag_add: |
650 |
|
|
case flag_sub: |
651 |
|
|
case flag_addx: |
652 |
|
|
case flag_subx: |
653 |
|
|
case flag_cmp: |
654 |
|
|
case flag_av: |
655 |
|
|
case flag_sv: |
656 |
|
|
start_brace (); |
657 |
|
|
printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr); |
658 |
|
|
printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr); |
659 |
|
|
printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr); |
660 |
|
|
break; |
661 |
|
|
} |
662 |
|
|
|
663 |
|
|
switch (type) { |
664 |
|
|
case flag_logical: |
665 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
666 |
|
|
printf ("\tSET_ZFLG (%s == 0);\n", vstr); |
667 |
|
|
printf ("\tSET_NFLG (%s < 0);\n", vstr); |
668 |
|
|
break; |
669 |
|
|
case flag_logical_noclobber: |
670 |
|
|
printf ("\tSET_ZFLG (%s == 0);\n", vstr); |
671 |
|
|
printf ("\tSET_NFLG (%s < 0);\n", vstr); |
672 |
|
|
break; |
673 |
|
|
case flag_av: |
674 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); |
675 |
|
|
break; |
676 |
|
|
case flag_sv: |
677 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n"); |
678 |
|
|
break; |
679 |
|
|
case flag_zn: |
680 |
|
|
printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr); |
681 |
|
|
printf ("\tSET_NFLG (%s < 0);\n", vstr); |
682 |
|
|
break; |
683 |
|
|
case flag_add: |
684 |
|
|
printf ("\tSET_ZFLG (%s == 0);\n", vstr); |
685 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); |
686 |
|
|
printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr); |
687 |
|
|
duplicate_carry (); |
688 |
|
|
printf ("\tSET_NFLG (flgn != 0);\n"); |
689 |
|
|
break; |
690 |
|
|
case flag_sub: |
691 |
|
|
printf ("\tSET_ZFLG (%s == 0);\n", vstr); |
692 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n"); |
693 |
|
|
printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr); |
694 |
|
|
duplicate_carry (); |
695 |
|
|
printf ("\tSET_NFLG (flgn != 0);\n"); |
696 |
|
|
break; |
697 |
|
|
case flag_addx: |
698 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */ |
699 |
|
|
printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */ |
700 |
|
|
duplicate_carry (); |
701 |
|
|
break; |
702 |
|
|
case flag_subx: |
703 |
|
|
printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */ |
704 |
|
|
printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */ |
705 |
|
|
duplicate_carry (); |
706 |
|
|
break; |
707 |
|
|
case flag_cmp: |
708 |
|
|
printf ("\tSET_ZFLG (%s == 0);\n", vstr); |
709 |
|
|
printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n"); |
710 |
|
|
printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr); |
711 |
|
|
printf ("\tSET_NFLG (flgn != 0);\n"); |
712 |
|
|
break; |
713 |
|
|
} |
714 |
|
|
} |
715 |
|
|
|
716 |
|
|
static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst) |
717 |
|
|
{ |
718 |
gbeauche |
1.14 |
/* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have |
719 |
|
|
them in the appropriate m68k.h files and use just one copy of this |
720 |
|
|
code here. The API can be changed if necessary. */ |
721 |
|
|
#ifdef OPTIMIZED_FLAGS |
722 |
cebix |
1.1 |
switch (type) { |
723 |
|
|
case flag_add: |
724 |
|
|
case flag_sub: |
725 |
|
|
start_brace (); |
726 |
|
|
printf ("\tuae_u32 %s;\n", value); |
727 |
|
|
break; |
728 |
|
|
default: |
729 |
|
|
break; |
730 |
|
|
} |
731 |
|
|
|
732 |
|
|
/* At least some of those casts are fairly important! */ |
733 |
|
|
switch (type) { |
734 |
|
|
case flag_logical_noclobber: |
735 |
gbeauche |
1.14 |
printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n"); |
736 |
cebix |
1.1 |
if (strcmp (value, "0") == 0) { |
737 |
gbeauche |
1.14 |
printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n"); |
738 |
cebix |
1.1 |
} else { |
739 |
|
|
switch (size) { |
740 |
gbeauche |
1.14 |
case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break; |
741 |
|
|
case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break; |
742 |
|
|
case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break; |
743 |
cebix |
1.1 |
} |
744 |
gbeauche |
1.14 |
printf ("\tIOR_CZNV (oldcznv);\n"); |
745 |
cebix |
1.1 |
} |
746 |
|
|
printf ("\t}\n"); |
747 |
|
|
return; |
748 |
gbeauche |
1.17 |
|
749 |
cebix |
1.1 |
case flag_logical: |
750 |
|
|
if (strcmp (value, "0") == 0) { |
751 |
gbeauche |
1.14 |
printf ("\tSET_CZNV (FLAGVAL_Z);\n"); |
752 |
cebix |
1.1 |
} else { |
753 |
|
|
switch (size) { |
754 |
gbeauche |
1.14 |
case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break; |
755 |
|
|
case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break; |
756 |
|
|
case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break; |
757 |
cebix |
1.1 |
} |
758 |
|
|
} |
759 |
|
|
return; |
760 |
|
|
|
761 |
|
|
case flag_add: |
762 |
|
|
switch (size) { |
763 |
gbeauche |
1.14 |
case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break; |
764 |
|
|
case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break; |
765 |
|
|
case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break; |
766 |
cebix |
1.1 |
} |
767 |
|
|
return; |
768 |
|
|
|
769 |
|
|
case flag_sub: |
770 |
|
|
switch (size) { |
771 |
gbeauche |
1.14 |
case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break; |
772 |
|
|
case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break; |
773 |
|
|
case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break; |
774 |
cebix |
1.1 |
} |
775 |
|
|
return; |
776 |
|
|
|
777 |
|
|
case flag_cmp: |
778 |
|
|
switch (size) { |
779 |
gbeauche |
1.14 |
case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break; |
780 |
|
|
case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break; |
781 |
|
|
case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break; |
782 |
cebix |
1.1 |
} |
783 |
|
|
return; |
784 |
|
|
|
785 |
|
|
default: |
786 |
|
|
break; |
787 |
|
|
} |
788 |
gbeauche |
1.14 |
#endif |
789 |
cebix |
1.1 |
genflags_normal (type, size, value, src, dst); |
790 |
|
|
} |
791 |
|
|
|
792 |
|
|
static void force_range_for_rox (const char *var, wordsizes size) |
793 |
|
|
{ |
794 |
|
|
/* Could do a modulo operation here... which one is faster? */ |
795 |
|
|
switch (size) { |
796 |
|
|
case sz_long: |
797 |
|
|
printf ("\tif (%s >= 33) %s -= 33;\n", var, var); |
798 |
|
|
break; |
799 |
|
|
case sz_word: |
800 |
|
|
printf ("\tif (%s >= 34) %s -= 34;\n", var, var); |
801 |
|
|
printf ("\tif (%s >= 17) %s -= 17;\n", var, var); |
802 |
|
|
break; |
803 |
|
|
case sz_byte: |
804 |
|
|
printf ("\tif (%s >= 36) %s -= 36;\n", var, var); |
805 |
|
|
printf ("\tif (%s >= 18) %s -= 18;\n", var, var); |
806 |
|
|
printf ("\tif (%s >= 9) %s -= 9;\n", var, var); |
807 |
|
|
break; |
808 |
|
|
} |
809 |
|
|
} |
810 |
|
|
|
811 |
|
|
static const char *cmask (wordsizes size) |
812 |
|
|
{ |
813 |
|
|
switch (size) { |
814 |
|
|
case sz_byte: return "0x80"; |
815 |
|
|
case sz_word: return "0x8000"; |
816 |
|
|
case sz_long: return "0x80000000"; |
817 |
|
|
default: abort (); |
818 |
|
|
} |
819 |
|
|
} |
820 |
|
|
|
821 |
|
|
static int source_is_imm1_8 (struct instr *i) |
822 |
|
|
{ |
823 |
|
|
return i->stype == 3; |
824 |
|
|
} |
825 |
|
|
|
826 |
gbeauche |
1.17 |
static const char * cflow_string_of(uae_u32 opcode) |
827 |
|
|
{ |
828 |
|
|
const char * cflow_type_str; |
829 |
|
|
|
830 |
|
|
int cflow_type = table68k[opcode].cflow & ~fl_trap; |
831 |
|
|
switch (cflow_type) { |
832 |
|
|
case fl_branch: cflow_type_str = "CFLOW_BRANCH"; break; |
833 |
|
|
case fl_jump: cflow_type_str = "CFLOW_JUMP"; break; |
834 |
|
|
case fl_return: cflow_type_str = "CFLOW_RETURN"; break; |
835 |
|
|
default: cflow_type_str = "CFLOW_NORMAL"; |
836 |
|
|
} |
837 |
|
|
|
838 |
|
|
/* Patch M68K_EXEC_RETURN instruction */ |
839 |
|
|
if (table68k[opcode].mnemo == i_EMULOP_RETURN) |
840 |
|
|
cflow_type_str = "CFLOW_EXEC_RETURN"; |
841 |
|
|
|
842 |
|
|
return cflow_type_str; |
843 |
|
|
} |
844 |
|
|
|
845 |
cebix |
1.1 |
static void gen_opcode (unsigned long int opcode) |
846 |
|
|
{ |
847 |
|
|
struct instr *curi = table68k + opcode; |
848 |
|
|
insn_n_cycles = 2; |
849 |
|
|
|
850 |
|
|
start_brace (); |
851 |
|
|
#if 0 |
852 |
|
|
printf ("uae_u8 *m68k_pc = regs.pc_p;\n"); |
853 |
|
|
#endif |
854 |
|
|
m68k_pc_offset = 2; |
855 |
|
|
switch (curi->plev) { |
856 |
|
|
case 0: /* not privileged */ |
857 |
|
|
break; |
858 |
|
|
case 1: /* unprivileged only on 68000 */ |
859 |
|
|
if (cpu_level == 0) |
860 |
|
|
break; |
861 |
|
|
if (next_cpu_level < 0) |
862 |
|
|
next_cpu_level = 0; |
863 |
|
|
|
864 |
|
|
/* fall through */ |
865 |
|
|
case 2: /* priviledged */ |
866 |
|
|
printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr); |
867 |
|
|
need_endlabel = 1; |
868 |
|
|
start_brace (); |
869 |
|
|
break; |
870 |
|
|
case 3: /* privileged if size == word */ |
871 |
|
|
if (curi->size == sz_byte) |
872 |
|
|
break; |
873 |
|
|
printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr); |
874 |
|
|
need_endlabel = 1; |
875 |
|
|
start_brace (); |
876 |
|
|
break; |
877 |
|
|
} |
878 |
|
|
switch (curi->mnemo) { |
879 |
|
|
case i_OR: |
880 |
|
|
case i_AND: |
881 |
|
|
case i_EOR: |
882 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
883 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
884 |
|
|
printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^'); |
885 |
|
|
genflags (flag_logical, curi->size, "src", "", ""); |
886 |
|
|
genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); |
887 |
|
|
break; |
888 |
|
|
case i_ORSR: |
889 |
|
|
case i_EORSR: |
890 |
|
|
printf ("\tMakeSR();\n"); |
891 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
892 |
|
|
if (curi->size == sz_byte) { |
893 |
|
|
printf ("\tsrc &= 0xFF;\n"); |
894 |
|
|
} |
895 |
|
|
printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|'); |
896 |
|
|
printf ("\tMakeFromSR();\n"); |
897 |
|
|
break; |
898 |
|
|
case i_ANDSR: |
899 |
|
|
printf ("\tMakeSR();\n"); |
900 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
901 |
|
|
if (curi->size == sz_byte) { |
902 |
|
|
printf ("\tsrc |= 0xFF00;\n"); |
903 |
|
|
} |
904 |
|
|
printf ("\tregs.sr &= src;\n"); |
905 |
|
|
printf ("\tMakeFromSR();\n"); |
906 |
|
|
break; |
907 |
|
|
case i_SUB: |
908 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
909 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
910 |
|
|
start_brace (); |
911 |
|
|
genflags (flag_sub, curi->size, "newv", "src", "dst"); |
912 |
|
|
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
913 |
|
|
break; |
914 |
|
|
case i_SUBA: |
915 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
916 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); |
917 |
|
|
start_brace (); |
918 |
|
|
printf ("\tuae_u32 newv = dst - src;\n"); |
919 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
920 |
|
|
break; |
921 |
|
|
case i_SUBX: |
922 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
923 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
924 |
|
|
start_brace (); |
925 |
|
|
printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n"); |
926 |
|
|
genflags (flag_subx, curi->size, "newv", "src", "dst"); |
927 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
928 |
|
|
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
929 |
|
|
break; |
930 |
|
|
case i_SBCD: |
931 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
932 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
933 |
|
|
start_brace (); |
934 |
|
|
printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n"); |
935 |
|
|
printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n"); |
936 |
gbeauche |
1.15 |
printf ("\tuae_u16 newv, tmp_newv;\n"); |
937 |
|
|
printf ("\tint bcd = 0;\n"); |
938 |
|
|
printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n"); |
939 |
|
|
printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n"); |
940 |
|
|
printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n"); |
941 |
|
|
printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n"); |
942 |
cebix |
1.1 |
duplicate_carry (); |
943 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
944 |
gbeauche |
1.15 |
printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); |
945 |
cebix |
1.1 |
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
946 |
|
|
break; |
947 |
|
|
case i_ADD: |
948 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
949 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
950 |
|
|
start_brace (); |
951 |
|
|
genflags (flag_add, curi->size, "newv", "src", "dst"); |
952 |
|
|
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
953 |
|
|
break; |
954 |
|
|
case i_ADDA: |
955 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
956 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); |
957 |
|
|
start_brace (); |
958 |
|
|
printf ("\tuae_u32 newv = dst + src;\n"); |
959 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
960 |
|
|
break; |
961 |
|
|
case i_ADDX: |
962 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
963 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
964 |
|
|
start_brace (); |
965 |
|
|
printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n"); |
966 |
|
|
genflags (flag_addx, curi->size, "newv", "src", "dst"); |
967 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
968 |
|
|
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
969 |
|
|
break; |
970 |
|
|
case i_ABCD: |
971 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
972 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
973 |
|
|
start_brace (); |
974 |
|
|
printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n"); |
975 |
|
|
printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n"); |
976 |
gbeauche |
1.15 |
printf ("\tuae_u16 newv, tmp_newv;\n"); |
977 |
cebix |
1.1 |
printf ("\tint cflg;\n"); |
978 |
gbeauche |
1.17 |
printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n"); |
979 |
gbeauche |
1.15 |
printf ("\tif (newv_lo > 9) { newv += 6; }\n"); |
980 |
|
|
printf ("\tcflg = (newv & 0x3F0) > 0x90;\n"); |
981 |
|
|
printf ("\tif (cflg) newv += 0x60;\n"); |
982 |
gbeauche |
1.14 |
printf ("\tSET_CFLG (cflg);\n"); |
983 |
cebix |
1.1 |
duplicate_carry (); |
984 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
985 |
gbeauche |
1.15 |
printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n"); |
986 |
cebix |
1.1 |
genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); |
987 |
|
|
break; |
988 |
|
|
case i_NEG: |
989 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
990 |
|
|
start_brace (); |
991 |
|
|
genflags (flag_sub, curi->size, "dst", "src", "0"); |
992 |
|
|
genastore ("dst", curi->smode, "srcreg", curi->size, "src"); |
993 |
|
|
break; |
994 |
|
|
case i_NEGX: |
995 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
996 |
|
|
start_brace (); |
997 |
|
|
printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n"); |
998 |
|
|
genflags (flag_subx, curi->size, "newv", "src", "0"); |
999 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
1000 |
|
|
genastore ("newv", curi->smode, "srcreg", curi->size, "src"); |
1001 |
|
|
break; |
1002 |
|
|
case i_NBCD: |
1003 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1004 |
|
|
start_brace (); |
1005 |
|
|
printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n"); |
1006 |
|
|
printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n"); |
1007 |
|
|
printf ("\tuae_u16 newv;\n"); |
1008 |
|
|
printf ("\tint cflg;\n"); |
1009 |
gbeauche |
1.15 |
printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n"); |
1010 |
gbeauche |
1.17 |
printf ("\tnewv = newv_hi + newv_lo;\n"); |
1011 |
gbeauche |
1.15 |
printf ("\tcflg = (newv & 0x1F0) > 0x90;\n"); |
1012 |
|
|
printf ("\tif (cflg) newv -= 0x60;\n"); |
1013 |
gbeauche |
1.14 |
printf ("\tSET_CFLG (cflg);\n"); |
1014 |
cebix |
1.1 |
duplicate_carry(); |
1015 |
|
|
genflags (flag_zn, curi->size, "newv", "", ""); |
1016 |
|
|
genastore ("newv", curi->smode, "srcreg", curi->size, "src"); |
1017 |
|
|
break; |
1018 |
|
|
case i_CLR: |
1019 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); |
1020 |
|
|
genflags (flag_logical, curi->size, "0", "", ""); |
1021 |
|
|
genastore ("0", curi->smode, "srcreg", curi->size, "src"); |
1022 |
|
|
break; |
1023 |
|
|
case i_NOT: |
1024 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1025 |
|
|
start_brace (); |
1026 |
|
|
printf ("\tuae_u32 dst = ~src;\n"); |
1027 |
|
|
genflags (flag_logical, curi->size, "dst", "", ""); |
1028 |
|
|
genastore ("dst", curi->smode, "srcreg", curi->size, "src"); |
1029 |
|
|
break; |
1030 |
|
|
case i_TST: |
1031 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1032 |
|
|
genflags (flag_logical, curi->size, "src", "", ""); |
1033 |
|
|
break; |
1034 |
|
|
case i_BTST: |
1035 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1036 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1037 |
|
|
if (curi->size == sz_byte) |
1038 |
|
|
printf ("\tsrc &= 7;\n"); |
1039 |
|
|
else |
1040 |
|
|
printf ("\tsrc &= 31;\n"); |
1041 |
|
|
printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); |
1042 |
|
|
break; |
1043 |
|
|
case i_BCHG: |
1044 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1045 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1046 |
|
|
if (curi->size == sz_byte) |
1047 |
|
|
printf ("\tsrc &= 7;\n"); |
1048 |
|
|
else |
1049 |
|
|
printf ("\tsrc &= 31;\n"); |
1050 |
|
|
printf ("\tdst ^= (1 << src);\n"); |
1051 |
gbeauche |
1.14 |
printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n"); |
1052 |
cebix |
1.1 |
genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); |
1053 |
|
|
break; |
1054 |
|
|
case i_BCLR: |
1055 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1056 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1057 |
|
|
if (curi->size == sz_byte) |
1058 |
|
|
printf ("\tsrc &= 7;\n"); |
1059 |
|
|
else |
1060 |
|
|
printf ("\tsrc &= 31;\n"); |
1061 |
|
|
printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); |
1062 |
|
|
printf ("\tdst &= ~(1 << src);\n"); |
1063 |
|
|
genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); |
1064 |
|
|
break; |
1065 |
|
|
case i_BSET: |
1066 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1067 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1068 |
|
|
if (curi->size == sz_byte) |
1069 |
|
|
printf ("\tsrc &= 7;\n"); |
1070 |
|
|
else |
1071 |
|
|
printf ("\tsrc &= 31;\n"); |
1072 |
|
|
printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); |
1073 |
|
|
printf ("\tdst |= (1 << src);\n"); |
1074 |
|
|
genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); |
1075 |
|
|
break; |
1076 |
|
|
case i_CMPM: |
1077 |
|
|
case i_CMP: |
1078 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1079 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1080 |
|
|
start_brace (); |
1081 |
|
|
genflags (flag_cmp, curi->size, "newv", "src", "dst"); |
1082 |
|
|
break; |
1083 |
|
|
case i_CMPA: |
1084 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1085 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); |
1086 |
|
|
start_brace (); |
1087 |
|
|
genflags (flag_cmp, sz_long, "newv", "src", "dst"); |
1088 |
|
|
break; |
1089 |
|
|
/* The next two are coded a little unconventional, but they are doing |
1090 |
|
|
* weird things... */ |
1091 |
|
|
case i_MVPRM: |
1092 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1093 |
|
|
|
1094 |
|
|
printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ()); |
1095 |
|
|
if (curi->size == sz_word) { |
1096 |
|
|
printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n"); |
1097 |
|
|
} else { |
1098 |
|
|
printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n"); |
1099 |
|
|
printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n"); |
1100 |
|
|
} |
1101 |
|
|
break; |
1102 |
|
|
case i_MVPMR: |
1103 |
|
|
printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ()); |
1104 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1105 |
|
|
if (curi->size == sz_word) { |
1106 |
|
|
printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n"); |
1107 |
|
|
} else { |
1108 |
|
|
printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n"); |
1109 |
|
|
printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n"); |
1110 |
|
|
} |
1111 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "dst"); |
1112 |
|
|
break; |
1113 |
|
|
case i_MOVE: |
1114 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1115 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1116 |
|
|
genflags (flag_logical, curi->size, "src", "", ""); |
1117 |
|
|
genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); |
1118 |
|
|
break; |
1119 |
|
|
case i_MOVEA: |
1120 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1121 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1122 |
|
|
if (curi->size == sz_word) { |
1123 |
|
|
printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n"); |
1124 |
|
|
} else { |
1125 |
|
|
printf ("\tuae_u32 val = src;\n"); |
1126 |
|
|
} |
1127 |
|
|
genastore ("val", curi->dmode, "dstreg", sz_long, "dst"); |
1128 |
|
|
break; |
1129 |
|
|
case i_MVSR2: |
1130 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 2, 0); |
1131 |
|
|
printf ("\tMakeSR();\n"); |
1132 |
|
|
if (curi->size == sz_byte) |
1133 |
|
|
genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src"); |
1134 |
|
|
else |
1135 |
|
|
genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src"); |
1136 |
|
|
break; |
1137 |
|
|
case i_MV2SR: |
1138 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); |
1139 |
|
|
if (curi->size == sz_byte) |
1140 |
|
|
printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n"); |
1141 |
|
|
else { |
1142 |
|
|
printf ("\tregs.sr = src;\n"); |
1143 |
|
|
} |
1144 |
|
|
printf ("\tMakeFromSR();\n"); |
1145 |
|
|
break; |
1146 |
|
|
case i_SWAP: |
1147 |
|
|
genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); |
1148 |
|
|
start_brace (); |
1149 |
|
|
printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n"); |
1150 |
|
|
genflags (flag_logical, sz_long, "dst", "", ""); |
1151 |
|
|
genastore ("dst", curi->smode, "srcreg", sz_long, "src"); |
1152 |
|
|
break; |
1153 |
|
|
case i_EXG: |
1154 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1155 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1156 |
|
|
genastore ("dst", curi->smode, "srcreg", curi->size, "src"); |
1157 |
|
|
genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); |
1158 |
|
|
break; |
1159 |
|
|
case i_EXT: |
1160 |
|
|
genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); |
1161 |
|
|
start_brace (); |
1162 |
|
|
switch (curi->size) { |
1163 |
|
|
case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break; |
1164 |
|
|
case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break; |
1165 |
|
|
case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break; |
1166 |
|
|
default: abort (); |
1167 |
|
|
} |
1168 |
|
|
genflags (flag_logical, |
1169 |
|
|
curi->size == sz_word ? sz_word : sz_long, "dst", "", ""); |
1170 |
|
|
genastore ("dst", curi->smode, "srcreg", |
1171 |
|
|
curi->size == sz_word ? sz_word : sz_long, "src"); |
1172 |
|
|
break; |
1173 |
|
|
case i_MVMEL: |
1174 |
|
|
genmovemel (opcode); |
1175 |
|
|
break; |
1176 |
|
|
case i_MVMLE: |
1177 |
|
|
genmovemle (opcode); |
1178 |
|
|
break; |
1179 |
|
|
case i_TRAP: |
1180 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1181 |
|
|
sync_m68k_pc (); |
1182 |
|
|
printf ("\tException(src+32,0);\n"); |
1183 |
|
|
m68k_pc_offset = 0; |
1184 |
|
|
break; |
1185 |
|
|
case i_MVR2USP: |
1186 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1187 |
|
|
printf ("\tregs.usp = src;\n"); |
1188 |
|
|
break; |
1189 |
|
|
case i_MVUSP2R: |
1190 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); |
1191 |
|
|
genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src"); |
1192 |
|
|
break; |
1193 |
|
|
case i_RESET: |
1194 |
|
|
break; |
1195 |
|
|
case i_NOP: |
1196 |
|
|
break; |
1197 |
|
|
case i_STOP: |
1198 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1199 |
|
|
printf ("\tregs.sr = src;\n"); |
1200 |
|
|
printf ("\tMakeFromSR();\n"); |
1201 |
|
|
printf ("\tm68k_setstopped(1);\n"); |
1202 |
|
|
break; |
1203 |
|
|
case i_RTE: |
1204 |
|
|
if (cpu_level == 0) { |
1205 |
|
|
genamode (Aipi, "7", sz_word, "sr", 1, 0); |
1206 |
|
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
1207 |
|
|
printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n"); |
1208 |
|
|
fill_prefetch_0 (); |
1209 |
|
|
printf ("\tMakeFromSR();\n"); |
1210 |
|
|
} else { |
1211 |
|
|
int old_brace_level = n_braces; |
1212 |
|
|
if (next_cpu_level < 0) |
1213 |
|
|
next_cpu_level = 0; |
1214 |
|
|
printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n"); |
1215 |
|
|
genamode (Aipi, "7", sz_word, "sr", 1, 0); |
1216 |
|
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
1217 |
|
|
genamode (Aipi, "7", sz_word, "format", 1, 0); |
1218 |
|
|
printf ("\tnewsr = sr; newpc = pc;\n"); |
1219 |
|
|
printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n"); |
1220 |
|
|
printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n"); |
1221 |
|
|
printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1222 |
gbeauche |
1.17 |
/* gb-- the next two lines are deleted in Bernie's gencpu.c */ |
1223 |
cebix |
1.6 |
printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1224 |
|
|
printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n"); |
1225 |
cebix |
1.1 |
printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n"); |
1226 |
|
|
printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n"); |
1227 |
|
|
printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n"); |
1228 |
|
|
printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n"); |
1229 |
|
|
printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr); |
1230 |
|
|
printf ("\tregs.sr = newsr; MakeFromSR();\n}\n"); |
1231 |
|
|
pop_braces (old_brace_level); |
1232 |
|
|
printf ("\tregs.sr = newsr; MakeFromSR();\n"); |
1233 |
|
|
printf ("\tm68k_setpc_rte(newpc);\n"); |
1234 |
|
|
fill_prefetch_0 (); |
1235 |
|
|
need_endlabel = 1; |
1236 |
|
|
} |
1237 |
|
|
/* PC is set and prefetch filled. */ |
1238 |
|
|
m68k_pc_offset = 0; |
1239 |
|
|
break; |
1240 |
|
|
case i_RTD: |
1241 |
|
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
1242 |
|
|
genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0); |
1243 |
|
|
printf ("\tm68k_areg(regs, 7) += offs;\n"); |
1244 |
|
|
printf ("\tm68k_setpc_rte(pc);\n"); |
1245 |
|
|
fill_prefetch_0 (); |
1246 |
|
|
/* PC is set and prefetch filled. */ |
1247 |
|
|
m68k_pc_offset = 0; |
1248 |
|
|
break; |
1249 |
|
|
case i_LINK: |
1250 |
|
|
genamode (Apdi, "7", sz_long, "old", 2, 0); |
1251 |
|
|
genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); |
1252 |
|
|
genastore ("src", Apdi, "7", sz_long, "old"); |
1253 |
|
|
genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src"); |
1254 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); |
1255 |
|
|
printf ("\tm68k_areg(regs, 7) += offs;\n"); |
1256 |
|
|
break; |
1257 |
|
|
case i_UNLK: |
1258 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1259 |
|
|
printf ("\tm68k_areg(regs, 7) = src;\n"); |
1260 |
|
|
genamode (Aipi, "7", sz_long, "old", 1, 0); |
1261 |
|
|
genastore ("old", curi->smode, "srcreg", curi->size, "src"); |
1262 |
|
|
break; |
1263 |
|
|
case i_RTS: |
1264 |
|
|
printf ("\tm68k_do_rts();\n"); |
1265 |
|
|
fill_prefetch_0 (); |
1266 |
|
|
m68k_pc_offset = 0; |
1267 |
|
|
break; |
1268 |
|
|
case i_TRAPV: |
1269 |
|
|
sync_m68k_pc (); |
1270 |
|
|
printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr); |
1271 |
|
|
need_endlabel = 1; |
1272 |
|
|
break; |
1273 |
|
|
case i_RTR: |
1274 |
|
|
printf ("\tMakeSR();\n"); |
1275 |
|
|
genamode (Aipi, "7", sz_word, "sr", 1, 0); |
1276 |
|
|
genamode (Aipi, "7", sz_long, "pc", 1, 0); |
1277 |
|
|
printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n"); |
1278 |
|
|
printf ("\tregs.sr |= sr; m68k_setpc(pc);\n"); |
1279 |
|
|
fill_prefetch_0 (); |
1280 |
|
|
printf ("\tMakeFromSR();\n"); |
1281 |
|
|
m68k_pc_offset = 0; |
1282 |
|
|
break; |
1283 |
|
|
case i_JSR: |
1284 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); |
1285 |
|
|
printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset); |
1286 |
|
|
fill_prefetch_0 (); |
1287 |
|
|
m68k_pc_offset = 0; |
1288 |
|
|
break; |
1289 |
|
|
case i_JMP: |
1290 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); |
1291 |
|
|
printf ("\tm68k_setpc(srca);\n"); |
1292 |
|
|
fill_prefetch_0 (); |
1293 |
|
|
m68k_pc_offset = 0; |
1294 |
|
|
break; |
1295 |
|
|
case i_BSR: |
1296 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1297 |
|
|
printf ("\tuae_s32 s = (uae_s32)src + 2;\n"); |
1298 |
|
|
if (using_exception_3) { |
1299 |
|
|
printf ("\tif (src & 1) {\n"); |
1300 |
|
|
printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); |
1301 |
|
|
printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n"); |
1302 |
|
|
printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); |
1303 |
|
|
printf ("\t}\n"); |
1304 |
|
|
need_endlabel = 1; |
1305 |
|
|
} |
1306 |
|
|
printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset); |
1307 |
|
|
fill_prefetch_0 (); |
1308 |
|
|
m68k_pc_offset = 0; |
1309 |
|
|
break; |
1310 |
|
|
case i_Bcc: |
1311 |
gbeauche |
1.17 |
if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) { |
1312 |
|
|
/* gb-- variant probably more favorable to compiler optimizations |
1313 |
|
|
also assumes no prefetch buffer is used |
1314 |
|
|
Hmm, that would make sense with processors capable of conditional moves */ |
1315 |
|
|
if (curi->size == sz_long && next_cpu_level < 1) |
1316 |
|
|
next_cpu_level = 1; |
1317 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1318 |
|
|
printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset); |
1319 |
|
|
m68k_pc_offset = 0; |
1320 |
|
|
} |
1321 |
|
|
else { |
1322 |
|
|
/* original code for branch instructions */ |
1323 |
cebix |
1.1 |
if (curi->size == sz_long) { |
1324 |
|
|
if (cpu_level < 2) { |
1325 |
|
|
printf ("\tm68k_incpc(2);\n"); |
1326 |
|
|
printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr); |
1327 |
|
|
printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); |
1328 |
|
|
printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n"); |
1329 |
|
|
printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); |
1330 |
|
|
need_endlabel = 1; |
1331 |
|
|
} else { |
1332 |
|
|
if (next_cpu_level < 1) |
1333 |
|
|
next_cpu_level = 1; |
1334 |
|
|
} |
1335 |
|
|
} |
1336 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1337 |
|
|
printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc); |
1338 |
|
|
if (using_exception_3) { |
1339 |
|
|
printf ("\tif (src & 1) {\n"); |
1340 |
|
|
printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); |
1341 |
|
|
printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n"); |
1342 |
|
|
printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); |
1343 |
|
|
printf ("\t}\n"); |
1344 |
|
|
need_endlabel = 1; |
1345 |
|
|
} |
1346 |
|
|
printf ("\tm68k_incpc ((uae_s32)src + 2);\n"); |
1347 |
|
|
fill_prefetch_0 (); |
1348 |
gbeauche |
1.17 |
printf ("cpuop_return(%s);\n", cflow_string_of(opcode)); |
1349 |
cebix |
1.1 |
printf ("didnt_jump:;\n"); |
1350 |
|
|
need_endlabel = 1; |
1351 |
gbeauche |
1.17 |
} |
1352 |
cebix |
1.1 |
break; |
1353 |
|
|
case i_LEA: |
1354 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); |
1355 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1356 |
|
|
genastore ("srca", curi->dmode, "dstreg", curi->size, "dst"); |
1357 |
|
|
break; |
1358 |
|
|
case i_PEA: |
1359 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); |
1360 |
|
|
genamode (Apdi, "7", sz_long, "dst", 2, 0); |
1361 |
|
|
genastore ("srca", Apdi, "7", sz_long, "dst"); |
1362 |
|
|
break; |
1363 |
|
|
case i_DBcc: |
1364 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1365 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); |
1366 |
|
|
|
1367 |
|
|
printf ("\tif (!cctrue(%d)) {\n", curi->cc); |
1368 |
|
|
genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src"); |
1369 |
|
|
|
1370 |
|
|
printf ("\t\tif (src) {\n"); |
1371 |
|
|
if (using_exception_3) { |
1372 |
|
|
printf ("\t\t\tif (offs & 1) {\n"); |
1373 |
|
|
printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); |
1374 |
|
|
printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n"); |
1375 |
|
|
printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); |
1376 |
|
|
printf ("\t\t}\n"); |
1377 |
|
|
need_endlabel = 1; |
1378 |
|
|
} |
1379 |
|
|
printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n"); |
1380 |
|
|
fill_prefetch_0 (); |
1381 |
gbeauche |
1.17 |
printf ("cpuop_return(%s);\n", cflow_string_of(opcode)); |
1382 |
cebix |
1.1 |
printf ("\t\t}\n"); |
1383 |
|
|
printf ("\t}\n"); |
1384 |
|
|
need_endlabel = 1; |
1385 |
|
|
break; |
1386 |
|
|
case i_Scc: |
1387 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); |
1388 |
|
|
start_brace (); |
1389 |
|
|
printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc); |
1390 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "src"); |
1391 |
|
|
break; |
1392 |
|
|
case i_DIVU: |
1393 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
1394 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); |
1395 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); |
1396 |
gbeauche |
1.14 |
sync_m68k_pc (); |
1397 |
|
|
/* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends |
1398 |
|
|
* on this (actually, it's doing a DIVS). */ |
1399 |
|
|
printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr); |
1400 |
cebix |
1.1 |
printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n"); |
1401 |
|
|
printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n"); |
1402 |
|
|
/* The N flag appears to be set each time there is an overflow. |
1403 |
|
|
* Weird. */ |
1404 |
|
|
printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n"); |
1405 |
|
|
genflags (flag_logical, sz_word, "newv", "", ""); |
1406 |
|
|
printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); |
1407 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
1408 |
|
|
printf ("\t}\n"); |
1409 |
|
|
printf ("\t}\n"); |
1410 |
|
|
insn_n_cycles += 68; |
1411 |
|
|
need_endlabel = 1; |
1412 |
|
|
break; |
1413 |
|
|
case i_DIVS: |
1414 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
1415 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); |
1416 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); |
1417 |
gbeauche |
1.14 |
sync_m68k_pc (); |
1418 |
|
|
printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr); |
1419 |
cebix |
1.1 |
printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n"); |
1420 |
|
|
printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n"); |
1421 |
|
|
printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n"); |
1422 |
|
|
printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n"); |
1423 |
|
|
genflags (flag_logical, sz_word, "newv", "", ""); |
1424 |
|
|
printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); |
1425 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
1426 |
|
|
printf ("\t}\n"); |
1427 |
|
|
printf ("\t}\n"); |
1428 |
|
|
insn_n_cycles += 72; |
1429 |
|
|
need_endlabel = 1; |
1430 |
|
|
break; |
1431 |
|
|
case i_MULU: |
1432 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); |
1433 |
|
|
genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); |
1434 |
|
|
start_brace (); |
1435 |
|
|
printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n"); |
1436 |
|
|
genflags (flag_logical, sz_long, "newv", "", ""); |
1437 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
1438 |
|
|
insn_n_cycles += 32; |
1439 |
|
|
break; |
1440 |
|
|
case i_MULS: |
1441 |
|
|
genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); |
1442 |
|
|
genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); |
1443 |
|
|
start_brace (); |
1444 |
|
|
printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n"); |
1445 |
|
|
genflags (flag_logical, sz_long, "newv", "", ""); |
1446 |
|
|
genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); |
1447 |
|
|
insn_n_cycles += 32; |
1448 |
|
|
break; |
1449 |
|
|
case i_CHK: |
1450 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
1451 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1452 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1453 |
|
|
printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr); |
1454 |
|
|
printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr); |
1455 |
|
|
need_endlabel = 1; |
1456 |
|
|
break; |
1457 |
|
|
|
1458 |
|
|
case i_CHK2: |
1459 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
1460 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
1461 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1462 |
|
|
printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n"); |
1463 |
|
|
switch (curi->size) { |
1464 |
|
|
case sz_byte: |
1465 |
|
|
printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n"); |
1466 |
|
|
printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n"); |
1467 |
|
|
break; |
1468 |
|
|
case sz_word: |
1469 |
|
|
printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n"); |
1470 |
|
|
printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n"); |
1471 |
|
|
break; |
1472 |
|
|
case sz_long: |
1473 |
|
|
printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n"); |
1474 |
|
|
break; |
1475 |
|
|
default: |
1476 |
|
|
abort (); |
1477 |
|
|
} |
1478 |
|
|
printf ("\tSET_ZFLG (upper == reg || lower == reg);\n"); |
1479 |
gbeauche |
1.17 |
printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n"); |
1480 |
cebix |
1.1 |
printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr); |
1481 |
|
|
need_endlabel = 1; |
1482 |
|
|
break; |
1483 |
|
|
|
1484 |
|
|
case i_ASR: |
1485 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1486 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1487 |
|
|
start_brace (); |
1488 |
|
|
switch (curi->size) { |
1489 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1490 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1491 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1492 |
|
|
default: abort (); |
1493 |
|
|
} |
1494 |
|
|
printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1); |
1495 |
|
|
printf ("\tcnt &= 63;\n"); |
1496 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1497 |
|
|
printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); |
1498 |
|
|
printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size)); |
1499 |
|
|
printf ("\t\tSET_CFLG (sign);\n"); |
1500 |
|
|
duplicate_carry (); |
1501 |
|
|
if (source_is_imm1_8 (curi)) |
1502 |
|
|
printf ("\t} else {\n"); |
1503 |
|
|
else |
1504 |
|
|
printf ("\t} else if (cnt > 0) {\n"); |
1505 |
|
|
printf ("\t\tval >>= cnt - 1;\n"); |
1506 |
|
|
printf ("\t\tSET_CFLG (val & 1);\n"); |
1507 |
|
|
duplicate_carry (); |
1508 |
|
|
printf ("\t\tval >>= 1;\n"); |
1509 |
|
|
printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n", |
1510 |
|
|
bit_mask (curi->size), |
1511 |
|
|
bit_size (curi->size)); |
1512 |
|
|
printf ("\t\tval &= %s;\n", bit_mask (curi->size)); |
1513 |
|
|
printf ("\t}\n"); |
1514 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1515 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1516 |
|
|
break; |
1517 |
|
|
case i_ASL: |
1518 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1519 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1520 |
|
|
start_brace (); |
1521 |
|
|
switch (curi->size) { |
1522 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1523 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1524 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1525 |
|
|
default: abort (); |
1526 |
|
|
} |
1527 |
|
|
printf ("\tcnt &= 63;\n"); |
1528 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1529 |
|
|
printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); |
1530 |
|
|
printf ("\t\tSET_VFLG (val != 0);\n"); |
1531 |
|
|
printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", |
1532 |
|
|
bit_size (curi->size)); |
1533 |
|
|
duplicate_carry (); |
1534 |
|
|
printf ("\t\tval = 0;\n"); |
1535 |
|
|
if (source_is_imm1_8 (curi)) |
1536 |
|
|
printf ("\t} else {\n"); |
1537 |
|
|
else |
1538 |
|
|
printf ("\t} else if (cnt > 0) {\n"); |
1539 |
|
|
printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n", |
1540 |
|
|
bit_mask (curi->size), |
1541 |
|
|
bit_size (curi->size) - 1, |
1542 |
|
|
bit_mask (curi->size)); |
1543 |
|
|
printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n"); |
1544 |
|
|
printf ("\t\tval <<= cnt - 1;\n"); |
1545 |
|
|
printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); |
1546 |
|
|
duplicate_carry (); |
1547 |
|
|
printf ("\t\tval <<= 1;\n"); |
1548 |
|
|
printf ("\t\tval &= %s;\n", bit_mask (curi->size)); |
1549 |
|
|
printf ("\t}\n"); |
1550 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1551 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1552 |
|
|
break; |
1553 |
|
|
case i_LSR: |
1554 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1555 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1556 |
|
|
start_brace (); |
1557 |
|
|
switch (curi->size) { |
1558 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1559 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1560 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1561 |
|
|
default: abort (); |
1562 |
|
|
} |
1563 |
|
|
printf ("\tcnt &= 63;\n"); |
1564 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1565 |
|
|
printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); |
1566 |
|
|
printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n", |
1567 |
|
|
bit_size (curi->size), bit_size (curi->size) - 1); |
1568 |
|
|
duplicate_carry (); |
1569 |
|
|
printf ("\t\tval = 0;\n"); |
1570 |
|
|
if (source_is_imm1_8 (curi)) |
1571 |
|
|
printf ("\t} else {\n"); |
1572 |
|
|
else |
1573 |
|
|
printf ("\t} else if (cnt > 0) {\n"); |
1574 |
|
|
printf ("\t\tval >>= cnt - 1;\n"); |
1575 |
|
|
printf ("\t\tSET_CFLG (val & 1);\n"); |
1576 |
|
|
duplicate_carry (); |
1577 |
|
|
printf ("\t\tval >>= 1;\n"); |
1578 |
|
|
printf ("\t}\n"); |
1579 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1580 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1581 |
|
|
break; |
1582 |
|
|
case i_LSL: |
1583 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1584 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1585 |
|
|
start_brace (); |
1586 |
|
|
switch (curi->size) { |
1587 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1588 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1589 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1590 |
|
|
default: abort (); |
1591 |
|
|
} |
1592 |
|
|
printf ("\tcnt &= 63;\n"); |
1593 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1594 |
|
|
printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); |
1595 |
|
|
printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", |
1596 |
|
|
bit_size (curi->size)); |
1597 |
|
|
duplicate_carry (); |
1598 |
|
|
printf ("\t\tval = 0;\n"); |
1599 |
|
|
if (source_is_imm1_8 (curi)) |
1600 |
|
|
printf ("\t} else {\n"); |
1601 |
|
|
else |
1602 |
|
|
printf ("\t} else if (cnt > 0) {\n"); |
1603 |
|
|
printf ("\t\tval <<= (cnt - 1);\n"); |
1604 |
|
|
printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); |
1605 |
|
|
duplicate_carry (); |
1606 |
|
|
printf ("\t\tval <<= 1;\n"); |
1607 |
|
|
printf ("\tval &= %s;\n", bit_mask (curi->size)); |
1608 |
|
|
printf ("\t}\n"); |
1609 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1610 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1611 |
|
|
break; |
1612 |
|
|
case i_ROL: |
1613 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1614 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1615 |
|
|
start_brace (); |
1616 |
|
|
switch (curi->size) { |
1617 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1618 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1619 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1620 |
|
|
default: abort (); |
1621 |
|
|
} |
1622 |
|
|
printf ("\tcnt &= 63;\n"); |
1623 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1624 |
|
|
if (source_is_imm1_8 (curi)) |
1625 |
|
|
printf ("{"); |
1626 |
|
|
else |
1627 |
|
|
printf ("\tif (cnt > 0) {\n"); |
1628 |
|
|
printf ("\tuae_u32 loval;\n"); |
1629 |
|
|
printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1); |
1630 |
|
|
printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size)); |
1631 |
|
|
printf ("\tval <<= cnt;\n"); |
1632 |
|
|
printf ("\tval |= loval;\n"); |
1633 |
|
|
printf ("\tval &= %s;\n", bit_mask (curi->size)); |
1634 |
|
|
printf ("\tSET_CFLG (val & 1);\n"); |
1635 |
|
|
printf ("}\n"); |
1636 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1637 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1638 |
|
|
break; |
1639 |
|
|
case i_ROR: |
1640 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1641 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1642 |
|
|
start_brace (); |
1643 |
|
|
switch (curi->size) { |
1644 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1645 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1646 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1647 |
|
|
default: abort (); |
1648 |
|
|
} |
1649 |
|
|
printf ("\tcnt &= 63;\n"); |
1650 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1651 |
|
|
if (source_is_imm1_8 (curi)) |
1652 |
|
|
printf ("{"); |
1653 |
|
|
else |
1654 |
|
|
printf ("\tif (cnt > 0) {"); |
1655 |
|
|
printf ("\tuae_u32 hival;\n"); |
1656 |
|
|
printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1); |
1657 |
|
|
printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size)); |
1658 |
|
|
printf ("\tval >>= cnt;\n"); |
1659 |
|
|
printf ("\tval |= hival;\n"); |
1660 |
|
|
printf ("\tval &= %s;\n", bit_mask (curi->size)); |
1661 |
|
|
printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); |
1662 |
|
|
printf ("\t}\n"); |
1663 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1664 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1665 |
|
|
break; |
1666 |
|
|
case i_ROXL: |
1667 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1668 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1669 |
|
|
start_brace (); |
1670 |
|
|
switch (curi->size) { |
1671 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1672 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1673 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1674 |
|
|
default: abort (); |
1675 |
|
|
} |
1676 |
|
|
printf ("\tcnt &= 63;\n"); |
1677 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1678 |
|
|
if (source_is_imm1_8 (curi)) |
1679 |
|
|
printf ("{"); |
1680 |
gbeauche |
1.14 |
else { |
1681 |
|
|
force_range_for_rox ("cnt", curi->size); |
1682 |
cebix |
1.1 |
printf ("\tif (cnt > 0) {\n"); |
1683 |
gbeauche |
1.14 |
} |
1684 |
cebix |
1.1 |
printf ("\tcnt--;\n"); |
1685 |
|
|
printf ("\t{\n\tuae_u32 carry;\n"); |
1686 |
|
|
printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1); |
1687 |
|
|
printf ("\tcarry = loval & 1;\n"); |
1688 |
|
|
printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n"); |
1689 |
|
|
printf ("\tSET_XFLG (carry);\n"); |
1690 |
|
|
printf ("\tval &= %s;\n", bit_mask (curi->size)); |
1691 |
|
|
printf ("\t} }\n"); |
1692 |
|
|
printf ("\tSET_CFLG (GET_XFLG);\n"); |
1693 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1694 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1695 |
|
|
break; |
1696 |
|
|
case i_ROXR: |
1697 |
|
|
genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); |
1698 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); |
1699 |
|
|
start_brace (); |
1700 |
|
|
switch (curi->size) { |
1701 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1702 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1703 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1704 |
|
|
default: abort (); |
1705 |
|
|
} |
1706 |
|
|
printf ("\tcnt &= 63;\n"); |
1707 |
|
|
printf ("\tCLEAR_CZNV;\n"); |
1708 |
|
|
if (source_is_imm1_8 (curi)) |
1709 |
|
|
printf ("{"); |
1710 |
gbeauche |
1.14 |
else { |
1711 |
|
|
force_range_for_rox ("cnt", curi->size); |
1712 |
cebix |
1.1 |
printf ("\tif (cnt > 0) {\n"); |
1713 |
gbeauche |
1.14 |
} |
1714 |
cebix |
1.1 |
printf ("\tcnt--;\n"); |
1715 |
|
|
printf ("\t{\n\tuae_u32 carry;\n"); |
1716 |
|
|
printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n"); |
1717 |
|
|
printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1); |
1718 |
|
|
printf ("\tval >>= cnt;\n"); |
1719 |
|
|
printf ("\tcarry = val & 1;\n"); |
1720 |
|
|
printf ("\tval >>= 1;\n"); |
1721 |
|
|
printf ("\tval |= hival;\n"); |
1722 |
|
|
printf ("\tSET_XFLG (carry);\n"); |
1723 |
|
|
printf ("\tval &= %s;\n", bit_mask (curi->size)); |
1724 |
|
|
printf ("\t} }\n"); |
1725 |
|
|
printf ("\tSET_CFLG (GET_XFLG);\n"); |
1726 |
|
|
genflags (flag_logical_noclobber, curi->size, "val", "", ""); |
1727 |
|
|
genastore ("val", curi->dmode, "dstreg", curi->size, "data"); |
1728 |
|
|
break; |
1729 |
|
|
case i_ASRW: |
1730 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1731 |
|
|
start_brace (); |
1732 |
|
|
switch (curi->size) { |
1733 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1734 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1735 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1736 |
|
|
default: abort (); |
1737 |
|
|
} |
1738 |
|
|
printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size)); |
1739 |
|
|
printf ("\tuae_u32 cflg = val & 1;\n"); |
1740 |
|
|
printf ("\tval = (val >> 1) | sign;\n"); |
1741 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1742 |
|
|
printf ("\tSET_CFLG (cflg);\n"); |
1743 |
|
|
duplicate_carry (); |
1744 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1745 |
|
|
break; |
1746 |
|
|
case i_ASLW: |
1747 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1748 |
|
|
start_brace (); |
1749 |
|
|
switch (curi->size) { |
1750 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1751 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1752 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1753 |
|
|
default: abort (); |
1754 |
|
|
} |
1755 |
|
|
printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size)); |
1756 |
|
|
printf ("\tuae_u32 sign2;\n"); |
1757 |
|
|
printf ("\tval <<= 1;\n"); |
1758 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1759 |
|
|
printf ("\tsign2 = %s & val;\n", cmask (curi->size)); |
1760 |
|
|
printf ("\tSET_CFLG (sign != 0);\n"); |
1761 |
|
|
duplicate_carry (); |
1762 |
|
|
|
1763 |
|
|
printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n"); |
1764 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1765 |
|
|
break; |
1766 |
|
|
case i_LSRW: |
1767 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1768 |
|
|
start_brace (); |
1769 |
|
|
switch (curi->size) { |
1770 |
|
|
case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; |
1771 |
|
|
case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; |
1772 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1773 |
|
|
default: abort (); |
1774 |
|
|
} |
1775 |
|
|
printf ("\tuae_u32 carry = val & 1;\n"); |
1776 |
|
|
printf ("\tval >>= 1;\n"); |
1777 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1778 |
|
|
printf ("SET_CFLG (carry);\n"); |
1779 |
|
|
duplicate_carry (); |
1780 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1781 |
|
|
break; |
1782 |
|
|
case i_LSLW: |
1783 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1784 |
|
|
start_brace (); |
1785 |
|
|
switch (curi->size) { |
1786 |
|
|
case sz_byte: printf ("\tuae_u8 val = data;\n"); break; |
1787 |
|
|
case sz_word: printf ("\tuae_u16 val = data;\n"); break; |
1788 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1789 |
|
|
default: abort (); |
1790 |
|
|
} |
1791 |
|
|
printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); |
1792 |
|
|
printf ("\tval <<= 1;\n"); |
1793 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1794 |
|
|
printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); |
1795 |
|
|
duplicate_carry (); |
1796 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1797 |
|
|
break; |
1798 |
|
|
case i_ROLW: |
1799 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1800 |
|
|
start_brace (); |
1801 |
|
|
switch (curi->size) { |
1802 |
|
|
case sz_byte: printf ("\tuae_u8 val = data;\n"); break; |
1803 |
|
|
case sz_word: printf ("\tuae_u16 val = data;\n"); break; |
1804 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1805 |
|
|
default: abort (); |
1806 |
|
|
} |
1807 |
|
|
printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); |
1808 |
|
|
printf ("\tval <<= 1;\n"); |
1809 |
|
|
printf ("\tif (carry) val |= 1;\n"); |
1810 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1811 |
|
|
printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); |
1812 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1813 |
|
|
break; |
1814 |
|
|
case i_RORW: |
1815 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1816 |
|
|
start_brace (); |
1817 |
|
|
switch (curi->size) { |
1818 |
|
|
case sz_byte: printf ("\tuae_u8 val = data;\n"); break; |
1819 |
|
|
case sz_word: printf ("\tuae_u16 val = data;\n"); break; |
1820 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1821 |
|
|
default: abort (); |
1822 |
|
|
} |
1823 |
|
|
printf ("\tuae_u32 carry = val & 1;\n"); |
1824 |
|
|
printf ("\tval >>= 1;\n"); |
1825 |
|
|
printf ("\tif (carry) val |= %s;\n", cmask (curi->size)); |
1826 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1827 |
|
|
printf ("SET_CFLG (carry);\n"); |
1828 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1829 |
|
|
break; |
1830 |
|
|
case i_ROXLW: |
1831 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1832 |
|
|
start_brace (); |
1833 |
|
|
switch (curi->size) { |
1834 |
|
|
case sz_byte: printf ("\tuae_u8 val = data;\n"); break; |
1835 |
|
|
case sz_word: printf ("\tuae_u16 val = data;\n"); break; |
1836 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1837 |
|
|
default: abort (); |
1838 |
|
|
} |
1839 |
|
|
printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); |
1840 |
|
|
printf ("\tval <<= 1;\n"); |
1841 |
|
|
printf ("\tif (GET_XFLG) val |= 1;\n"); |
1842 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1843 |
|
|
printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); |
1844 |
|
|
duplicate_carry (); |
1845 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1846 |
|
|
break; |
1847 |
|
|
case i_ROXRW: |
1848 |
|
|
genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); |
1849 |
|
|
start_brace (); |
1850 |
|
|
switch (curi->size) { |
1851 |
|
|
case sz_byte: printf ("\tuae_u8 val = data;\n"); break; |
1852 |
|
|
case sz_word: printf ("\tuae_u16 val = data;\n"); break; |
1853 |
|
|
case sz_long: printf ("\tuae_u32 val = data;\n"); break; |
1854 |
|
|
default: abort (); |
1855 |
|
|
} |
1856 |
|
|
printf ("\tuae_u32 carry = val & 1;\n"); |
1857 |
|
|
printf ("\tval >>= 1;\n"); |
1858 |
|
|
printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size)); |
1859 |
|
|
genflags (flag_logical, curi->size, "val", "", ""); |
1860 |
|
|
printf ("SET_CFLG (carry);\n"); |
1861 |
|
|
duplicate_carry (); |
1862 |
|
|
genastore ("val", curi->smode, "srcreg", curi->size, "data"); |
1863 |
|
|
break; |
1864 |
|
|
case i_MOVEC2: |
1865 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1866 |
|
|
start_brace (); |
1867 |
|
|
printf ("\tint regno = (src >> 12) & 15;\n"); |
1868 |
|
|
printf ("\tuae_u32 *regp = regs.regs + regno;\n"); |
1869 |
gbeauche |
1.14 |
printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr); |
1870 |
cebix |
1.1 |
break; |
1871 |
|
|
case i_MOVE2C: |
1872 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1873 |
|
|
start_brace (); |
1874 |
|
|
printf ("\tint regno = (src >> 12) & 15;\n"); |
1875 |
|
|
printf ("\tuae_u32 *regp = regs.regs + regno;\n"); |
1876 |
gbeauche |
1.14 |
printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr); |
1877 |
cebix |
1.1 |
break; |
1878 |
|
|
case i_CAS: |
1879 |
|
|
{ |
1880 |
|
|
int old_brace_level; |
1881 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
1882 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1883 |
|
|
start_brace (); |
1884 |
|
|
printf ("\tint ru = (src >> 6) & 7;\n"); |
1885 |
|
|
printf ("\tint rc = src & 7;\n"); |
1886 |
|
|
genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst"); |
1887 |
|
|
printf ("\tif (GET_ZFLG)"); |
1888 |
|
|
old_brace_level = n_braces; |
1889 |
|
|
start_brace (); |
1890 |
|
|
genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst"); |
1891 |
|
|
pop_braces (old_brace_level); |
1892 |
|
|
printf ("else"); |
1893 |
|
|
start_brace (); |
1894 |
|
|
printf ("m68k_dreg(regs, rc) = dst;\n"); |
1895 |
|
|
pop_braces (old_brace_level); |
1896 |
|
|
} |
1897 |
|
|
break; |
1898 |
|
|
case i_CAS2: |
1899 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
1900 |
|
|
printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n"); |
1901 |
|
|
printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n"); |
1902 |
|
|
if (curi->size == sz_word) { |
1903 |
|
|
int old_brace_level = n_braces; |
1904 |
|
|
printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n"); |
1905 |
|
|
genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1"); |
1906 |
|
|
printf ("\tif (GET_ZFLG) {\n"); |
1907 |
|
|
genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2"); |
1908 |
|
|
printf ("\tif (GET_ZFLG) {\n"); |
1909 |
|
|
printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n"); |
1910 |
|
|
printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n"); |
1911 |
|
|
printf ("\t}}\n"); |
1912 |
|
|
pop_braces (old_brace_level); |
1913 |
|
|
printf ("\tif (! GET_ZFLG) {\n"); |
1914 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n"); |
1915 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n"); |
1916 |
|
|
printf ("\t}\n"); |
1917 |
|
|
} else { |
1918 |
|
|
int old_brace_level = n_braces; |
1919 |
|
|
printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n"); |
1920 |
|
|
genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1"); |
1921 |
|
|
printf ("\tif (GET_ZFLG) {\n"); |
1922 |
|
|
genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2"); |
1923 |
|
|
printf ("\tif (GET_ZFLG) {\n"); |
1924 |
|
|
printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n"); |
1925 |
|
|
printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n"); |
1926 |
|
|
printf ("\t}}\n"); |
1927 |
|
|
pop_braces (old_brace_level); |
1928 |
|
|
printf ("\tif (! GET_ZFLG) {\n"); |
1929 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n"); |
1930 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n"); |
1931 |
|
|
printf ("\t}\n"); |
1932 |
|
|
} |
1933 |
|
|
break; |
1934 |
|
|
case i_MOVES: /* ignore DFC and SFC because we have no MMU */ |
1935 |
|
|
{ |
1936 |
|
|
int old_brace_level; |
1937 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
1938 |
|
|
printf ("\tif (extra & 0x800)\n"); |
1939 |
|
|
old_brace_level = n_braces; |
1940 |
|
|
start_brace (); |
1941 |
|
|
printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n"); |
1942 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); |
1943 |
|
|
genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); |
1944 |
|
|
pop_braces (old_brace_level); |
1945 |
|
|
printf ("else"); |
1946 |
|
|
start_brace (); |
1947 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0); |
1948 |
|
|
printf ("\tif (extra & 0x8000) {\n"); |
1949 |
|
|
switch (curi->size) { |
1950 |
|
|
case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break; |
1951 |
|
|
case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break; |
1952 |
|
|
case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break; |
1953 |
|
|
default: abort (); |
1954 |
|
|
} |
1955 |
|
|
printf ("\t} else {\n"); |
1956 |
|
|
genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, ""); |
1957 |
|
|
printf ("\t}\n"); |
1958 |
|
|
pop_braces (old_brace_level); |
1959 |
|
|
} |
1960 |
|
|
break; |
1961 |
|
|
case i_BKPT: /* only needed for hardware emulators */ |
1962 |
|
|
sync_m68k_pc (); |
1963 |
|
|
printf ("\top_illg(opcode);\n"); |
1964 |
|
|
break; |
1965 |
|
|
case i_CALLM: /* not present in 68030 */ |
1966 |
|
|
sync_m68k_pc (); |
1967 |
|
|
printf ("\top_illg(opcode);\n"); |
1968 |
|
|
break; |
1969 |
|
|
case i_RTM: /* not present in 68030 */ |
1970 |
|
|
sync_m68k_pc (); |
1971 |
|
|
printf ("\top_illg(opcode);\n"); |
1972 |
|
|
break; |
1973 |
|
|
case i_TRAPcc: |
1974 |
|
|
if (curi->smode != am_unknown && curi->smode != am_illg) |
1975 |
|
|
genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0); |
1976 |
|
|
printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr); |
1977 |
|
|
need_endlabel = 1; |
1978 |
|
|
break; |
1979 |
|
|
case i_DIVL: |
1980 |
|
|
sync_m68k_pc (); |
1981 |
|
|
start_brace (); |
1982 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
1983 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
1984 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1985 |
|
|
sync_m68k_pc (); |
1986 |
|
|
printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n"); |
1987 |
|
|
break; |
1988 |
|
|
case i_MULL: |
1989 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
1990 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); |
1991 |
|
|
sync_m68k_pc (); |
1992 |
|
|
printf ("\tm68k_mull(opcode, dst, extra);\n"); |
1993 |
|
|
break; |
1994 |
|
|
case i_BFTST: |
1995 |
|
|
case i_BFEXTU: |
1996 |
|
|
case i_BFCHG: |
1997 |
|
|
case i_BFEXTS: |
1998 |
|
|
case i_BFCLR: |
1999 |
|
|
case i_BFFFO: |
2000 |
|
|
case i_BFSET: |
2001 |
|
|
case i_BFINS: |
2002 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2003 |
|
|
genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0); |
2004 |
|
|
start_brace (); |
2005 |
|
|
printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n"); |
2006 |
|
|
printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n"); |
2007 |
|
|
if (curi->dmode == Dreg) { |
2008 |
|
|
printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n"); |
2009 |
|
|
} else { |
2010 |
|
|
printf ("\tuae_u32 tmp,bf0,bf1;\n"); |
2011 |
|
|
printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n"); |
2012 |
|
|
printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n"); |
2013 |
|
|
printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n"); |
2014 |
|
|
} |
2015 |
|
|
printf ("\ttmp >>= (32 - width);\n"); |
2016 |
gbeauche |
1.17 |
printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n"); |
2017 |
cebix |
1.1 |
printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n"); |
2018 |
|
|
switch (curi->mnemo) { |
2019 |
|
|
case i_BFTST: |
2020 |
|
|
break; |
2021 |
|
|
case i_BFEXTU: |
2022 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n"); |
2023 |
|
|
break; |
2024 |
|
|
case i_BFCHG: |
2025 |
|
|
printf ("\ttmp = ~tmp;\n"); |
2026 |
|
|
break; |
2027 |
|
|
case i_BFEXTS: |
2028 |
|
|
printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n"); |
2029 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n"); |
2030 |
|
|
break; |
2031 |
|
|
case i_BFCLR: |
2032 |
|
|
printf ("\ttmp = 0;\n"); |
2033 |
|
|
break; |
2034 |
|
|
case i_BFFFO: |
2035 |
|
|
printf ("\t{ uae_u32 mask = 1 << (width-1);\n"); |
2036 |
|
|
printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n"); |
2037 |
|
|
printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n"); |
2038 |
|
|
break; |
2039 |
|
|
case i_BFSET: |
2040 |
|
|
printf ("\ttmp = 0xffffffff;\n"); |
2041 |
|
|
break; |
2042 |
|
|
case i_BFINS: |
2043 |
|
|
printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n"); |
2044 |
gbeauche |
1.17 |
printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n"); |
2045 |
gbeauche |
1.16 |
printf ("\tSET_ZFLG (tmp == 0);\n"); |
2046 |
cebix |
1.1 |
break; |
2047 |
|
|
default: |
2048 |
|
|
break; |
2049 |
|
|
} |
2050 |
|
|
if (curi->mnemo == i_BFCHG |
2051 |
|
|
|| curi->mnemo == i_BFCLR |
2052 |
|
|
|| curi->mnemo == i_BFSET |
2053 |
|
|
|| curi->mnemo == i_BFINS) |
2054 |
|
|
{ |
2055 |
|
|
printf ("\ttmp <<= (32 - width);\n"); |
2056 |
|
|
if (curi->dmode == Dreg) { |
2057 |
|
|
printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n"); |
2058 |
|
|
printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n"); |
2059 |
|
|
printf ("\t\t(tmp >> (offset & 0x1f)) |\n"); |
2060 |
|
|
printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n"); |
2061 |
|
|
printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n"); |
2062 |
|
|
} else { |
2063 |
|
|
printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n"); |
2064 |
|
|
printf ("\t\t(tmp >> (offset & 7)) |\n"); |
2065 |
|
|
printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n"); |
2066 |
|
|
printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n"); |
2067 |
|
|
printf ("\tput_long(dsta,bf0 );\n"); |
2068 |
|
|
printf ("\tif (((offset & 7) + width) > 32) {\n"); |
2069 |
|
|
printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n"); |
2070 |
|
|
printf ("\t\t\t(tmp << (8 - (offset & 7)));\n"); |
2071 |
|
|
printf ("\t\tput_byte(dsta+4,bf1);\n"); |
2072 |
|
|
printf ("\t}\n"); |
2073 |
|
|
} |
2074 |
|
|
} |
2075 |
|
|
break; |
2076 |
|
|
case i_PACK: |
2077 |
|
|
if (curi->smode == Dreg) { |
2078 |
|
|
printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ()); |
2079 |
|
|
printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n"); |
2080 |
|
|
} else { |
2081 |
|
|
printf ("\tuae_u16 val;\n"); |
2082 |
|
|
printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); |
2083 |
|
|
printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n"); |
2084 |
|
|
printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); |
2085 |
|
|
printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ()); |
2086 |
|
|
printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); |
2087 |
|
|
printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n"); |
2088 |
|
|
} |
2089 |
|
|
break; |
2090 |
|
|
case i_UNPK: |
2091 |
|
|
if (curi->smode == Dreg) { |
2092 |
|
|
printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n"); |
2093 |
|
|
printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ()); |
2094 |
|
|
printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n"); |
2095 |
|
|
} else { |
2096 |
|
|
printf ("\tuae_u16 val;\n"); |
2097 |
|
|
printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); |
2098 |
|
|
printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n"); |
2099 |
|
|
printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ()); |
2100 |
|
|
printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); |
2101 |
|
|
printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n"); |
2102 |
|
|
printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); |
2103 |
|
|
printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n"); |
2104 |
|
|
} |
2105 |
|
|
break; |
2106 |
|
|
case i_TAS: |
2107 |
|
|
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); |
2108 |
|
|
genflags (flag_logical, curi->size, "src", "", ""); |
2109 |
|
|
printf ("\tsrc |= 0x80;\n"); |
2110 |
|
|
genastore ("src", curi->smode, "srcreg", curi->size, "src"); |
2111 |
|
|
break; |
2112 |
|
|
case i_FPP: |
2113 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2114 |
|
|
sync_m68k_pc (); |
2115 |
|
|
swap_opcode (); |
2116 |
gbeauche |
1.18 |
printf ("\tfpuop_arithmetic(opcode, extra);\n"); |
2117 |
cebix |
1.1 |
break; |
2118 |
|
|
case i_FDBcc: |
2119 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2120 |
|
|
sync_m68k_pc (); |
2121 |
|
|
swap_opcode (); |
2122 |
gbeauche |
1.18 |
printf ("\tfpuop_dbcc(opcode, extra);\n"); |
2123 |
cebix |
1.1 |
break; |
2124 |
|
|
case i_FScc: |
2125 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2126 |
|
|
sync_m68k_pc (); |
2127 |
|
|
swap_opcode (); |
2128 |
gbeauche |
1.18 |
printf ("\tfpuop_scc(opcode,extra);\n"); |
2129 |
cebix |
1.1 |
break; |
2130 |
|
|
case i_FTRAPcc: |
2131 |
|
|
sync_m68k_pc (); |
2132 |
|
|
start_brace (); |
2133 |
|
|
printf ("\tuaecptr oldpc = m68k_getpc();\n"); |
2134 |
|
|
if (curi->smode != am_unknown && curi->smode != am_illg) |
2135 |
|
|
genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0); |
2136 |
|
|
sync_m68k_pc (); |
2137 |
|
|
swap_opcode (); |
2138 |
gbeauche |
1.18 |
printf ("\tfpuop_trapcc(opcode,oldpc);\n"); |
2139 |
cebix |
1.1 |
break; |
2140 |
|
|
case i_FBcc: |
2141 |
|
|
sync_m68k_pc (); |
2142 |
|
|
start_brace (); |
2143 |
|
|
printf ("\tuaecptr pc = m68k_getpc();\n"); |
2144 |
|
|
genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0); |
2145 |
|
|
sync_m68k_pc (); |
2146 |
|
|
swap_opcode (); |
2147 |
gbeauche |
1.18 |
printf ("\tfpuop_bcc(opcode,pc,extra);\n"); |
2148 |
cebix |
1.1 |
break; |
2149 |
|
|
case i_FSAVE: |
2150 |
|
|
sync_m68k_pc (); |
2151 |
|
|
swap_opcode (); |
2152 |
gbeauche |
1.18 |
printf ("\tfpuop_save(opcode);\n"); |
2153 |
cebix |
1.1 |
break; |
2154 |
|
|
case i_FRESTORE: |
2155 |
|
|
sync_m68k_pc (); |
2156 |
|
|
swap_opcode (); |
2157 |
gbeauche |
1.18 |
printf ("\tfpuop_restore(opcode);\n"); |
2158 |
cebix |
1.1 |
break; |
2159 |
cebix |
1.6 |
case i_CINVL: |
2160 |
|
|
case i_CINVP: |
2161 |
|
|
case i_CINVA: |
2162 |
gbeauche |
1.19 |
/* gb-- srcreg now contains the cache field */ |
2163 |
|
|
printf ("\tif (srcreg&0x2)\n"); |
2164 |
|
|
printf ("\t\tflush_icache(%d);\n", 30 + ((opcode >> 3) & 3)); |
2165 |
|
|
break; |
2166 |
cebix |
1.6 |
case i_CPUSHL: |
2167 |
|
|
case i_CPUSHP: |
2168 |
|
|
case i_CPUSHA: |
2169 |
gbeauche |
1.19 |
/* gb-- srcreg now contains the cache field */ |
2170 |
|
|
printf ("\tif (srcreg&0x2)\n"); |
2171 |
|
|
printf ("\t\tflush_icache(%d);\n", 40 + ((opcode >> 3) & 3)); |
2172 |
cebix |
1.6 |
break; |
2173 |
|
|
case i_MOVE16: |
2174 |
gbeauche |
1.12 |
if ((opcode & 0xfff8) == 0xf620) { |
2175 |
|
|
/* MOVE16 (Ax)+,(Ay)+ */ |
2176 |
|
|
printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); |
2177 |
|
|
printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); |
2178 |
|
|
printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); |
2179 |
|
|
printf ("\tput_long(memd, get_long(mems));\n"); |
2180 |
|
|
printf ("\tput_long(memd+4, get_long(mems+4));\n"); |
2181 |
|
|
printf ("\tput_long(memd+8, get_long(mems+8));\n"); |
2182 |
|
|
printf ("\tput_long(memd+12, get_long(mems+12));\n"); |
2183 |
|
|
printf ("\tif (srcreg != dstreg)\n"); |
2184 |
|
|
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2185 |
|
|
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2186 |
|
|
} |
2187 |
|
|
else { |
2188 |
|
|
/* Other variants */ |
2189 |
|
|
genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2); |
2190 |
|
|
genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2); |
2191 |
|
|
printf ("\tmemsa &= ~15;\n"); |
2192 |
|
|
printf ("\tmemda &= ~15;\n"); |
2193 |
|
|
printf ("\tput_long(memda, get_long(memsa));\n"); |
2194 |
|
|
printf ("\tput_long(memda+4, get_long(memsa+4));\n"); |
2195 |
|
|
printf ("\tput_long(memda+8, get_long(memsa+8));\n"); |
2196 |
|
|
printf ("\tput_long(memda+12, get_long(memsa+12));\n"); |
2197 |
|
|
if ((opcode & 0xfff8) == 0xf600) |
2198 |
|
|
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2199 |
|
|
else if ((opcode & 0xfff8) == 0xf608) |
2200 |
|
|
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2201 |
|
|
} |
2202 |
cebix |
1.6 |
break; |
2203 |
cebix |
1.1 |
case i_MMUOP: |
2204 |
|
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2205 |
|
|
sync_m68k_pc (); |
2206 |
|
|
swap_opcode (); |
2207 |
|
|
printf ("\tmmu_op(opcode,extra);\n"); |
2208 |
|
|
break; |
2209 |
gbeauche |
1.17 |
|
2210 |
|
|
case i_EMULOP_RETURN: |
2211 |
|
|
printf ("\tm68k_emulop_return();\n"); |
2212 |
|
|
m68k_pc_offset = 0; |
2213 |
|
|
break; |
2214 |
|
|
|
2215 |
|
|
case i_EMULOP: |
2216 |
|
|
printf ("\n"); |
2217 |
|
|
swap_opcode (); |
2218 |
|
|
printf ("\tm68k_emulop(opcode);\n"); |
2219 |
|
|
break; |
2220 |
|
|
|
2221 |
cebix |
1.1 |
default: |
2222 |
|
|
abort (); |
2223 |
|
|
break; |
2224 |
|
|
} |
2225 |
|
|
finish_braces (); |
2226 |
|
|
sync_m68k_pc (); |
2227 |
|
|
} |
2228 |
|
|
|
2229 |
|
|
static void generate_includes (FILE * f) |
2230 |
|
|
{ |
2231 |
|
|
fprintf (f, "#include \"sysdeps.h\"\n"); |
2232 |
gbeauche |
1.17 |
|
2233 |
cebix |
1.1 |
fprintf (f, "#include \"m68k.h\"\n"); |
2234 |
|
|
fprintf (f, "#include \"memory.h\"\n"); |
2235 |
|
|
fprintf (f, "#include \"readcpu.h\"\n"); |
2236 |
|
|
fprintf (f, "#include \"newcpu.h\"\n"); |
2237 |
gbeauche |
1.19 |
fprintf (f, "#include \"compiler/compemu.h\"\n"); |
2238 |
gbeauche |
1.18 |
fprintf (f, "#include \"fpu/fpu.h\"\n"); |
2239 |
cebix |
1.1 |
fprintf (f, "#include \"cputbl.h\"\n"); |
2240 |
gbeauche |
1.17 |
|
2241 |
|
|
fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n"); |
2242 |
|
|
fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n"); |
2243 |
|
|
fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n"); |
2244 |
|
|
fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n"); |
2245 |
|
|
fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n"); |
2246 |
|
|
|
2247 |
|
|
fprintf (f, "#ifdef NOFLAGS\n"); |
2248 |
|
|
fprintf (f, "# include \"noflags.h\"\n"); |
2249 |
|
|
fprintf (f, "#endif\n"); |
2250 |
cebix |
1.1 |
} |
2251 |
|
|
|
2252 |
|
|
static int postfix; |
2253 |
|
|
|
2254 |
|
|
static void generate_one_opcode (int rp) |
2255 |
|
|
{ |
2256 |
|
|
int i; |
2257 |
|
|
uae_u16 smsk, dmsk; |
2258 |
|
|
long int opcode = opcode_map[rp]; |
2259 |
|
|
|
2260 |
|
|
if (table68k[opcode].mnemo == i_ILLG |
2261 |
|
|
|| table68k[opcode].clev > cpu_level) |
2262 |
|
|
return; |
2263 |
|
|
|
2264 |
|
|
for (i = 0; lookuptab[i].name[0]; i++) { |
2265 |
|
|
if (table68k[opcode].mnemo == lookuptab[i].mnemo) |
2266 |
|
|
break; |
2267 |
|
|
} |
2268 |
|
|
|
2269 |
|
|
if (table68k[opcode].handler != -1) |
2270 |
|
|
return; |
2271 |
|
|
|
2272 |
|
|
if (opcode_next_clev[rp] != cpu_level) { |
2273 |
gbeauche |
1.17 |
fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp], |
2274 |
cebix |
1.1 |
opcode, lookuptab[i].name); |
2275 |
|
|
return; |
2276 |
|
|
} |
2277 |
gbeauche |
1.17 |
|
2278 |
|
|
if (table68k[opcode].flagdead == 0) |
2279 |
|
|
/* force to the "ff" variant since the instruction doesn't set at all the condition codes */ |
2280 |
|
|
fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); |
2281 |
|
|
else |
2282 |
|
|
fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); |
2283 |
|
|
|
2284 |
|
|
fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix); |
2285 |
|
|
fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix); |
2286 |
|
|
printf ("cpuop_rettype REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); |
2287 |
|
|
printf ("\tcpuop_begin();\n"); |
2288 |
|
|
|
2289 |
|
|
/* gb-- The "nf" variant for an instruction that doesn't set the condition |
2290 |
|
|
codes at all is the same as the "ff" variant, so we don't need the "nf" |
2291 |
|
|
variant to be compiled since it is mapped to the "ff" variant in the |
2292 |
|
|
smalltbl. */ |
2293 |
|
|
if (table68k[opcode].flagdead == 0) |
2294 |
|
|
printf ("#ifndef NOFLAGS\n"); |
2295 |
cebix |
1.1 |
|
2296 |
|
|
switch (table68k[opcode].stype) { |
2297 |
|
|
case 0: smsk = 7; break; |
2298 |
|
|
case 1: smsk = 255; break; |
2299 |
|
|
case 2: smsk = 15; break; |
2300 |
|
|
case 3: smsk = 7; break; |
2301 |
|
|
case 4: smsk = 7; break; |
2302 |
|
|
case 5: smsk = 63; break; |
2303 |
gbeauche |
1.17 |
case 6: smsk = 255; break; |
2304 |
gbeauche |
1.12 |
case 7: smsk = 3; break; |
2305 |
cebix |
1.1 |
default: abort (); |
2306 |
|
|
} |
2307 |
|
|
dmsk = 7; |
2308 |
|
|
|
2309 |
|
|
next_cpu_level = -1; |
2310 |
|
|
if (table68k[opcode].suse |
2311 |
|
|
&& table68k[opcode].smode != imm && table68k[opcode].smode != imm0 |
2312 |
|
|
&& table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2 |
2313 |
|
|
&& table68k[opcode].smode != absw && table68k[opcode].smode != absl |
2314 |
gbeauche |
1.17 |
&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16 |
2315 |
|
|
/* gb-- We don't want to fetch the EmulOp code since the EmulOp() |
2316 |
|
|
routine uses the whole opcode value. Maybe all the EmulOps |
2317 |
|
|
could be expanded out but I don't think it is an improvement */ |
2318 |
|
|
&& table68k[opcode].stype != 6 |
2319 |
|
|
) |
2320 |
cebix |
1.1 |
{ |
2321 |
|
|
if (table68k[opcode].spos == -1) { |
2322 |
|
|
if (((int) table68k[opcode].sreg) >= 128) |
2323 |
|
|
printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg); |
2324 |
|
|
else |
2325 |
|
|
printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg); |
2326 |
|
|
} else { |
2327 |
|
|
char source[100]; |
2328 |
|
|
int pos = table68k[opcode].spos; |
2329 |
|
|
|
2330 |
|
|
#if 0 |
2331 |
|
|
/* Check that we can do the little endian optimization safely. */ |
2332 |
|
|
if (pos < 8 && (smsk >> (8 - pos)) != 0) |
2333 |
|
|
abort (); |
2334 |
|
|
#endif |
2335 |
|
|
printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); |
2336 |
|
|
|
2337 |
|
|
if (pos < 8 && (smsk >> (8 - pos)) != 0) |
2338 |
|
|
sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)", |
2339 |
|
|
pos ^ 8, 8 - pos, dmsk); |
2340 |
|
|
else if (pos != 8) |
2341 |
|
|
sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk); |
2342 |
|
|
else |
2343 |
|
|
sprintf (source, "(opcode & %d)", smsk); |
2344 |
|
|
|
2345 |
|
|
if (table68k[opcode].stype == 3) |
2346 |
|
|
printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source); |
2347 |
|
|
else if (table68k[opcode].stype == 1) |
2348 |
|
|
printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source); |
2349 |
|
|
else |
2350 |
|
|
printf ("\tuae_u32 srcreg = %s;\n", source); |
2351 |
|
|
|
2352 |
|
|
printf ("#else\n"); |
2353 |
|
|
|
2354 |
|
|
if (pos) |
2355 |
|
|
sprintf (source, "((opcode >> %d) & %d)", pos, smsk); |
2356 |
|
|
else |
2357 |
|
|
sprintf (source, "(opcode & %d)", smsk); |
2358 |
|
|
|
2359 |
|
|
if (table68k[opcode].stype == 3) |
2360 |
|
|
printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source); |
2361 |
|
|
else if (table68k[opcode].stype == 1) |
2362 |
|
|
printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source); |
2363 |
|
|
else |
2364 |
|
|
printf ("\tuae_u32 srcreg = %s;\n", source); |
2365 |
|
|
|
2366 |
|
|
printf ("#endif\n"); |
2367 |
|
|
} |
2368 |
|
|
} |
2369 |
|
|
if (table68k[opcode].duse |
2370 |
|
|
/* Yes, the dmode can be imm, in case of LINK or DBcc */ |
2371 |
|
|
&& table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0 |
2372 |
|
|
&& table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2 |
2373 |
|
|
&& table68k[opcode].dmode != absw && table68k[opcode].dmode != absl) |
2374 |
|
|
{ |
2375 |
|
|
if (table68k[opcode].dpos == -1) { |
2376 |
|
|
if (((int) table68k[opcode].dreg) >= 128) |
2377 |
|
|
printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg); |
2378 |
|
|
else |
2379 |
|
|
printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg); |
2380 |
|
|
} else { |
2381 |
|
|
int pos = table68k[opcode].dpos; |
2382 |
|
|
#if 0 |
2383 |
|
|
/* Check that we can do the little endian optimization safely. */ |
2384 |
|
|
if (pos < 8 && (dmsk >> (8 - pos)) != 0) |
2385 |
|
|
abort (); |
2386 |
|
|
#endif |
2387 |
|
|
printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); |
2388 |
|
|
|
2389 |
|
|
if (pos < 8 && (dmsk >> (8 - pos)) != 0) |
2390 |
|
|
printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n", |
2391 |
|
|
pos ^ 8, 8 - pos, dmsk); |
2392 |
|
|
else if (pos != 8) |
2393 |
|
|
printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", |
2394 |
|
|
pos ^ 8, dmsk); |
2395 |
|
|
else |
2396 |
|
|
printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk); |
2397 |
|
|
|
2398 |
|
|
printf ("#else\n"); |
2399 |
|
|
|
2400 |
|
|
if (pos) |
2401 |
|
|
printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", |
2402 |
|
|
pos, dmsk); |
2403 |
|
|
else |
2404 |
|
|
printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk); |
2405 |
|
|
|
2406 |
|
|
printf ("#endif\n"); |
2407 |
|
|
} |
2408 |
|
|
} |
2409 |
|
|
need_endlabel = 0; |
2410 |
|
|
endlabelno++; |
2411 |
|
|
sprintf (endlabelstr, "endlabel%d", endlabelno); |
2412 |
|
|
gen_opcode (opcode); |
2413 |
|
|
if (need_endlabel) |
2414 |
|
|
printf ("%s: ;\n", endlabelstr); |
2415 |
gbeauche |
1.17 |
if (table68k[opcode].flagdead == 0) |
2416 |
|
|
printf ("\n#endif\n"); |
2417 |
|
|
printf ("\tcpuop_end(%s);\n", cflow_string_of(opcode)); |
2418 |
cebix |
1.1 |
printf ("}\n"); |
2419 |
|
|
opcode_next_clev[rp] = next_cpu_level; |
2420 |
|
|
opcode_last_postfix[rp] = postfix; |
2421 |
|
|
} |
2422 |
|
|
|
2423 |
|
|
static void generate_func (void) |
2424 |
|
|
{ |
2425 |
|
|
int i, j, rp; |
2426 |
|
|
|
2427 |
|
|
using_prefetch = 0; |
2428 |
|
|
using_exception_3 = 0; |
2429 |
gbeauche |
1.11 |
#if !USE_PREFETCH_BUFFER |
2430 |
|
|
/* gb-- No need for a prefetch buffer, nor exception 3 handling */ |
2431 |
|
|
/* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */ |
2432 |
|
|
for (i = 0; i <= 4; i++) { |
2433 |
|
|
#else |
2434 |
cebix |
1.6 |
for (i = 0; i < 6; i++) { |
2435 |
gbeauche |
1.11 |
#endif |
2436 |
cebix |
1.6 |
cpu_level = 4 - i; |
2437 |
|
|
if (i == 5) { |
2438 |
cebix |
1.1 |
cpu_level = 0; |
2439 |
|
|
using_prefetch = 1; |
2440 |
|
|
using_exception_3 = 1; |
2441 |
|
|
for (rp = 0; rp < nr_cpuop_funcs; rp++) |
2442 |
|
|
opcode_next_clev[rp] = 0; |
2443 |
|
|
} |
2444 |
|
|
postfix = i; |
2445 |
gbeauche |
1.17 |
fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix); |
2446 |
cebix |
1.1 |
|
2447 |
|
|
/* sam: this is for people with low memory (eg. me :)) */ |
2448 |
|
|
printf ("\n" |
2449 |
|
|
"#if !defined(PART_1) && !defined(PART_2) && " |
2450 |
|
|
"!defined(PART_3) && !defined(PART_4) && " |
2451 |
|
|
"!defined(PART_5) && !defined(PART_6) && " |
2452 |
|
|
"!defined(PART_7) && !defined(PART_8)" |
2453 |
|
|
"\n" |
2454 |
|
|
"#define PART_1 1\n" |
2455 |
|
|
"#define PART_2 1\n" |
2456 |
|
|
"#define PART_3 1\n" |
2457 |
|
|
"#define PART_4 1\n" |
2458 |
|
|
"#define PART_5 1\n" |
2459 |
|
|
"#define PART_6 1\n" |
2460 |
|
|
"#define PART_7 1\n" |
2461 |
|
|
"#define PART_8 1\n" |
2462 |
|
|
"#endif\n\n"); |
2463 |
|
|
|
2464 |
|
|
rp = 0; |
2465 |
|
|
for(j=1;j<=8;++j) { |
2466 |
|
|
int k = (j*nr_cpuop_funcs)/8; |
2467 |
|
|
printf ("#ifdef PART_%d\n",j); |
2468 |
|
|
for (; rp < k; rp++) |
2469 |
|
|
generate_one_opcode (rp); |
2470 |
|
|
printf ("#endif\n\n"); |
2471 |
|
|
} |
2472 |
|
|
|
2473 |
|
|
fprintf (stblfile, "{ 0, 0, 0 }};\n"); |
2474 |
|
|
} |
2475 |
|
|
} |
2476 |
|
|
|
2477 |
|
|
int main (int argc, char **argv) |
2478 |
|
|
{ |
2479 |
|
|
read_table68k (); |
2480 |
|
|
do_merges (); |
2481 |
|
|
|
2482 |
|
|
opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs); |
2483 |
|
|
opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs); |
2484 |
|
|
opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs); |
2485 |
|
|
counts = (unsigned long *) malloc (65536 * sizeof (unsigned long)); |
2486 |
|
|
read_counts (); |
2487 |
|
|
|
2488 |
|
|
/* It would be a lot nicer to put all in one file (we'd also get rid of |
2489 |
|
|
* cputbl.h that way), but cpuopti can't cope. That could be fixed, but |
2490 |
|
|
* I don't dare to touch the 68k version. */ |
2491 |
|
|
|
2492 |
|
|
headerfile = fopen ("cputbl.h", "wb"); |
2493 |
|
|
stblfile = fopen ("cpustbl.cpp", "wb"); |
2494 |
|
|
freopen ("cpuemu.cpp", "wb", stdout); |
2495 |
|
|
|
2496 |
|
|
generate_includes (stdout); |
2497 |
|
|
generate_includes (stblfile); |
2498 |
|
|
|
2499 |
|
|
generate_func (); |
2500 |
|
|
|
2501 |
|
|
free (table68k); |
2502 |
|
|
return 0; |
2503 |
|
|
} |