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root/cebix/BasiliskII/src/uae_cpu/gencpu.c
Revision: 1.12
Committed: 2001-03-19T13:11:40Z (23 years, 7 months ago) by gbeauche
Content type: text/plain
Branch: MAIN
Changes since 1.11: +31 -10 lines
Log Message:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)

Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
  only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'

File Contents

# User Rev Content
1 cebix 1.1 /*
2     * UAE - The Un*x Amiga Emulator
3     *
4     * MC68000 emulation generator
5     *
6     * This is a fairly stupid program that generates a lot of case labels that
7     * can be #included in a switch statement.
8     * As an alternative, it can generate functions that handle specific
9     * MC68000 instructions, plus a prototype header file and a function pointer
10     * array to look up the function for an opcode.
11     * Error checking is bad, an illegal table68k file will cause the program to
12     * call abort().
13     * The generated code is sometimes sub-optimal, an optimizing compiler should
14     * take care of this.
15     *
16     * Copyright 1995, 1996 Bernd Schmidt
17     */
18    
19     #include <ctype.h>
20     #include <stdio.h>
21     #include <stdlib.h>
22     #include <string.h>
23    
24     #include "sysdeps.h"
25     #include "readcpu.h"
26    
27 cebix 1.2 #if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28     #define SPARC_ASSEMBLY 0
29     #endif
30    
31 cebix 1.1 #define BOOL_TYPE "int"
32    
33     static FILE *headerfile;
34     static FILE *stblfile;
35    
36     static int using_prefetch;
37     static int using_exception_3;
38     static int cpu_level;
39    
40     /* For the current opcode, the next lower level that will have different code.
41     * Initialized to -1 for each opcode. If it remains unchanged, indicates we
42     * are done with that opcode. */
43     static int next_cpu_level;
44    
45     static int *opcode_map;
46     static int *opcode_next_clev;
47     static int *opcode_last_postfix;
48     static unsigned long *counts;
49    
50     static void read_counts (void)
51     {
52     FILE *file;
53     unsigned long opcode, count, total;
54     char name[20];
55     int nr = 0;
56     memset (counts, 0, 65536 * sizeof *counts);
57    
58     file = fopen ("frequent.68k", "r");
59     if (file) {
60     fscanf (file, "Total: %lu\n", &total);
61     while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
62 cebix 1.6 opcode_next_clev[nr] = 4;
63 cebix 1.1 opcode_last_postfix[nr] = -1;
64     opcode_map[nr++] = opcode;
65     counts[opcode] = count;
66     }
67     fclose (file);
68     }
69     if (nr == nr_cpuop_funcs)
70     return;
71     for (opcode = 0; opcode < 0x10000; opcode++) {
72     if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
73     && counts[opcode] == 0)
74     {
75 cebix 1.6 opcode_next_clev[nr] = 4;
76 cebix 1.1 opcode_last_postfix[nr] = -1;
77     opcode_map[nr++] = opcode;
78     counts[opcode] = count;
79     }
80     }
81     if (nr != nr_cpuop_funcs)
82     abort ();
83     }
84    
85     static char endlabelstr[80];
86     static int endlabelno = 0;
87     static int need_endlabel;
88    
89     static int n_braces = 0;
90     static int m68k_pc_offset = 0;
91     static int insn_n_cycles;
92    
93     static void start_brace (void)
94     {
95     n_braces++;
96     printf ("{");
97     }
98    
99     static void close_brace (void)
100     {
101     assert (n_braces > 0);
102     n_braces--;
103     printf ("}");
104     }
105    
106     static void finish_braces (void)
107     {
108     while (n_braces > 0)
109     close_brace ();
110     }
111    
112     static void pop_braces (int to)
113     {
114     while (n_braces > to)
115     close_brace ();
116     }
117    
118     static int bit_size (int size)
119     {
120     switch (size) {
121     case sz_byte: return 8;
122     case sz_word: return 16;
123     case sz_long: return 32;
124     default: abort ();
125     }
126     return 0;
127     }
128    
129     static const char *bit_mask (int size)
130     {
131     switch (size) {
132     case sz_byte: return "0xff";
133     case sz_word: return "0xffff";
134     case sz_long: return "0xffffffff";
135     default: abort ();
136     }
137     return 0;
138     }
139    
140     static const char *gen_nextilong (void)
141     {
142     static char buffer[80];
143     int r = m68k_pc_offset;
144     m68k_pc_offset += 4;
145    
146     insn_n_cycles += 4;
147    
148     if (using_prefetch)
149     sprintf (buffer, "get_ilong_prefetch(%d)", r);
150     else
151     sprintf (buffer, "get_ilong(%d)", r);
152     return buffer;
153     }
154    
155     static const char *gen_nextiword (void)
156     {
157     static char buffer[80];
158     int r = m68k_pc_offset;
159     m68k_pc_offset += 2;
160    
161     insn_n_cycles += 2;
162    
163     if (using_prefetch)
164     sprintf (buffer, "get_iword_prefetch(%d)", r);
165     else
166     sprintf (buffer, "get_iword(%d)", r);
167     return buffer;
168     }
169    
170     static const char *gen_nextibyte (void)
171     {
172     static char buffer[80];
173     int r = m68k_pc_offset;
174     m68k_pc_offset += 2;
175    
176     insn_n_cycles += 2;
177    
178     if (using_prefetch)
179     sprintf (buffer, "get_ibyte_prefetch(%d)", r);
180     else
181     sprintf (buffer, "get_ibyte(%d)", r);
182     return buffer;
183     }
184    
185     static void fill_prefetch_0 (void)
186     {
187     if (using_prefetch)
188     printf ("fill_prefetch_0 ();\n");
189     }
190    
191     static void fill_prefetch_2 (void)
192     {
193     if (using_prefetch)
194     printf ("fill_prefetch_2 ();\n");
195     }
196    
197     static void swap_opcode (void)
198     {
199     printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
200     printf ("\topcode = ((opcode << 8) & 0xFF00) | ((opcode >> 8) & 0xFF);\n");
201     printf ("#endif\n");
202     }
203    
204     static void sync_m68k_pc (void)
205     {
206     if (m68k_pc_offset == 0)
207     return;
208     printf ("m68k_incpc(%d);\n", m68k_pc_offset);
209     switch (m68k_pc_offset) {
210     case 0:
211     /*fprintf (stderr, "refilling prefetch at 0\n"); */
212     break;
213     case 2:
214     fill_prefetch_2 ();
215     break;
216     default:
217     fill_prefetch_0 ();
218     break;
219     }
220     m68k_pc_offset = 0;
221     }
222    
223     /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224 gbeauche 1.12 * the calling routine handles Apdi and Aipi modes.
225     * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
226 cebix 1.1 static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
227     {
228     start_brace ();
229     switch (mode) {
230     case Dreg:
231     if (movem)
232     abort ();
233     if (getv == 1)
234     switch (size) {
235     case sz_byte:
236 cebix 1.10 #if defined(AMIGA) && !defined(WARPUP)
237 cebix 1.1 /* sam: I don't know why gcc.2.7.2.1 produces a code worse */
238     /* if it is not done like that: */
239     printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg);
240     #else
241     printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
242     #endif
243     break;
244     case sz_word:
245 cebix 1.10 #if defined(AMIGA) && !defined(WARPUP)
246 cebix 1.1 printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg);
247     #else
248     printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
249     #endif
250     break;
251     case sz_long:
252     printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
253     break;
254     default:
255     abort ();
256     }
257     return;
258     case Areg:
259     if (movem)
260     abort ();
261     if (getv == 1)
262     switch (size) {
263     case sz_word:
264     printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
265     break;
266     case sz_long:
267     printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
268     break;
269     default:
270     abort ();
271     }
272     return;
273     case Aind:
274     printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
275     break;
276     case Aipi:
277     printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
278     break;
279     case Apdi:
280     switch (size) {
281     case sz_byte:
282     if (movem)
283     printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
284     else
285     printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
286     break;
287     case sz_word:
288     printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
289     break;
290     case sz_long:
291     printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
292     break;
293     default:
294     abort ();
295     }
296     break;
297     case Ad16:
298     printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
299     break;
300     case Ad8r:
301     if (cpu_level > 1) {
302     if (next_cpu_level < 1)
303     next_cpu_level = 1;
304     sync_m68k_pc ();
305     start_brace ();
306     printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
307     } else
308     printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
309    
310     break;
311     case PC16:
312     printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
313     printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
314     break;
315     case PC8r:
316     if (cpu_level > 1) {
317     if (next_cpu_level < 1)
318     next_cpu_level = 1;
319     sync_m68k_pc ();
320     start_brace ();
321     printf ("\tuaecptr tmppc = m68k_getpc();\n");
322     printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
323     } else {
324     printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
325     printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
326     }
327    
328     break;
329     case absw:
330     printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
331     break;
332     case absl:
333     printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
334     break;
335     case imm:
336     if (getv != 1)
337     abort ();
338     switch (size) {
339     case sz_byte:
340     printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
341     break;
342     case sz_word:
343     printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
344     break;
345     case sz_long:
346     printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
347     break;
348     default:
349     abort ();
350     }
351     return;
352     case imm0:
353     if (getv != 1)
354     abort ();
355     printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
356     return;
357     case imm1:
358     if (getv != 1)
359     abort ();
360     printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
361     return;
362     case imm2:
363     if (getv != 1)
364     abort ();
365     printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
366     return;
367     case immi:
368     if (getv != 1)
369     abort ();
370     printf ("\tuae_u32 %s = %s;\n", name, reg);
371     return;
372     default:
373     abort ();
374     }
375    
376     /* We get here for all non-reg non-immediate addressing modes to
377     * actually fetch the value. */
378    
379     if (using_exception_3 && getv != 0 && size != sz_byte) {
380     printf ("\tif ((%sa & 1) != 0) {\n", name);
381     printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
382     printf ("\t\tlast_op_for_exception_3 = opcode;\n");
383     printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
384     printf ("\t\tException(3, 0);\n");
385     printf ("\t\tgoto %s;\n", endlabelstr);
386     printf ("\t}\n");
387     need_endlabel = 1;
388     start_brace ();
389     }
390    
391     if (getv == 1) {
392     switch (size) {
393     case sz_byte: insn_n_cycles += 2; break;
394     case sz_word: insn_n_cycles += 2; break;
395     case sz_long: insn_n_cycles += 4; break;
396     default: abort ();
397     }
398     start_brace ();
399     switch (size) {
400     case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
401     case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
402     case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
403     default: abort ();
404     }
405     }
406    
407     /* We now might have to fix up the register for pre-dec or post-inc
408     * addressing modes. */
409     if (!movem)
410     switch (mode) {
411     case Aipi:
412     switch (size) {
413     case sz_byte:
414     printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
415     break;
416     case sz_word:
417     printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
418     break;
419     case sz_long:
420     printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
421     break;
422     default:
423     abort ();
424     }
425     break;
426     case Apdi:
427     printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
428     break;
429     default:
430     break;
431     }
432     }
433    
434     static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
435     {
436     switch (mode) {
437     case Dreg:
438     switch (size) {
439     case sz_byte:
440     printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
441     break;
442     case sz_word:
443     printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
444     break;
445     case sz_long:
446     printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
447     break;
448     default:
449     abort ();
450     }
451     break;
452     case Areg:
453     switch (size) {
454     case sz_word:
455     fprintf (stderr, "Foo\n");
456     printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
457     break;
458     case sz_long:
459     printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
460     break;
461     default:
462     abort ();
463     }
464     break;
465     case Aind:
466     case Aipi:
467     case Apdi:
468     case Ad16:
469     case Ad8r:
470     case absw:
471     case absl:
472     case PC16:
473     case PC8r:
474     if (using_prefetch)
475     sync_m68k_pc ();
476     switch (size) {
477     case sz_byte:
478     insn_n_cycles += 2;
479     printf ("\tput_byte(%sa,%s);\n", to, from);
480     break;
481     case sz_word:
482     insn_n_cycles += 2;
483     if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
484     abort ();
485     printf ("\tput_word(%sa,%s);\n", to, from);
486     break;
487     case sz_long:
488     insn_n_cycles += 4;
489     if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
490     abort ();
491     printf ("\tput_long(%sa,%s);\n", to, from);
492     break;
493     default:
494     abort ();
495     }
496     break;
497     case imm:
498     case imm0:
499     case imm1:
500     case imm2:
501     case immi:
502     abort ();
503     break;
504     default:
505     abort ();
506     }
507     }
508    
509     static void genmovemel (uae_u16 opcode)
510     {
511     char getcode[100];
512     int size = table68k[opcode].size == sz_long ? 4 : 2;
513    
514     if (table68k[opcode].size == sz_long) {
515     strcpy (getcode, "get_long(srca)");
516     } else {
517     strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
518     }
519    
520     printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
521     printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
522     genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
523     start_brace ();
524     printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
525     getcode, size);
526     printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
527     getcode, size);
528    
529     if (table68k[opcode].dmode == Aipi)
530     printf ("\tm68k_areg(regs, dstreg) = srca;\n");
531     }
532    
533     static void genmovemle (uae_u16 opcode)
534     {
535     char putcode[100];
536     int size = table68k[opcode].size == sz_long ? 4 : 2;
537     if (table68k[opcode].size == sz_long) {
538     strcpy (putcode, "put_long(srca,");
539     } else {
540     strcpy (putcode, "put_word(srca,");
541     }
542    
543     printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
544     genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
545     if (using_prefetch)
546     sync_m68k_pc ();
547    
548     start_brace ();
549     if (table68k[opcode].dmode == Apdi) {
550     printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
551     printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
552     size, putcode);
553     printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
554     size, putcode);
555     printf ("\tm68k_areg(regs, dstreg) = srca;\n");
556     } else {
557     printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
558     printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
559     putcode, size);
560     printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
561     putcode, size);
562     }
563     }
564    
565     static void duplicate_carry (void)
566     {
567     printf ("\tCOPY_CARRY;\n");
568     }
569    
570     typedef enum {
571     flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
572     flag_av, flag_sv
573     } flagtypes;
574    
575     static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
576     {
577     char vstr[100], sstr[100], dstr[100];
578     char usstr[100], udstr[100];
579     char unsstr[100], undstr[100];
580    
581     switch (size) {
582     case sz_byte:
583     strcpy (vstr, "((uae_s8)(");
584     strcpy (usstr, "((uae_u8)(");
585     break;
586     case sz_word:
587     strcpy (vstr, "((uae_s16)(");
588     strcpy (usstr, "((uae_u16)(");
589     break;
590     case sz_long:
591     strcpy (vstr, "((uae_s32)(");
592     strcpy (usstr, "((uae_u32)(");
593     break;
594     default:
595     abort ();
596     }
597     strcpy (unsstr, usstr);
598    
599     strcpy (sstr, vstr);
600     strcpy (dstr, vstr);
601     strcat (vstr, value);
602     strcat (vstr, "))");
603     strcat (dstr, dst);
604     strcat (dstr, "))");
605     strcat (sstr, src);
606     strcat (sstr, "))");
607    
608     strcpy (udstr, usstr);
609     strcat (udstr, dst);
610     strcat (udstr, "))");
611     strcat (usstr, src);
612     strcat (usstr, "))");
613    
614     strcpy (undstr, unsstr);
615     strcat (unsstr, "-");
616     strcat (undstr, "~");
617     strcat (undstr, dst);
618     strcat (undstr, "))");
619     strcat (unsstr, src);
620     strcat (unsstr, "))");
621    
622     switch (type) {
623     case flag_logical_noclobber:
624     case flag_logical:
625     case flag_zn:
626     case flag_av:
627     case flag_sv:
628     case flag_addx:
629     case flag_subx:
630     break;
631    
632     case flag_add:
633     start_brace ();
634     printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
635     break;
636     case flag_sub:
637     case flag_cmp:
638     start_brace ();
639     printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
640     break;
641     }
642    
643     switch (type) {
644     case flag_logical_noclobber:
645     case flag_logical:
646     case flag_zn:
647     break;
648    
649     case flag_add:
650     case flag_sub:
651     case flag_addx:
652     case flag_subx:
653     case flag_cmp:
654     case flag_av:
655     case flag_sv:
656     start_brace ();
657     printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
658     printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
659     printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
660     break;
661     }
662    
663     switch (type) {
664     case flag_logical:
665     printf ("\tCLEAR_CZNV;\n");
666     printf ("\tSET_ZFLG (%s == 0);\n", vstr);
667     printf ("\tSET_NFLG (%s < 0);\n", vstr);
668     break;
669     case flag_logical_noclobber:
670     printf ("\tSET_ZFLG (%s == 0);\n", vstr);
671     printf ("\tSET_NFLG (%s < 0);\n", vstr);
672     break;
673     case flag_av:
674     printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
675     break;
676     case flag_sv:
677     printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
678     break;
679     case flag_zn:
680     printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
681     printf ("\tSET_NFLG (%s < 0);\n", vstr);
682     break;
683     case flag_add:
684     printf ("\tSET_ZFLG (%s == 0);\n", vstr);
685     printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
686     printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
687     duplicate_carry ();
688     printf ("\tSET_NFLG (flgn != 0);\n");
689     break;
690     case flag_sub:
691     printf ("\tSET_ZFLG (%s == 0);\n", vstr);
692     printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
693     printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
694     duplicate_carry ();
695     printf ("\tSET_NFLG (flgn != 0);\n");
696     break;
697     case flag_addx:
698     printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
699     printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
700     duplicate_carry ();
701     break;
702     case flag_subx:
703     printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
704     printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
705     duplicate_carry ();
706     break;
707     case flag_cmp:
708     printf ("\tSET_ZFLG (%s == 0);\n", vstr);
709     printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
710     printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
711     printf ("\tSET_NFLG (flgn != 0);\n");
712     break;
713     }
714     }
715    
716     static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717     {
718 cebix 1.2 #ifdef SPARC_V8_ASSEMBLY
719     switch(type)
720     {
721     case flag_add:
722     start_brace();
723     printf("\tuae_u32 %s;\n", value);
724     switch(size)
725     {
726     case sz_byte:
727 cebix 1.8 printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
728 cebix 1.2 break;
729     case sz_word:
730 cebix 1.8 printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
731 cebix 1.2 break;
732     case sz_long:
733 cebix 1.8 printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
734 cebix 1.2 break;
735     }
736     return;
737 cebix 1.8
738     case flag_sub:
739     start_brace();
740     printf("\tuae_u32 %s;\n", value);
741     switch(size)
742     {
743     case sz_byte:
744     printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
745     break;
746     case sz_word:
747     printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
748     break;
749     case sz_long:
750     printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
751     break;
752     }
753     return;
754    
755     case flag_cmp:
756     switch(size)
757     {
758     case sz_byte:
759     // printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
760     break;
761     case sz_word:
762     // printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
763     break;
764     case sz_long:
765     #if 1
766     printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
767     return;
768     #endif
769     break;
770     }
771     // return;
772     break;
773 cebix 1.2 }
774     #elif defined(SPARC_V9_ASSEMBLY)
775     switch(type)
776     {
777     case flag_add:
778     start_brace();
779     printf("\tuae_u32 %s;\n", value);
780     switch(size)
781     {
782     case sz_byte:
783     printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
784     break;
785     case sz_word:
786     printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
787     break;
788     case sz_long:
789     printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
790     break;
791     }
792     return;
793    
794     case flag_sub:
795     start_brace();
796     printf("\tuae_u32 %s;\n", value);
797     switch(size)
798     {
799     case sz_byte:
800     printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
801     break;
802     case sz_word:
803     printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
804     break;
805     case sz_long:
806     printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
807     break;
808     }
809     return;
810    
811     case flag_cmp:
812     switch(size)
813     {
814     case sz_byte:
815     printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
816     break;
817     case sz_word:
818     printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
819     break;
820     case sz_long:
821     printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
822     break;
823     }
824     return;
825    
826     case flag_logical:
827     if (strcmp(value, "0") == 0) {
828     printf("\tregflags.nzvc = 0x04;\n");
829     } else {
830     switch(size) {
831     case sz_byte:
832     printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
833     break;
834     case sz_word:
835     printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
836     break;
837     case sz_long:
838     printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
839     break;
840     }
841     }
842     return;
843    
844     #if 0
845     case flag_logical_noclobber:
846     printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
847     if (strcmp(value, "0") == 0) {
848     printf("\tregflags.nzvc = old_flags | 0x04;\n");
849     } else {
850     switch(size) {
851     case sz_byte:
852     printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
853     break;
854     case sz_word:
855     printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
856     break;
857     case sz_long:
858     printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
859     break;
860     }
861     printf("\tregflags.nzvc |= old_flags;\n");
862     }
863     printf("\t}\n");
864     return;
865     #endif
866     }
867     #elif defined(X86_ASSEMBLY)
868 cebix 1.1 switch (type) {
869     case flag_add:
870     case flag_sub:
871     start_brace ();
872     printf ("\tuae_u32 %s;\n", value);
873     break;
874    
875     default:
876     break;
877     }
878    
879     /* At least some of those casts are fairly important! */
880     switch (type) {
881     case flag_logical_noclobber:
882     printf ("\t{uae_u32 oldcznv = regflags.cznv & ~0xC0;\n");
883     if (strcmp (value, "0") == 0) {
884     printf ("\tregflags.cznv = olcznv | 64;\n");
885     } else {
886     switch (size) {
887     case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
888     case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
889     case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
890     }
891     printf ("\tregflags.cznv |= oldcznv;\n");
892     }
893     printf ("\t}\n");
894     return;
895     case flag_logical:
896     if (strcmp (value, "0") == 0) {
897     printf ("\tregflags.cznv = 64;\n");
898     } else {
899     switch (size) {
900     case sz_byte: printf ("\tx86_flag_testb ((uae_s8)(%s));\n", value); break;
901     case sz_word: printf ("\tx86_flag_testw ((uae_s16)(%s));\n", value); break;
902     case sz_long: printf ("\tx86_flag_testl ((uae_s32)(%s));\n", value); break;
903     }
904     }
905     return;
906    
907     case flag_add:
908     switch (size) {
909     case sz_byte: printf ("\tx86_flag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
910     case sz_word: printf ("\tx86_flag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
911     case sz_long: printf ("\tx86_flag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
912     }
913     return;
914    
915     case flag_sub:
916     switch (size) {
917     case sz_byte: printf ("\tx86_flag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
918     case sz_word: printf ("\tx86_flag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
919     case sz_long: printf ("\tx86_flag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
920     }
921     return;
922    
923     case flag_cmp:
924     switch (size) {
925     case sz_byte: printf ("\tx86_flag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
926     case sz_word: printf ("\tx86_flag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
927     case sz_long: printf ("\tx86_flag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
928     }
929     return;
930    
931     default:
932     break;
933     }
934     #elif defined(M68K_FLAG_OPT)
935     /* sam: here I'm cloning what X86_ASSEMBLY does */
936     #define EXT(size) (size==sz_byte?"b":(size==sz_word?"w":"l"))
937     #define CAST(size) (size==sz_byte?"uae_s8":(size==sz_word?"uae_s16":"uae_s32"))
938     switch (type) {
939     case flag_add:
940     case flag_sub:
941     start_brace ();
942     printf ("\tuae_u32 %s;\n", value);
943     break;
944    
945     default:
946     break;
947     }
948    
949     switch (type) {
950     case flag_logical:
951     if (strcmp (value, "0") == 0) {
952     printf ("\t*(uae_u16 *)&regflags = 4;\n"); /* Z = 1 */
953     } else {
954     printf ("\tm68k_flag_tst (%s, (%s)(%s));\n",
955     EXT (size), CAST (size), value);
956     }
957     return;
958    
959     case flag_add:
960     printf ("\t{uae_u16 ccr;\n");
961     printf ("\tm68k_flag_add (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
962     EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
963     printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
964     return;
965    
966     case flag_sub:
967     printf ("\t{uae_u16 ccr;\n");
968     printf ("\tm68k_flag_sub (%s, (%s)%s, (%s)(%s), (%s)(%s));\n",
969     EXT (size), CAST (size), value, CAST (size), src, CAST (size), dst);
970     printf ("\t((uae_u16*)&regflags)[1]=((uae_u16*)&regflags)[0]=ccr;}\n");
971     return;
972    
973     case flag_cmp:
974     printf ("\tm68k_flag_cmp (%s, (%s)(%s), (%s)(%s));\n",
975     EXT (size), CAST (size), src, CAST (size), dst);
976     return;
977    
978     default:
979     break;
980     }
981     #elif defined(ACORN_FLAG_OPT) && defined(__GNUC_MINOR__)
982     /*
983     * This is new. Might be quite buggy.
984     */
985     switch (type) {
986     case flag_av:
987     case flag_sv:
988     case flag_zn:
989     case flag_addx:
990     case flag_subx:
991     break;
992    
993     case flag_logical:
994     if (strcmp (value, "0") == 0) {
995     /* v=c=n=0 z=1 */
996     printf ("\t*(ULONG*)&regflags = 0x40000000;\n");
997     return;
998     } else {
999     start_brace ();
1000     switch (size) {
1001     case sz_byte:
1002     printf ("\tUBYTE ccr;\n");
1003     printf ("\tULONG shift;\n");
1004     printf ("\t__asm__(\"mov %%2,%%1,lsl#24\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1005     "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value);
1006     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1007     return;
1008     case sz_word:
1009     printf ("\tUBYTE ccr;\n");
1010     printf ("\tULONG shift;\n");
1011     printf ("\t__asm__(\"mov %%2,%%1,lsl#16\n\ttst %%2,%%2\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1012     "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value);
1013     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1014     return;
1015     case sz_long:
1016     printf ("\tUBYTE ccr;\n");
1017     printf ("\t__asm__(\"tst %%1,%%1\n\tmov %%0,r15,lsr#24\n\tbic %%0,%%0,#0x30\"\n"
1018     "\t: \"=r\" (ccr) : \"r\" ((LONG)%s) : \"cc\" );\n", value);
1019     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1020     return;
1021     }
1022     }
1023     break;
1024     case flag_add:
1025     if (strcmp (dst, "0") == 0) {
1026     printf ("/* Error! Hier muss Peter noch was machen !!! (ADD-Flags) */");
1027     } else {
1028     start_brace ();
1029     switch (size) {
1030     case sz_byte:
1031     printf ("\tULONG ccr, shift, %s;\n", value);
1032     printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tadds %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1033     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1034     printf ("\t*(ULONG*)&regflags = ccr;\n");
1035     return;
1036     case sz_word:
1037     printf ("\tULONG ccr, shift, %s;\n", value);
1038     printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tadds %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1039     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1040     printf ("\t*(ULONG*)&regflags = ccr;\n");
1041     return;
1042     case sz_long:
1043     printf ("\tULONG ccr, %s;\n", value);
1044     printf ("\t__asm__(\"adds %%0,%%3,%%2\n\tmov %%1,r15\n\torr %%1,%%1,%%1,lsr#29\"\n"
1045     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1046     printf ("\t*(ULONG*)&regflags = ccr;\n");
1047     return;
1048     }
1049     }
1050     break;
1051     case flag_sub:
1052     if (strcmp (dst, "0") == 0) {
1053     printf ("/* Error! Hier muss Peter noch was machen !!! (SUB-Flags) */");
1054     } else {
1055     start_brace ();
1056     switch (size) {
1057     case sz_byte:
1058     printf ("\tULONG ccr, shift, %s;\n", value);
1059     printf ("\t__asm__(\"mov %%4,%%3,lsl#24\n\tsubs %%0,%%4,%%2,lsl#24\n\tmov %%0,%%0,asr#24\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1060     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1061     printf ("\t*(ULONG*)&regflags = ccr;\n");
1062     return;
1063     case sz_word:
1064     printf ("\tULONG ccr, shift, %s;\n", value);
1065     printf ("\t__asm__(\"mov %%4,%%3,lsl#16\n\tsubs %%0,%%4,%%2,lsl#16\n\tmov %%0,%%0,asr#16\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1066     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", value, src, dst);
1067     printf ("\t*(ULONG*)&regflags = ccr;\n");
1068     return;
1069     case sz_long:
1070     printf ("\tULONG ccr, %s;\n", value);
1071     printf ("\t__asm__(\"subs %%0,%%3,%%2\n\tmov %%1,r15\n\teor %%1,%%1,#0x20000000\n\torr %%1,%%1,%%1,lsr#29\"\n"
1072     "\t: \"=r\" (%s), \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", value, src, dst);
1073     printf ("\t*(ULONG*)&regflags = ccr;\n");
1074     return;
1075     }
1076     }
1077     break;
1078     case flag_cmp:
1079     if (strcmp (dst, "0") == 0) {
1080     printf ("/*Error! Hier muss Peter noch was machen !!! (CMP-Flags)*/");
1081     } else {
1082     start_brace ();
1083     switch (size) {
1084     case sz_byte:
1085     printf ("\tULONG shift, ccr;\n");
1086     printf ("\t__asm__(\"mov %%3,%%2,lsl#24\n\tcmp %%3,%%1,lsl#24\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1087     "\t: \"=r\" (ccr) : \"r\" (%s), \"r\" (%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1088     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1089     return;
1090     case sz_word:
1091     printf ("\tULONG shift, ccr;\n");
1092     printf ("\t__asm__(\"mov %%3,%%2,lsl#16\n\tcmp %%3,%%1,lsl#16\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1093     "\t: \"=r\" (ccr) : \"r\" ((WORD)%s), \"r\" ((WORD)%s), \"r\" (shift) : \"cc\" );\n", src, dst);
1094     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1095     return;
1096     case sz_long:
1097     printf ("\tULONG ccr;\n");
1098     printf ("\t__asm__(\"cmp %%2,%%1\n\tmov %%0,r15,lsr#24\n\teor %%0,%%0,#0x20\"\n"
1099     "\t: \"=r\" (ccr) : \"r\" ((LONG)%s), \"r\" ((LONG)%s) : \"cc\" );\n", src, dst);
1100     printf ("\t*((UBYTE*)&regflags+3) = ccr;\n");
1101     /*printf ("\tprintf (\"%%08x %%08x %%08x\\n\", %s, %s, *((ULONG*)&regflags));\n", src, dst); */
1102     return;
1103     }
1104     }
1105     break;
1106     }
1107     #endif
1108     genflags_normal (type, size, value, src, dst);
1109     }
1110    
1111     static void force_range_for_rox (const char *var, wordsizes size)
1112     {
1113     /* Could do a modulo operation here... which one is faster? */
1114     switch (size) {
1115     case sz_long:
1116     printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
1117     break;
1118     case sz_word:
1119     printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
1120     printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
1121     break;
1122     case sz_byte:
1123     printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
1124     printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
1125     printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
1126     break;
1127     }
1128     }
1129    
1130     static const char *cmask (wordsizes size)
1131     {
1132     switch (size) {
1133     case sz_byte: return "0x80";
1134     case sz_word: return "0x8000";
1135     case sz_long: return "0x80000000";
1136     default: abort ();
1137     }
1138     }
1139    
1140     static int source_is_imm1_8 (struct instr *i)
1141     {
1142     return i->stype == 3;
1143     }
1144    
1145     static void gen_opcode (unsigned long int opcode)
1146     {
1147     struct instr *curi = table68k + opcode;
1148     insn_n_cycles = 2;
1149    
1150     start_brace ();
1151     #if 0
1152     printf ("uae_u8 *m68k_pc = regs.pc_p;\n");
1153     #endif
1154     m68k_pc_offset = 2;
1155     switch (curi->plev) {
1156     case 0: /* not privileged */
1157     break;
1158     case 1: /* unprivileged only on 68000 */
1159     if (cpu_level == 0)
1160     break;
1161     if (next_cpu_level < 0)
1162     next_cpu_level = 0;
1163    
1164     /* fall through */
1165     case 2: /* priviledged */
1166     printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1167     need_endlabel = 1;
1168     start_brace ();
1169     break;
1170     case 3: /* privileged if size == word */
1171     if (curi->size == sz_byte)
1172     break;
1173     printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
1174     need_endlabel = 1;
1175     start_brace ();
1176     break;
1177     }
1178     switch (curi->mnemo) {
1179     case i_OR:
1180     case i_AND:
1181     case i_EOR:
1182     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1183     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1184     printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
1185     genflags (flag_logical, curi->size, "src", "", "");
1186     genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1187     break;
1188     case i_ORSR:
1189     case i_EORSR:
1190     printf ("\tMakeSR();\n");
1191     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1192     if (curi->size == sz_byte) {
1193     printf ("\tsrc &= 0xFF;\n");
1194     }
1195     printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1196     printf ("\tMakeFromSR();\n");
1197     break;
1198     case i_ANDSR:
1199     printf ("\tMakeSR();\n");
1200     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1201     if (curi->size == sz_byte) {
1202     printf ("\tsrc |= 0xFF00;\n");
1203     }
1204     printf ("\tregs.sr &= src;\n");
1205     printf ("\tMakeFromSR();\n");
1206     break;
1207     case i_SUB:
1208     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1209     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1210     start_brace ();
1211     genflags (flag_sub, curi->size, "newv", "src", "dst");
1212     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1213     break;
1214     case i_SUBA:
1215     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1216     genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1217     start_brace ();
1218     printf ("\tuae_u32 newv = dst - src;\n");
1219     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1220     break;
1221     case i_SUBX:
1222     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1223     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1224     start_brace ();
1225     printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
1226     genflags (flag_subx, curi->size, "newv", "src", "dst");
1227     genflags (flag_zn, curi->size, "newv", "", "");
1228     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1229     break;
1230     case i_SBCD:
1231     /* Let's hope this works... */
1232     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1233     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1234     start_brace ();
1235     printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1236     printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1237     printf ("\tuae_u16 newv;\n");
1238     printf ("\tint cflg;\n");
1239     printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1240     printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1241     printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1242     duplicate_carry ();
1243     printf ("\tif (cflg) newv -= 0x60;\n");
1244     genflags (flag_zn, curi->size, "newv", "", "");
1245     genflags (flag_sv, curi->size, "newv", "src", "dst");
1246     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1247     break;
1248     case i_ADD:
1249     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1250     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1251     start_brace ();
1252     genflags (flag_add, curi->size, "newv", "src", "dst");
1253     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1254     break;
1255     case i_ADDA:
1256     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1257     genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1258     start_brace ();
1259     printf ("\tuae_u32 newv = dst + src;\n");
1260     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1261     break;
1262     case i_ADDX:
1263     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1264     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1265     start_brace ();
1266     printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1267     genflags (flag_addx, curi->size, "newv", "src", "dst");
1268     genflags (flag_zn, curi->size, "newv", "", "");
1269     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1270     break;
1271     case i_ABCD:
1272     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1273     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1274     start_brace ();
1275     printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1276     printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1277     printf ("\tuae_u16 newv;\n");
1278     printf ("\tint cflg;\n");
1279     printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
1280     printf ("\tnewv = newv_hi + newv_lo;");
1281     printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n");
1282     duplicate_carry ();
1283     printf ("\tif (cflg) newv += 0x60;\n");
1284     genflags (flag_zn, curi->size, "newv", "", "");
1285     genflags (flag_sv, curi->size, "newv", "src", "dst");
1286     genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1287     break;
1288     case i_NEG:
1289     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1290     start_brace ();
1291     genflags (flag_sub, curi->size, "dst", "src", "0");
1292     genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1293     break;
1294     case i_NEGX:
1295     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1296     start_brace ();
1297     printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1298     genflags (flag_subx, curi->size, "newv", "src", "0");
1299     genflags (flag_zn, curi->size, "newv", "", "");
1300     genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1301     break;
1302     case i_NBCD:
1303     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1304     start_brace ();
1305     printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1306     printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1307     printf ("\tuae_u16 newv;\n");
1308     printf ("\tint cflg;\n");
1309     printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1310     printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1311     printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n");
1312     duplicate_carry();
1313     printf ("\tif (cflg) newv -= 0x60;\n");
1314     genflags (flag_zn, curi->size, "newv", "", "");
1315     genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1316     break;
1317     case i_CLR:
1318     genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1319     genflags (flag_logical, curi->size, "0", "", "");
1320     genastore ("0", curi->smode, "srcreg", curi->size, "src");
1321     break;
1322     case i_NOT:
1323     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1324     start_brace ();
1325     printf ("\tuae_u32 dst = ~src;\n");
1326     genflags (flag_logical, curi->size, "dst", "", "");
1327     genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1328     break;
1329     case i_TST:
1330     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1331     genflags (flag_logical, curi->size, "src", "", "");
1332     break;
1333     case i_BTST:
1334     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1335     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1336     if (curi->size == sz_byte)
1337     printf ("\tsrc &= 7;\n");
1338     else
1339     printf ("\tsrc &= 31;\n");
1340     printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1341     break;
1342     case i_BCHG:
1343     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1344     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1345     if (curi->size == sz_byte)
1346     printf ("\tsrc &= 7;\n");
1347     else
1348     printf ("\tsrc &= 31;\n");
1349     printf ("\tdst ^= (1 << src);\n");
1350     printf ("\tSET_ZFLG ((dst & (1 << src)) >> src);\n");
1351     genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1352     break;
1353     case i_BCLR:
1354     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1355     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1356     if (curi->size == sz_byte)
1357     printf ("\tsrc &= 7;\n");
1358     else
1359     printf ("\tsrc &= 31;\n");
1360     printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1361     printf ("\tdst &= ~(1 << src);\n");
1362     genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1363     break;
1364     case i_BSET:
1365     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1366     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1367     if (curi->size == sz_byte)
1368     printf ("\tsrc &= 7;\n");
1369     else
1370     printf ("\tsrc &= 31;\n");
1371     printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1372     printf ("\tdst |= (1 << src);\n");
1373     genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1374     break;
1375     case i_CMPM:
1376     case i_CMP:
1377     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1378     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1379     start_brace ();
1380     genflags (flag_cmp, curi->size, "newv", "src", "dst");
1381     break;
1382     case i_CMPA:
1383     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1384     genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1385     start_brace ();
1386     genflags (flag_cmp, sz_long, "newv", "src", "dst");
1387     break;
1388     /* The next two are coded a little unconventional, but they are doing
1389     * weird things... */
1390     case i_MVPRM:
1391     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1392    
1393     printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1394     if (curi->size == sz_word) {
1395     printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1396     } else {
1397     printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1398     printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1399     }
1400     break;
1401     case i_MVPMR:
1402     printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1403     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1404     if (curi->size == sz_word) {
1405     printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1406     } else {
1407     printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1408     printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1409     }
1410     genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1411     break;
1412     case i_MOVE:
1413     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1414     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1415     genflags (flag_logical, curi->size, "src", "", "");
1416     genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1417     break;
1418     case i_MOVEA:
1419     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1420     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1421     if (curi->size == sz_word) {
1422     printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1423     } else {
1424     printf ("\tuae_u32 val = src;\n");
1425     }
1426     genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1427     break;
1428     case i_MVSR2:
1429     genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1430     printf ("\tMakeSR();\n");
1431     if (curi->size == sz_byte)
1432     genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1433     else
1434     genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1435     break;
1436     case i_MV2SR:
1437     genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1438     if (curi->size == sz_byte)
1439     printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1440     else {
1441     printf ("\tregs.sr = src;\n");
1442     }
1443     printf ("\tMakeFromSR();\n");
1444     break;
1445     case i_SWAP:
1446     genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1447     start_brace ();
1448     printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1449     genflags (flag_logical, sz_long, "dst", "", "");
1450     genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1451     break;
1452     case i_EXG:
1453     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1454     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1455     genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1456     genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1457     break;
1458     case i_EXT:
1459     genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1460     start_brace ();
1461     switch (curi->size) {
1462     case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1463     case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1464     case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1465     default: abort ();
1466     }
1467     genflags (flag_logical,
1468     curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1469     genastore ("dst", curi->smode, "srcreg",
1470     curi->size == sz_word ? sz_word : sz_long, "src");
1471     break;
1472     case i_MVMEL:
1473     genmovemel (opcode);
1474     break;
1475     case i_MVMLE:
1476     genmovemle (opcode);
1477     break;
1478     case i_TRAP:
1479     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1480     sync_m68k_pc ();
1481     printf ("\tException(src+32,0);\n");
1482     m68k_pc_offset = 0;
1483     break;
1484     case i_MVR2USP:
1485     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1486     printf ("\tregs.usp = src;\n");
1487     break;
1488     case i_MVUSP2R:
1489     genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1490     genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1491     break;
1492     case i_RESET:
1493     break;
1494     case i_NOP:
1495     break;
1496     case i_STOP:
1497     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1498     printf ("\tregs.sr = src;\n");
1499     printf ("\tMakeFromSR();\n");
1500     printf ("\tm68k_setstopped(1);\n");
1501     break;
1502     case i_RTE:
1503     if (cpu_level == 0) {
1504     genamode (Aipi, "7", sz_word, "sr", 1, 0);
1505     genamode (Aipi, "7", sz_long, "pc", 1, 0);
1506     printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1507     fill_prefetch_0 ();
1508     printf ("\tMakeFromSR();\n");
1509     } else {
1510     int old_brace_level = n_braces;
1511     if (next_cpu_level < 0)
1512     next_cpu_level = 0;
1513     printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1514     genamode (Aipi, "7", sz_word, "sr", 1, 0);
1515     genamode (Aipi, "7", sz_long, "pc", 1, 0);
1516     genamode (Aipi, "7", sz_word, "format", 1, 0);
1517     printf ("\tnewsr = sr; newpc = pc;\n");
1518     printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1519     printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1520     printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1521 cebix 1.6 printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1522     printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1523 cebix 1.1 printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1524     printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1525     printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1526     printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1527     printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1528     printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1529     pop_braces (old_brace_level);
1530     printf ("\tregs.sr = newsr; MakeFromSR();\n");
1531     printf ("\tm68k_setpc_rte(newpc);\n");
1532     fill_prefetch_0 ();
1533     need_endlabel = 1;
1534     }
1535     /* PC is set and prefetch filled. */
1536     m68k_pc_offset = 0;
1537     break;
1538     case i_RTD:
1539     printf ("\tcompiler_flush_jsr_stack();\n");
1540     genamode (Aipi, "7", sz_long, "pc", 1, 0);
1541     genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1542     printf ("\tm68k_areg(regs, 7) += offs;\n");
1543     printf ("\tm68k_setpc_rte(pc);\n");
1544     fill_prefetch_0 ();
1545     /* PC is set and prefetch filled. */
1546     m68k_pc_offset = 0;
1547     break;
1548     case i_LINK:
1549     genamode (Apdi, "7", sz_long, "old", 2, 0);
1550     genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1551     genastore ("src", Apdi, "7", sz_long, "old");
1552     genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1553     genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1554     printf ("\tm68k_areg(regs, 7) += offs;\n");
1555     break;
1556     case i_UNLK:
1557     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1558     printf ("\tm68k_areg(regs, 7) = src;\n");
1559     genamode (Aipi, "7", sz_long, "old", 1, 0);
1560     genastore ("old", curi->smode, "srcreg", curi->size, "src");
1561     break;
1562     case i_RTS:
1563     printf ("\tm68k_do_rts();\n");
1564     fill_prefetch_0 ();
1565     m68k_pc_offset = 0;
1566     break;
1567     case i_TRAPV:
1568     sync_m68k_pc ();
1569     printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1570     need_endlabel = 1;
1571     break;
1572     case i_RTR:
1573     printf ("\tcompiler_flush_jsr_stack();\n");
1574     printf ("\tMakeSR();\n");
1575     genamode (Aipi, "7", sz_word, "sr", 1, 0);
1576     genamode (Aipi, "7", sz_long, "pc", 1, 0);
1577     printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1578     printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1579     fill_prefetch_0 ();
1580     printf ("\tMakeFromSR();\n");
1581     m68k_pc_offset = 0;
1582     break;
1583     case i_JSR:
1584     genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1585     printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1586     fill_prefetch_0 ();
1587     m68k_pc_offset = 0;
1588     break;
1589     case i_JMP:
1590     genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1591     printf ("\tm68k_setpc(srca);\n");
1592     fill_prefetch_0 ();
1593     m68k_pc_offset = 0;
1594     break;
1595     case i_BSR:
1596     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1597     printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1598     if (using_exception_3) {
1599     printf ("\tif (src & 1) {\n");
1600     printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1601     printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1602     printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1603     printf ("\t}\n");
1604     need_endlabel = 1;
1605     }
1606     printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1607     fill_prefetch_0 ();
1608     m68k_pc_offset = 0;
1609     break;
1610     case i_Bcc:
1611     if (curi->size == sz_long) {
1612     if (cpu_level < 2) {
1613     printf ("\tm68k_incpc(2);\n");
1614     printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1615     printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1616     printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1617     printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1618     need_endlabel = 1;
1619     } else {
1620     if (next_cpu_level < 1)
1621     next_cpu_level = 1;
1622     }
1623     }
1624     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1625     printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1626     if (using_exception_3) {
1627     printf ("\tif (src & 1) {\n");
1628     printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1629     printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1630     printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1631     printf ("\t}\n");
1632     need_endlabel = 1;
1633     }
1634     #ifdef USE_COMPILER
1635     printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1636     #else
1637     printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1638     #endif
1639     fill_prefetch_0 ();
1640     printf ("\tgoto %s;\n", endlabelstr);
1641     printf ("didnt_jump:;\n");
1642     need_endlabel = 1;
1643     break;
1644     case i_LEA:
1645     genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1646     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1647     genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1648     break;
1649     case i_PEA:
1650     genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1651     genamode (Apdi, "7", sz_long, "dst", 2, 0);
1652     genastore ("srca", Apdi, "7", sz_long, "dst");
1653     break;
1654     case i_DBcc:
1655     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1656     genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1657    
1658     printf ("\tif (!cctrue(%d)) {\n", curi->cc);
1659     genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1660    
1661     printf ("\t\tif (src) {\n");
1662     if (using_exception_3) {
1663     printf ("\t\t\tif (offs & 1) {\n");
1664     printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1665     printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1666     printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1667     printf ("\t\t}\n");
1668     need_endlabel = 1;
1669     }
1670     #ifdef USE_COMPILER
1671     printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1672     #else
1673     printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1674     #endif
1675     fill_prefetch_0 ();
1676     printf ("\t\tgoto %s;\n", endlabelstr);
1677     printf ("\t\t}\n");
1678     printf ("\t}\n");
1679     need_endlabel = 1;
1680     break;
1681     case i_Scc:
1682     genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1683     start_brace ();
1684     printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1685     genastore ("val", curi->smode, "srcreg", curi->size, "src");
1686     break;
1687     case i_DIVU:
1688     printf ("\tuaecptr oldpc = m68k_getpc();\n");
1689     genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1690     genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1691     printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1692     printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1693     printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1694     /* The N flag appears to be set each time there is an overflow.
1695     * Weird. */
1696     printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1697     genflags (flag_logical, sz_word, "newv", "", "");
1698     printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1699     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1700     printf ("\t}\n");
1701     printf ("\t}\n");
1702     insn_n_cycles += 68;
1703     need_endlabel = 1;
1704     break;
1705     case i_DIVS:
1706     printf ("\tuaecptr oldpc = m68k_getpc();\n");
1707     genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1708     genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1709     printf ("\tif(src == 0) { Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1710     printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1711     printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1712     printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1713     printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1714     genflags (flag_logical, sz_word, "newv", "", "");
1715     printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1716     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1717     printf ("\t}\n");
1718     printf ("\t}\n");
1719     insn_n_cycles += 72;
1720     need_endlabel = 1;
1721     break;
1722     case i_MULU:
1723     genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1724     genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1725     start_brace ();
1726     printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1727     genflags (flag_logical, sz_long, "newv", "", "");
1728     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1729     insn_n_cycles += 32;
1730     break;
1731     case i_MULS:
1732     genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1733     genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1734     start_brace ();
1735     printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1736     genflags (flag_logical, sz_long, "newv", "", "");
1737     genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1738     insn_n_cycles += 32;
1739     break;
1740     case i_CHK:
1741     printf ("\tuaecptr oldpc = m68k_getpc();\n");
1742     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1743     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1744     printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1745     printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1746     need_endlabel = 1;
1747     break;
1748    
1749     case i_CHK2:
1750     printf ("\tuaecptr oldpc = m68k_getpc();\n");
1751     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1752     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1753     printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1754     switch (curi->size) {
1755     case sz_byte:
1756     printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1757     printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1758     break;
1759     case sz_word:
1760     printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1761     printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1762     break;
1763     case sz_long:
1764     printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1765     break;
1766     default:
1767     abort ();
1768     }
1769     printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1770     printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1771     printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1772     need_endlabel = 1;
1773     break;
1774    
1775     case i_ASR:
1776     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1777     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1778     start_brace ();
1779     switch (curi->size) {
1780     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1781     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1782     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1783     default: abort ();
1784     }
1785     printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1786     printf ("\tcnt &= 63;\n");
1787     printf ("\tCLEAR_CZNV;\n");
1788     printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1789     printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1790     printf ("\t\tSET_CFLG (sign);\n");
1791     duplicate_carry ();
1792     if (source_is_imm1_8 (curi))
1793     printf ("\t} else {\n");
1794     else
1795     printf ("\t} else if (cnt > 0) {\n");
1796     printf ("\t\tval >>= cnt - 1;\n");
1797     printf ("\t\tSET_CFLG (val & 1);\n");
1798     duplicate_carry ();
1799     printf ("\t\tval >>= 1;\n");
1800     printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1801     bit_mask (curi->size),
1802     bit_size (curi->size));
1803     printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1804     printf ("\t}\n");
1805     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1806     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1807     break;
1808     case i_ASL:
1809     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1810     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1811     start_brace ();
1812     switch (curi->size) {
1813     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1814     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1815     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1816     default: abort ();
1817     }
1818     printf ("\tcnt &= 63;\n");
1819     printf ("\tCLEAR_CZNV;\n");
1820     printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1821     printf ("\t\tSET_VFLG (val != 0);\n");
1822     printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1823     bit_size (curi->size));
1824     duplicate_carry ();
1825     printf ("\t\tval = 0;\n");
1826     if (source_is_imm1_8 (curi))
1827     printf ("\t} else {\n");
1828     else
1829     printf ("\t} else if (cnt > 0) {\n");
1830     printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1831     bit_mask (curi->size),
1832     bit_size (curi->size) - 1,
1833     bit_mask (curi->size));
1834     printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1835     printf ("\t\tval <<= cnt - 1;\n");
1836     printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1837     duplicate_carry ();
1838     printf ("\t\tval <<= 1;\n");
1839     printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1840     printf ("\t}\n");
1841     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1842     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1843     break;
1844     case i_LSR:
1845     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1846     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1847     start_brace ();
1848     switch (curi->size) {
1849     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1850     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1851     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1852     default: abort ();
1853     }
1854     printf ("\tcnt &= 63;\n");
1855     printf ("\tCLEAR_CZNV;\n");
1856     printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1857     printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1858     bit_size (curi->size), bit_size (curi->size) - 1);
1859     duplicate_carry ();
1860     printf ("\t\tval = 0;\n");
1861     if (source_is_imm1_8 (curi))
1862     printf ("\t} else {\n");
1863     else
1864     printf ("\t} else if (cnt > 0) {\n");
1865     printf ("\t\tval >>= cnt - 1;\n");
1866     printf ("\t\tSET_CFLG (val & 1);\n");
1867     duplicate_carry ();
1868     printf ("\t\tval >>= 1;\n");
1869     printf ("\t}\n");
1870     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1871     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1872     break;
1873     case i_LSL:
1874     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1875     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1876     start_brace ();
1877     switch (curi->size) {
1878     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1879     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1880     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1881     default: abort ();
1882     }
1883     printf ("\tcnt &= 63;\n");
1884     printf ("\tCLEAR_CZNV;\n");
1885     printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1886     printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1887     bit_size (curi->size));
1888     duplicate_carry ();
1889     printf ("\t\tval = 0;\n");
1890     if (source_is_imm1_8 (curi))
1891     printf ("\t} else {\n");
1892     else
1893     printf ("\t} else if (cnt > 0) {\n");
1894     printf ("\t\tval <<= (cnt - 1);\n");
1895     printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1896     duplicate_carry ();
1897     printf ("\t\tval <<= 1;\n");
1898     printf ("\tval &= %s;\n", bit_mask (curi->size));
1899     printf ("\t}\n");
1900     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1901     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1902     break;
1903     case i_ROL:
1904     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1905     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1906     start_brace ();
1907     switch (curi->size) {
1908     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1909     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1910     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1911     default: abort ();
1912     }
1913     printf ("\tcnt &= 63;\n");
1914     printf ("\tCLEAR_CZNV;\n");
1915     if (source_is_imm1_8 (curi))
1916     printf ("{");
1917     else
1918     printf ("\tif (cnt > 0) {\n");
1919     printf ("\tuae_u32 loval;\n");
1920     printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1921     printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1922     printf ("\tval <<= cnt;\n");
1923     printf ("\tval |= loval;\n");
1924     printf ("\tval &= %s;\n", bit_mask (curi->size));
1925     printf ("\tSET_CFLG (val & 1);\n");
1926     printf ("}\n");
1927     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1928     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1929     break;
1930     case i_ROR:
1931     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1932     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1933     start_brace ();
1934     switch (curi->size) {
1935     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1936     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1937     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1938     default: abort ();
1939     }
1940     printf ("\tcnt &= 63;\n");
1941     printf ("\tCLEAR_CZNV;\n");
1942     if (source_is_imm1_8 (curi))
1943     printf ("{");
1944     else
1945     printf ("\tif (cnt > 0) {");
1946     printf ("\tuae_u32 hival;\n");
1947     printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1948     printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1949     printf ("\tval >>= cnt;\n");
1950     printf ("\tval |= hival;\n");
1951     printf ("\tval &= %s;\n", bit_mask (curi->size));
1952     printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1953     printf ("\t}\n");
1954     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1955     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1956     break;
1957     case i_ROXL:
1958     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1959     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1960     start_brace ();
1961     switch (curi->size) {
1962     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1963     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1964     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1965     default: abort ();
1966     }
1967     printf ("\tcnt &= 63;\n");
1968     printf ("\tCLEAR_CZNV;\n");
1969     if (! source_is_imm1_8 (curi))
1970     force_range_for_rox ("cnt", curi->size);
1971     if (source_is_imm1_8 (curi))
1972     printf ("{");
1973     else
1974     printf ("\tif (cnt > 0) {\n");
1975     printf ("\tcnt--;\n");
1976     printf ("\t{\n\tuae_u32 carry;\n");
1977     printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1978     printf ("\tcarry = loval & 1;\n");
1979     printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1980     printf ("\tSET_XFLG (carry);\n");
1981     printf ("\tval &= %s;\n", bit_mask (curi->size));
1982     printf ("\t} }\n");
1983     printf ("\tSET_CFLG (GET_XFLG);\n");
1984     genflags (flag_logical_noclobber, curi->size, "val", "", "");
1985     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1986     break;
1987     case i_ROXR:
1988     genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1989     genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1990     start_brace ();
1991     switch (curi->size) {
1992     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1993     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1994     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1995     default: abort ();
1996     }
1997     printf ("\tcnt &= 63;\n");
1998     printf ("\tCLEAR_CZNV;\n");
1999     if (! source_is_imm1_8 (curi))
2000     force_range_for_rox ("cnt", curi->size);
2001     if (source_is_imm1_8 (curi))
2002     printf ("{");
2003     else
2004     printf ("\tif (cnt > 0) {\n");
2005     printf ("\tcnt--;\n");
2006     printf ("\t{\n\tuae_u32 carry;\n");
2007     printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
2008     printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
2009     printf ("\tval >>= cnt;\n");
2010     printf ("\tcarry = val & 1;\n");
2011     printf ("\tval >>= 1;\n");
2012     printf ("\tval |= hival;\n");
2013     printf ("\tSET_XFLG (carry);\n");
2014     printf ("\tval &= %s;\n", bit_mask (curi->size));
2015     printf ("\t} }\n");
2016     printf ("\tSET_CFLG (GET_XFLG);\n");
2017     genflags (flag_logical_noclobber, curi->size, "val", "", "");
2018     genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2019     break;
2020     case i_ASRW:
2021     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2022     start_brace ();
2023     switch (curi->size) {
2024     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2025     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2026     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2027     default: abort ();
2028     }
2029     printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2030     printf ("\tuae_u32 cflg = val & 1;\n");
2031     printf ("\tval = (val >> 1) | sign;\n");
2032     genflags (flag_logical, curi->size, "val", "", "");
2033     printf ("\tSET_CFLG (cflg);\n");
2034     duplicate_carry ();
2035     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2036     break;
2037     case i_ASLW:
2038     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2039     start_brace ();
2040     switch (curi->size) {
2041     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2042     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2043     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2044     default: abort ();
2045     }
2046     printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2047     printf ("\tuae_u32 sign2;\n");
2048     printf ("\tval <<= 1;\n");
2049     genflags (flag_logical, curi->size, "val", "", "");
2050     printf ("\tsign2 = %s & val;\n", cmask (curi->size));
2051     printf ("\tSET_CFLG (sign != 0);\n");
2052     duplicate_carry ();
2053    
2054     printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
2055     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2056     break;
2057     case i_LSRW:
2058     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2059     start_brace ();
2060     switch (curi->size) {
2061     case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2062     case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2063     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2064     default: abort ();
2065     }
2066     printf ("\tuae_u32 carry = val & 1;\n");
2067     printf ("\tval >>= 1;\n");
2068     genflags (flag_logical, curi->size, "val", "", "");
2069     printf ("SET_CFLG (carry);\n");
2070     duplicate_carry ();
2071     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2072     break;
2073     case i_LSLW:
2074     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2075     start_brace ();
2076     switch (curi->size) {
2077     case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2078     case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2079     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2080     default: abort ();
2081     }
2082     printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2083     printf ("\tval <<= 1;\n");
2084     genflags (flag_logical, curi->size, "val", "", "");
2085     printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2086     duplicate_carry ();
2087     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2088     break;
2089     case i_ROLW:
2090     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2091     start_brace ();
2092     switch (curi->size) {
2093     case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2094     case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2095     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2096     default: abort ();
2097     }
2098     printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2099     printf ("\tval <<= 1;\n");
2100     printf ("\tif (carry) val |= 1;\n");
2101     genflags (flag_logical, curi->size, "val", "", "");
2102     printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2103     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2104     break;
2105     case i_RORW:
2106     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2107     start_brace ();
2108     switch (curi->size) {
2109     case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2110     case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2111     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2112     default: abort ();
2113     }
2114     printf ("\tuae_u32 carry = val & 1;\n");
2115     printf ("\tval >>= 1;\n");
2116     printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2117     genflags (flag_logical, curi->size, "val", "", "");
2118     printf ("SET_CFLG (carry);\n");
2119     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2120     break;
2121     case i_ROXLW:
2122     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2123     start_brace ();
2124     switch (curi->size) {
2125     case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2126     case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2127     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2128     default: abort ();
2129     }
2130     printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2131     printf ("\tval <<= 1;\n");
2132     printf ("\tif (GET_XFLG) val |= 1;\n");
2133     genflags (flag_logical, curi->size, "val", "", "");
2134     printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2135     duplicate_carry ();
2136     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2137     break;
2138     case i_ROXRW:
2139     genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2140     start_brace ();
2141     switch (curi->size) {
2142     case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2143     case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2144     case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2145     default: abort ();
2146     }
2147     printf ("\tuae_u32 carry = val & 1;\n");
2148     printf ("\tval >>= 1;\n");
2149     printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2150     genflags (flag_logical, curi->size, "val", "", "");
2151     printf ("SET_CFLG (carry);\n");
2152     duplicate_carry ();
2153     genastore ("val", curi->smode, "srcreg", curi->size, "data");
2154     break;
2155     case i_MOVEC2:
2156     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2157     start_brace ();
2158     printf ("\tint regno = (src >> 12) & 15;\n");
2159     printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2160     printf ("\tm68k_movec2(src & 0xFFF, regp);\n");
2161     break;
2162     case i_MOVE2C:
2163     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2164     start_brace ();
2165     printf ("\tint regno = (src >> 12) & 15;\n");
2166     printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2167     printf ("\tm68k_move2c(src & 0xFFF, regp);\n");
2168     break;
2169     case i_CAS:
2170     {
2171     int old_brace_level;
2172     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2173     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2174     start_brace ();
2175     printf ("\tint ru = (src >> 6) & 7;\n");
2176     printf ("\tint rc = src & 7;\n");
2177     genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2178     printf ("\tif (GET_ZFLG)");
2179     old_brace_level = n_braces;
2180     start_brace ();
2181     genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2182     pop_braces (old_brace_level);
2183     printf ("else");
2184     start_brace ();
2185     printf ("m68k_dreg(regs, rc) = dst;\n");
2186     pop_braces (old_brace_level);
2187     }
2188     break;
2189     case i_CAS2:
2190     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2191     printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2192     printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2193     if (curi->size == sz_word) {
2194     int old_brace_level = n_braces;
2195     printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2196     genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2197     printf ("\tif (GET_ZFLG) {\n");
2198     genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2199     printf ("\tif (GET_ZFLG) {\n");
2200     printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2201     printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2202     printf ("\t}}\n");
2203     pop_braces (old_brace_level);
2204     printf ("\tif (! GET_ZFLG) {\n");
2205     printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2206     printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2207     printf ("\t}\n");
2208     } else {
2209     int old_brace_level = n_braces;
2210     printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2211     genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2212     printf ("\tif (GET_ZFLG) {\n");
2213     genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2214     printf ("\tif (GET_ZFLG) {\n");
2215     printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2216     printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2217     printf ("\t}}\n");
2218     pop_braces (old_brace_level);
2219     printf ("\tif (! GET_ZFLG) {\n");
2220     printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2221     printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2222     printf ("\t}\n");
2223     }
2224     break;
2225     case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2226     {
2227     int old_brace_level;
2228     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2229     printf ("\tif (extra & 0x800)\n");
2230     old_brace_level = n_braces;
2231     start_brace ();
2232     printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2233     genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2234     genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2235     pop_braces (old_brace_level);
2236     printf ("else");
2237     start_brace ();
2238     genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2239     printf ("\tif (extra & 0x8000) {\n");
2240     switch (curi->size) {
2241     case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2242     case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2243     case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2244     default: abort ();
2245     }
2246     printf ("\t} else {\n");
2247     genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2248     printf ("\t}\n");
2249     pop_braces (old_brace_level);
2250     }
2251     break;
2252     case i_BKPT: /* only needed for hardware emulators */
2253     sync_m68k_pc ();
2254     printf ("\top_illg(opcode);\n");
2255     break;
2256     case i_CALLM: /* not present in 68030 */
2257     sync_m68k_pc ();
2258     printf ("\top_illg(opcode);\n");
2259     break;
2260     case i_RTM: /* not present in 68030 */
2261     sync_m68k_pc ();
2262     printf ("\top_illg(opcode);\n");
2263     break;
2264     case i_TRAPcc:
2265     if (curi->smode != am_unknown && curi->smode != am_illg)
2266     genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2267     printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2268     need_endlabel = 1;
2269     break;
2270     case i_DIVL:
2271     sync_m68k_pc ();
2272     start_brace ();
2273     printf ("\tuaecptr oldpc = m68k_getpc();\n");
2274     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2275     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2276     sync_m68k_pc ();
2277     printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2278     break;
2279     case i_MULL:
2280     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2281     genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2282     sync_m68k_pc ();
2283     printf ("\tm68k_mull(opcode, dst, extra);\n");
2284     break;
2285     case i_BFTST:
2286     case i_BFEXTU:
2287     case i_BFCHG:
2288     case i_BFEXTS:
2289     case i_BFCLR:
2290     case i_BFFFO:
2291     case i_BFSET:
2292     case i_BFINS:
2293     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2294     genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2295     start_brace ();
2296     printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2297     printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2298     if (curi->dmode == Dreg) {
2299     printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2300     } else {
2301     printf ("\tuae_u32 tmp,bf0,bf1;\n");
2302     printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2303     printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2304     printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2305     }
2306     printf ("\ttmp >>= (32 - width);\n");
2307     printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2308     printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2309     switch (curi->mnemo) {
2310     case i_BFTST:
2311     break;
2312     case i_BFEXTU:
2313     printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2314     break;
2315     case i_BFCHG:
2316     printf ("\ttmp = ~tmp;\n");
2317     break;
2318     case i_BFEXTS:
2319     printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2320     printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2321     break;
2322     case i_BFCLR:
2323     printf ("\ttmp = 0;\n");
2324     break;
2325     case i_BFFFO:
2326     printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2327     printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2328     printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2329     break;
2330     case i_BFSET:
2331     printf ("\ttmp = 0xffffffff;\n");
2332     break;
2333     case i_BFINS:
2334     printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2335     break;
2336     default:
2337     break;
2338     }
2339     if (curi->mnemo == i_BFCHG
2340     || curi->mnemo == i_BFCLR
2341     || curi->mnemo == i_BFSET
2342     || curi->mnemo == i_BFINS)
2343     {
2344     printf ("\ttmp <<= (32 - width);\n");
2345     if (curi->dmode == Dreg) {
2346     printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2347     printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2348     printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2349     printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2350     printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2351     } else {
2352     printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2353     printf ("\t\t(tmp >> (offset & 7)) |\n");
2354     printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2355     printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2356     printf ("\tput_long(dsta,bf0 );\n");
2357     printf ("\tif (((offset & 7) + width) > 32) {\n");
2358     printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2359     printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2360     printf ("\t\tput_byte(dsta+4,bf1);\n");
2361     printf ("\t}\n");
2362     }
2363     }
2364     break;
2365     case i_PACK:
2366     if (curi->smode == Dreg) {
2367     printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2368     printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2369     } else {
2370     printf ("\tuae_u16 val;\n");
2371     printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2372     printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2373     printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2374     printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2375     printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2376     printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2377     }
2378     break;
2379     case i_UNPK:
2380     if (curi->smode == Dreg) {
2381     printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2382     printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2383     printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2384     } else {
2385     printf ("\tuae_u16 val;\n");
2386     printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2387     printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2388     printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2389     printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2390     printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2391     printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2392     printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2393     }
2394     break;
2395     case i_TAS:
2396     genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2397     genflags (flag_logical, curi->size, "src", "", "");
2398     printf ("\tsrc |= 0x80;\n");
2399     genastore ("src", curi->smode, "srcreg", curi->size, "src");
2400     break;
2401     case i_FPP:
2402     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2403     sync_m68k_pc ();
2404     swap_opcode ();
2405     printf ("\tfpp_opp(opcode,extra);\n");
2406     break;
2407     case i_FDBcc:
2408     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2409     sync_m68k_pc ();
2410     swap_opcode ();
2411     printf ("\tfdbcc_opp(opcode,extra);\n");
2412     break;
2413     case i_FScc:
2414     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2415     sync_m68k_pc ();
2416     swap_opcode ();
2417     printf ("\tfscc_opp(opcode,extra);\n");
2418     break;
2419     case i_FTRAPcc:
2420     sync_m68k_pc ();
2421     start_brace ();
2422     printf ("\tuaecptr oldpc = m68k_getpc();\n");
2423     if (curi->smode != am_unknown && curi->smode != am_illg)
2424     genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2425     sync_m68k_pc ();
2426     swap_opcode ();
2427     printf ("\tftrapcc_opp(opcode,oldpc);\n");
2428     break;
2429     case i_FBcc:
2430     sync_m68k_pc ();
2431     start_brace ();
2432     printf ("\tuaecptr pc = m68k_getpc();\n");
2433     genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2434     sync_m68k_pc ();
2435     swap_opcode ();
2436     printf ("\tfbcc_opp(opcode,pc,extra);\n");
2437     break;
2438     case i_FSAVE:
2439     sync_m68k_pc ();
2440     swap_opcode ();
2441     printf ("\tfsave_opp(opcode);\n");
2442     break;
2443     case i_FRESTORE:
2444     sync_m68k_pc ();
2445     swap_opcode ();
2446     printf ("\tfrestore_opp(opcode);\n");
2447     break;
2448 cebix 1.6 case i_CINVL:
2449     case i_CINVP:
2450     case i_CINVA:
2451     case i_CPUSHL:
2452     case i_CPUSHP:
2453     case i_CPUSHA:
2454     break;
2455     case i_MOVE16:
2456 gbeauche 1.12 if ((opcode & 0xfff8) == 0xf620) {
2457     /* MOVE16 (Ax)+,(Ay)+ */
2458     printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2459     printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2460     printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2461     printf ("\tput_long(memd, get_long(mems));\n");
2462     printf ("\tput_long(memd+4, get_long(mems+4));\n");
2463     printf ("\tput_long(memd+8, get_long(mems+8));\n");
2464     printf ("\tput_long(memd+12, get_long(mems+12));\n");
2465     printf ("\tif (srcreg != dstreg)\n");
2466     printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2467     printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2468     }
2469     else {
2470     /* Other variants */
2471     genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2472     genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2473     printf ("\tmemsa &= ~15;\n");
2474     printf ("\tmemda &= ~15;\n");
2475     printf ("\tput_long(memda, get_long(memsa));\n");
2476     printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2477     printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2478     printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2479     if ((opcode & 0xfff8) == 0xf600)
2480     printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2481     else if ((opcode & 0xfff8) == 0xf608)
2482     printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2483     }
2484 cebix 1.6 break;
2485 cebix 1.1 case i_MMUOP:
2486     genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2487     sync_m68k_pc ();
2488     swap_opcode ();
2489     printf ("\tmmu_op(opcode,extra);\n");
2490     break;
2491     default:
2492     abort ();
2493     break;
2494     }
2495     finish_braces ();
2496     sync_m68k_pc ();
2497     }
2498    
2499     static void generate_includes (FILE * f)
2500     {
2501     fprintf (f, "#include \"sysdeps.h\"\n");
2502     fprintf (f, "#include \"m68k.h\"\n");
2503     fprintf (f, "#include \"memory.h\"\n");
2504     fprintf (f, "#include \"readcpu.h\"\n");
2505     fprintf (f, "#include \"newcpu.h\"\n");
2506     fprintf (f, "#include \"compiler.h\"\n");
2507     fprintf (f, "#include \"cputbl.h\"\n");
2508     }
2509    
2510     static int postfix;
2511    
2512     static void generate_one_opcode (int rp)
2513     {
2514     int i;
2515     uae_u16 smsk, dmsk;
2516     long int opcode = opcode_map[rp];
2517    
2518     if (table68k[opcode].mnemo == i_ILLG
2519     || table68k[opcode].clev > cpu_level)
2520     return;
2521    
2522     for (i = 0; lookuptab[i].name[0]; i++) {
2523     if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2524     break;
2525     }
2526    
2527     if (table68k[opcode].handler != -1)
2528     return;
2529    
2530     if (opcode_next_clev[rp] != cpu_level) {
2531     fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2532     opcode, lookuptab[i].name);
2533     return;
2534     }
2535     fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2536     fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2537 cebix 1.9 printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2538 cebix 1.1
2539     switch (table68k[opcode].stype) {
2540     case 0: smsk = 7; break;
2541     case 1: smsk = 255; break;
2542     case 2: smsk = 15; break;
2543     case 3: smsk = 7; break;
2544     case 4: smsk = 7; break;
2545     case 5: smsk = 63; break;
2546 gbeauche 1.12 case 7: smsk = 3; break;
2547 cebix 1.1 default: abort ();
2548     }
2549     dmsk = 7;
2550    
2551     next_cpu_level = -1;
2552     if (table68k[opcode].suse
2553     && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2554     && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2555     && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2556     && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2557     {
2558     if (table68k[opcode].spos == -1) {
2559     if (((int) table68k[opcode].sreg) >= 128)
2560     printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2561     else
2562     printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2563     } else {
2564     char source[100];
2565     int pos = table68k[opcode].spos;
2566    
2567     #if 0
2568     /* Check that we can do the little endian optimization safely. */
2569     if (pos < 8 && (smsk >> (8 - pos)) != 0)
2570     abort ();
2571     #endif
2572     printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2573    
2574     if (pos < 8 && (smsk >> (8 - pos)) != 0)
2575     sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)",
2576     pos ^ 8, 8 - pos, dmsk);
2577     else if (pos != 8)
2578     sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk);
2579     else
2580     sprintf (source, "(opcode & %d)", smsk);
2581    
2582     if (table68k[opcode].stype == 3)
2583     printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2584     else if (table68k[opcode].stype == 1)
2585     printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2586     else
2587     printf ("\tuae_u32 srcreg = %s;\n", source);
2588    
2589     printf ("#else\n");
2590    
2591     if (pos)
2592     sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2593     else
2594     sprintf (source, "(opcode & %d)", smsk);
2595    
2596     if (table68k[opcode].stype == 3)
2597     printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2598     else if (table68k[opcode].stype == 1)
2599     printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2600     else
2601     printf ("\tuae_u32 srcreg = %s;\n", source);
2602    
2603     printf ("#endif\n");
2604     }
2605     }
2606     if (table68k[opcode].duse
2607     /* Yes, the dmode can be imm, in case of LINK or DBcc */
2608     && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2609     && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2610     && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2611     {
2612     if (table68k[opcode].dpos == -1) {
2613     if (((int) table68k[opcode].dreg) >= 128)
2614     printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2615     else
2616     printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2617     } else {
2618     int pos = table68k[opcode].dpos;
2619     #if 0
2620     /* Check that we can do the little endian optimization safely. */
2621     if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2622     abort ();
2623     #endif
2624     printf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n");
2625    
2626     if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2627     printf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n",
2628     pos ^ 8, 8 - pos, dmsk);
2629     else if (pos != 8)
2630     printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2631     pos ^ 8, dmsk);
2632     else
2633     printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2634    
2635     printf ("#else\n");
2636    
2637     if (pos)
2638     printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2639     pos, dmsk);
2640     else
2641     printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2642    
2643     printf ("#endif\n");
2644     }
2645     }
2646     need_endlabel = 0;
2647     endlabelno++;
2648     sprintf (endlabelstr, "endlabel%d", endlabelno);
2649     gen_opcode (opcode);
2650     if (need_endlabel)
2651     printf ("%s: ;\n", endlabelstr);
2652     printf ("}\n");
2653     opcode_next_clev[rp] = next_cpu_level;
2654     opcode_last_postfix[rp] = postfix;
2655     }
2656    
2657     static void generate_func (void)
2658     {
2659     int i, j, rp;
2660    
2661     using_prefetch = 0;
2662     using_exception_3 = 0;
2663 gbeauche 1.11 #if !USE_PREFETCH_BUFFER
2664     /* gb-- No need for a prefetch buffer, nor exception 3 handling */
2665     /* Anyway, Basilisk2 does not use the op_smalltbl_5 table... */
2666     for (i = 0; i <= 4; i++) {
2667     #else
2668 cebix 1.6 for (i = 0; i < 6; i++) {
2669 gbeauche 1.11 #endif
2670 cebix 1.6 cpu_level = 4 - i;
2671     if (i == 5) {
2672 cebix 1.1 cpu_level = 0;
2673     using_prefetch = 1;
2674     using_exception_3 = 1;
2675     for (rp = 0; rp < nr_cpuop_funcs; rp++)
2676     opcode_next_clev[rp] = 0;
2677     }
2678     postfix = i;
2679     fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2680    
2681     /* sam: this is for people with low memory (eg. me :)) */
2682     printf ("\n"
2683     "#if !defined(PART_1) && !defined(PART_2) && "
2684     "!defined(PART_3) && !defined(PART_4) && "
2685     "!defined(PART_5) && !defined(PART_6) && "
2686     "!defined(PART_7) && !defined(PART_8)"
2687     "\n"
2688     "#define PART_1 1\n"
2689     "#define PART_2 1\n"
2690     "#define PART_3 1\n"
2691     "#define PART_4 1\n"
2692     "#define PART_5 1\n"
2693     "#define PART_6 1\n"
2694     "#define PART_7 1\n"
2695     "#define PART_8 1\n"
2696     "#endif\n\n");
2697    
2698     rp = 0;
2699     for(j=1;j<=8;++j) {
2700     int k = (j*nr_cpuop_funcs)/8;
2701     printf ("#ifdef PART_%d\n",j);
2702     for (; rp < k; rp++)
2703     generate_one_opcode (rp);
2704     printf ("#endif\n\n");
2705     }
2706    
2707     fprintf (stblfile, "{ 0, 0, 0 }};\n");
2708     }
2709     }
2710    
2711     int main (int argc, char **argv)
2712     {
2713     read_table68k ();
2714     do_merges ();
2715    
2716     opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2717     opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2718     opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2719     counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2720     read_counts ();
2721    
2722     /* It would be a lot nicer to put all in one file (we'd also get rid of
2723     * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2724     * I don't dare to touch the 68k version. */
2725    
2726     headerfile = fopen ("cputbl.h", "wb");
2727     stblfile = fopen ("cpustbl.cpp", "wb");
2728     freopen ("cpuemu.cpp", "wb", stdout);
2729    
2730     generate_includes (stdout);
2731     generate_includes (stblfile);
2732    
2733     generate_func ();
2734    
2735     free (table68k);
2736     return 0;
2737     }