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root/cebix/BasiliskII/src/uae_cpu/fpu/mathlib.h
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Comparing BasiliskII/src/uae_cpu/fpu/mathlib.h (file contents):
Revision 1.2 by gbeauche, 2002-09-15T18:21:13Z vs.
Revision 1.3 by gbeauche, 2002-09-16T12:01:38Z

# Line 103 | Line 103 | union fpu_single_shape {
103  
104          /* This is the IEEE 754 single-precision format.  */
105          struct {
106 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
106 > #ifdef WORDS_BIGENDIAN
107                  unsigned int negative:1;
108                  unsigned int exponent:8;
109                  unsigned int mantissa:23;
110 < #endif                          /* Big endian.  */
111 < #if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
110 > #else
111                  unsigned int mantissa:23;
112                  unsigned int exponent:8;
113                  unsigned int negative:1;
114 < #endif                          /* Little endian.  */
114 > #endif
115          } ieee;
116  
117          /* This format makes it easier to see if a NaN is a signalling NaN.  */
118          struct {
119 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
119 > #ifdef WORDS_BIGENDIAN
120                  unsigned int negative:1;
121                  unsigned int exponent:8;
122                  unsigned int quiet_nan:1;
123                  unsigned int mantissa:22;
124 < #endif                          /* Big endian.  */
126 < #if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
124 > #else
125                  unsigned int mantissa:22;
126                  unsigned int quiet_nan:1;
127                  unsigned int exponent:8;
128                  unsigned int negative:1;
129 < #endif                          /* Little endian.  */
129 > #endif
130          } ieee_nan;
131   };
132  
# Line 138 | Line 136 | union fpu_double_shape {
136          
137          /* This is the IEEE 754 double-precision format.  */
138          struct {
139 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
139 > #ifdef WORDS_BIGENDIAN
140                  unsigned int negative:1;
141                  unsigned int exponent:11;
142                  /* Together these comprise the mantissa.  */
143                  unsigned int mantissa0:20;
144                  unsigned int mantissa1:32;
145 < #endif                          /* Big endian.  */
146 < #if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
149 < #       if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
145 > #else
146 > #       if HOST_FLOAT_WORDS_BIG_ENDIAN
147                  unsigned int mantissa0:20;
148                  unsigned int exponent:11;
149                  unsigned int negative:1;
# Line 158 | Line 155 | union fpu_double_shape {
155                  unsigned int exponent:11;
156                  unsigned int negative:1;
157   #       endif
158 < #endif                          /* Little endian.  */
158 > #endif
159          } ieee;
160  
161          /* This format makes it easier to see if a NaN is a signalling NaN.  */
162          struct {
163 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
163 > #ifdef WORDS_BIGENDIAN
164                  unsigned int negative:1;
165                  unsigned int exponent:11;
166                  unsigned int quiet_nan:1;
# Line 171 | Line 168 | union fpu_double_shape {
168                  unsigned int mantissa0:19;
169                  unsigned int mantissa1:32;
170   #else
171 < # if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
171 > #       if HOST_FLOAT_WORDS_BIG_ENDIAN
172                  unsigned int mantissa0:19;
173                  unsigned int quiet_nan:1;
174                  unsigned int exponent:11;
# Line 190 | Line 187 | union fpu_double_shape {
187  
188          /* This format is used to extract the sign_exponent and mantissa parts only */
189          struct {
190 < #if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
190 > #if HOST_FLOAT_WORDS_BIG_ENDIAN
191                  unsigned int msw:32;
192                  unsigned int lsw:32;
193   #else
# Line 207 | Line 204 | union fpu_extended_shape {
204          
205          /* This is the IEEE 854 double-extended-precision format.  */
206          struct {
207 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
207 > #ifdef WORDS_BIGENDIAN
208                  unsigned int negative:1;
209                  unsigned int exponent:15;
210                  unsigned int empty:16;
211                  unsigned int mantissa0:32;
212                  unsigned int mantissa1:32;
213 < #endif
214 < #if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
218 < #       if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
213 > #else
214 > #       if HOST_FLOAT_WORDS_BIG_ENDIAN
215                  unsigned int exponent:15;
216                  unsigned int negative:1;
217                  unsigned int empty:16;
# Line 233 | Line 229 | union fpu_extended_shape {
229  
230          /* This is for NaNs in the IEEE 854 double-extended-precision format.  */
231          struct {
232 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
232 > #ifdef WORDS_BIGENDIAN
233                  unsigned int negative:1;
234                  unsigned int exponent:15;
235                  unsigned int empty:16;
# Line 241 | Line 237 | union fpu_extended_shape {
237                  unsigned int quiet_nan:1;
238                  unsigned int mantissa0:30;
239                  unsigned int mantissa1:32;
240 < #endif
241 < #if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
246 < #       if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
240 > #else
241 > #       if HOST_FLOAT_WORDS_BIG_ENDIAN
242                  unsigned int exponent:15;
243                  unsigned int negative:1;
244                  unsigned int empty:16;
# Line 265 | Line 260 | union fpu_extended_shape {
260          
261          /* This format is used to extract the sign_exponent and mantissa parts only */
262          struct {
263 < #if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
263 > #if HOST_FLOAT_WORDS_BIG_ENDIAN
264                  unsigned int sign_exponent:16;
265                  unsigned int empty:16;
266                  unsigned int msw:32;
# Line 287 | Line 282 | union fpu_extended_shape {
282          
283          /* This is the IEEE 854 quad-precision format.  */
284          struct {
285 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
285 > #ifdef WORDS_BIGENDIAN
286                  unsigned int negative:1;
287                  unsigned int exponent:15;
288                  unsigned int mantissa0:16;
# Line 306 | Line 301 | union fpu_extended_shape {
301  
302          /* This is for NaNs in the IEEE 854 quad-precision format.  */
303          struct {
304 < #if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
304 > #ifdef WORDS_BIGENDIAN
305                  unsigned int negative:1;
306                  unsigned int exponent:15;
307                  unsigned int quiet_nan:1;
# Line 326 | Line 321 | union fpu_extended_shape {
321          } ieee_nan;
322  
323          /* This format is used to extract the sign_exponent and mantissa parts only */
324 < #if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
324 > #if HOST_FLOAT_WORDS_BIG_ENDIAN
325          struct {
326                  uae_u64 msw;
327                  uae_u64 lsw;

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