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gbeauche |
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/* |
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* fpu/impl.h - extra functions and inline implementations |
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* |
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gbeauche |
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* Basilisk II (C) 1997-2008 Christian Bauer |
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gbeauche |
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* |
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* MC68881/68040 fpu emulation |
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* |
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* Original UAE FPU, copyright 1996 Herman ten Brugge |
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* Rewrite for x86, copyright 1999-2000 Lauri Pesonen |
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* New framework, copyright 2000 Gwenole Beauchesne |
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* Adapted for JIT compilation (c) Bernd Meyer, 2000 |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#ifndef FPU_IMPL_H |
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#define FPU_IMPL_H |
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/* NOTE: this file shall be included from fpu/core.h */ |
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#undef PUBLIC |
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#define PUBLIC /**/ |
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#undef PRIVATE |
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#define PRIVATE /**/ |
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#undef FFPU |
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#define FFPU /**/ |
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#undef FPU |
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#define FPU fpu. |
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/* -------------------------------------------------------------------------- */ |
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/* --- X86 assembly fpu specific methods --- */ |
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/* -------------------------------------------------------------------------- */ |
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#ifdef FPU_X86 |
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/* Return the floating-point status register in m68k format */ |
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gbeauche |
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static inline uae_u32 FFPU get_fpsr(void) |
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gbeauche |
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{ |
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return to_m68k_fpcond[(x86_status_word & 0x4700) >> 8] |
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| FPU fpsr.quotient |
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| exception_host2mac[x86_status_word & (SW_FAKE_BSUN|SW_PE|SW_UE|SW_OE|SW_ZE|SW_DE|SW_IE)] |
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| accrued_exception_host2mac[x86_status_word_accrued & (SW_PE|SW_UE|SW_OE|SW_ZE|SW_DE|SW_IE)] |
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; |
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} |
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/* Set the floating-point status register from an m68k format */ |
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gbeauche |
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static inline void FFPU set_fpsr(uae_u32 new_fpsr) |
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gbeauche |
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{ |
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x86_status_word = to_host_fpcond[(new_fpsr & FPSR_CCB) >> 24 ] |
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| exception_mac2host[(new_fpsr & FPSR_EXCEPTION_STATUS) >> 8]; |
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x86_status_word_accrued = accrued_exception_mac2host[(new_fpsr & FPSR_ACCRUED_EXCEPTION) >> 3]; |
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} |
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#endif |
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/* -------------------------------------------------------------------------- */ |
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/* --- Original UAE and IEEE FPU core methods --- */ |
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/* -------------------------------------------------------------------------- */ |
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#ifndef FPU_X86 |
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/* Return the floating-point status register in m68k format */ |
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gbeauche |
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static inline uae_u32 FFPU get_fpsr(void) |
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gbeauche |
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{ |
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uae_u32 condition_codes = get_fpccr(); |
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uae_u32 exception_status = get_exception_status(); |
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uae_u32 accrued_exception = get_accrued_exception(); |
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uae_u32 quotient = FPU fpsr.quotient; |
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return (condition_codes | quotient | exception_status | accrued_exception); |
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} |
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/* Set the floating-point status register from an m68k format */ |
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gbeauche |
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static inline void FFPU set_fpsr(uae_u32 new_fpsr) |
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gbeauche |
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{ |
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set_fpccr ( new_fpsr & FPSR_CCB ); |
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set_exception_status ( new_fpsr & FPSR_EXCEPTION_STATUS ); |
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set_accrued_exception ( new_fpsr & FPSR_ACCRUED_EXCEPTION ); |
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FPU fpsr.quotient = new_fpsr & FPSR_QUOTIENT; |
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} |
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#endif |
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/* -------------------------------------------------------------------------- */ |
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/* --- Common routines for control word --- */ |
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/* -------------------------------------------------------------------------- */ |
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/* Return the floating-point control register in m68k format */ |
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gbeauche |
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static inline uae_u32 FFPU get_fpcr(void) |
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gbeauche |
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{ |
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uae_u32 rounding_precision = get_rounding_precision(); |
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uae_u32 rounding_mode = get_rounding_mode(); |
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return (rounding_precision | rounding_mode); |
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} |
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/* Set the floating-point control register from an m68k format */ |
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gbeauche |
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static inline void FFPU set_fpcr(uae_u32 new_fpcr) |
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gbeauche |
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{ |
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set_rounding_precision ( new_fpcr & FPCR_ROUNDING_PRECISION); |
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set_rounding_mode ( new_fpcr & FPCR_ROUNDING_MODE ); |
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set_host_control_word(); |
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} |
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/* -------------------------------------------------------------------------- */ |
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/* --- Specific part to X86 assembly FPU --- */ |
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/* -------------------------------------------------------------------------- */ |
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#ifdef FPU_X86 |
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/* Retrieve a floating-point register value and convert it to double precision */ |
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gbeauche |
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static inline double FFPU fpu_get_register(int r) |
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gbeauche |
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{ |
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double f; |
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__asm__ __volatile__("fldt %1\n\tfstpl %0" : "=m" (f) : "m" (FPU registers[r])); |
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return f; |
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} |
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#endif |
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/* -------------------------------------------------------------------------- */ |
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/* --- Specific to original UAE or new IEEE-based FPU core --- */ |
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/* -------------------------------------------------------------------------- */ |
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#if defined(FPU_UAE) || defined(FPU_IEEE) |
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/* Retrieve a floating-point register value and convert it to double precision */ |
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gbeauche |
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static inline double FFPU fpu_get_register(int r) |
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gbeauche |
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{ |
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return FPU registers[r]; |
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} |
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#endif |
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#endif /* FPU_IMPL_H */ |