uae_cpu/fpu/impl.h

/*
 *  fpu/impl.h - extra functions and inline implementations
 *
 *  Basilisk II (C) 1997-1999 Christian Bauer
 *
 *  MC68881/68040 fpu emulation
 *  
 *  Original UAE FPU, copyright 1996 Herman ten Brugge
 *  Rewrite for x86, copyright 1999-2000 Lauri Pesonen
 *  New framework, copyright 2000 Gwenole Beauchesne
 *  Adapted for JIT compilation (c) Bernd Meyer, 2000
 *  
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef FPU_IMPL_H
#define FPU_IMPL_H

/* NOTE: this file shall be included from fpu/core.h */
#undef  PUBLIC
#define PUBLIC  /**/

#undef  PRIVATE
#define PRIVATE /**/

#undef  FFPU
#define FFPU    /**/

#undef  FPU
#define FPU             fpu.

/* -------------------------------------------------------------------------- */
/* --- X86 assembly fpu specific methods                                  --- */
/* -------------------------------------------------------------------------- */

#ifdef FPU_X86

/* Return the floating-point status register in m68k format */
static inline uae_u32 FFPU get_fpsr(void)
{
        return  to_m68k_fpcond[(x86_status_word & 0x4700) >> 8]
                |       FPU fpsr.quotient
                |       exception_host2mac[x86_status_word & (SW_FAKE_BSUN|SW_PE|SW_UE|SW_OE|SW_ZE|SW_DE|SW_IE)]
                |       accrued_exception_host2mac[x86_status_word_accrued & (SW_PE|SW_UE|SW_OE|SW_ZE|SW_DE|SW_IE)]
                ;
}

/* Set the floating-point status register from an m68k format */
static inline void FFPU set_fpsr(uae_u32 new_fpsr)
{
        x86_status_word = to_host_fpcond[(new_fpsr & FPSR_CCB) >> 24 ]
                | exception_mac2host[(new_fpsr & FPSR_EXCEPTION_STATUS) >> 8];
        x86_status_word_accrued = accrued_exception_mac2host[(new_fpsr & FPSR_ACCRUED_EXCEPTION) >> 3];
}

#endif

/* -------------------------------------------------------------------------- */
/* --- Original UAE and IEEE FPU core methods                             --- */
/* -------------------------------------------------------------------------- */

#ifndef FPU_X86

/* Return the floating-point status register in m68k format */
static inline uae_u32 FFPU get_fpsr(void)
{
        uae_u32 condition_codes         = get_fpccr();
        uae_u32 exception_status        = get_exception_status();
        uae_u32 accrued_exception       = get_accrued_exception();
        uae_u32 quotient                        = FPU fpsr.quotient;
        return (condition_codes | quotient | exception_status | accrued_exception);
}

/* Set the floating-point status register from an m68k format */
static inline void FFPU set_fpsr(uae_u32 new_fpsr)
{
        set_fpccr                                       ( new_fpsr & FPSR_CCB                           );
        set_exception_status            ( new_fpsr & FPSR_EXCEPTION_STATUS      );
        set_accrued_exception           ( new_fpsr & FPSR_ACCRUED_EXCEPTION     );
        FPU fpsr.quotient                       = new_fpsr & FPSR_QUOTIENT;
}

#endif

/* -------------------------------------------------------------------------- */
/* --- Common routines for control word                                   --- */
/* -------------------------------------------------------------------------- */

/* Return the floating-point control register in m68k format */
static inline uae_u32 FFPU get_fpcr(void)
{
        uae_u32 rounding_precision      = get_rounding_precision();
        uae_u32 rounding_mode           = get_rounding_mode();
        return (rounding_precision | rounding_mode);
}

/* Set the floating-point control register from an m68k format */
static inline void FFPU set_fpcr(uae_u32 new_fpcr)
{
        set_rounding_precision          ( new_fpcr & FPCR_ROUNDING_PRECISION);
        set_rounding_mode                       ( new_fpcr & FPCR_ROUNDING_MODE         );
        set_host_control_word();
}

/* -------------------------------------------------------------------------- */
/* --- Specific part to X86 assembly FPU                                  --- */
/* -------------------------------------------------------------------------- */

#ifdef FPU_X86

/* Retrieve a floating-point register value and convert it to double precision */
static inline double FFPU fpu_get_register(int r)
{
        double f;
        __asm__ __volatile__("fldt %1\n\tfstpl %0" : "=m" (f) : "m" (FPU registers[r]));
        return f;
}

#endif

/* -------------------------------------------------------------------------- */
/* --- Specific to original UAE or new IEEE-based FPU core                --- */
/* -------------------------------------------------------------------------- */

#if defined(FPU_UAE) || defined(FPU_IEEE)

/* Retrieve a floating-point register value and convert it to double precision */
static inline double FFPU fpu_get_register(int r)
{
        return FPU registers[r];
}

#endif

#endif /* FPU_IMPL_H */
Revision:	1.2
Committed:	2002-09-19T15:42:16Z (22 years, 1 month ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
CVS Tags:	nigel-build-12, nigel-build-13
Changes since 1.1:	+8 -8 lines
Log Message:	Get rid of any "extern inline" bits. Use static inline instead as MIPS compilers don't really like the former syntax.
#	User	Rev	Content
1	gbeauche	1.1	/*
2			* fpu/impl.h - extra functions and inline implementations
3			*
4			* Basilisk II (C) 1997-1999 Christian Bauer
5			*
6			* MC68881/68040 fpu emulation
7			*
8			* Original UAE FPU, copyright 1996 Herman ten Brugge
9			* Rewrite for x86, copyright 1999-2000 Lauri Pesonen
10			* New framework, copyright 2000 Gwenole Beauchesne
11			* Adapted for JIT compilation (c) Bernd Meyer, 2000
12			*
13			* This program is free software; you can redistribute it and/or modify
14			* it under the terms of the GNU General Public License as published by
15			* the Free Software Foundation; either version 2 of the License, or
16			* (at your option) any later version.
17			*
18			* This program is distributed in the hope that it will be useful,
19			* but WITHOUT ANY WARRANTY; without even the implied warranty of
20			* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21			* GNU General Public License for more details.
22			*
23			* You should have received a copy of the GNU General Public License
24			* along with this program; if not, write to the Free Software
25			* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26			*/
27
28			#ifndef FPU_IMPL_H
29			#define FPU_IMPL_H
30
31			/* NOTE: this file shall be included from fpu/core.h */
32			#undef PUBLIC
33			#define PUBLIC /**/
34
35			#undef PRIVATE
36			#define PRIVATE /**/
37
38			#undef FFPU
39			#define FFPU /**/
40
41			#undef FPU
42			#define FPU fpu.
43
44			/* -------------------------------------------------------------------------- */
45			/* --- X86 assembly fpu specific methods --- */
46			/* -------------------------------------------------------------------------- */
47
48			#ifdef FPU_X86
49
50			/* Return the floating-point status register in m68k format */
51	gbeauche	1.2	static inline uae_u32 FFPU get_fpsr(void)
52	gbeauche	1.1	{
53			return to_m68k_fpcond[(x86_status_word & 0x4700) >> 8]
54			\| FPU fpsr.quotient
55			\| exception_host2mac[x86_status_word & (SW_FAKE_BSUN\|SW_PE\|SW_UE\|SW_OE\|SW_ZE\|SW_DE\|SW_IE)]
56			\| accrued_exception_host2mac[x86_status_word_accrued & (SW_PE\|SW_UE\|SW_OE\|SW_ZE\|SW_DE\|SW_IE)]
57			;
58			}
59
60			/* Set the floating-point status register from an m68k format */
61	gbeauche	1.2	static inline void FFPU set_fpsr(uae_u32 new_fpsr)
62	gbeauche	1.1	{
63			x86_status_word = to_host_fpcond[(new_fpsr & FPSR_CCB) >> 24 ]
64			\| exception_mac2host[(new_fpsr & FPSR_EXCEPTION_STATUS) >> 8];
65			x86_status_word_accrued = accrued_exception_mac2host[(new_fpsr & FPSR_ACCRUED_EXCEPTION) >> 3];
66			}
67
68			#endif
69
70			/* -------------------------------------------------------------------------- */
71			/* --- Original UAE and IEEE FPU core methods --- */
72			/* -------------------------------------------------------------------------- */
73
74			#ifndef FPU_X86
75
76			/* Return the floating-point status register in m68k format */
77	gbeauche	1.2	static inline uae_u32 FFPU get_fpsr(void)
78	gbeauche	1.1	{
79			uae_u32 condition_codes = get_fpccr();
80			uae_u32 exception_status = get_exception_status();
81			uae_u32 accrued_exception = get_accrued_exception();
82			uae_u32 quotient = FPU fpsr.quotient;
83			return (condition_codes \| quotient \| exception_status \| accrued_exception);
84			}
85
86			/* Set the floating-point status register from an m68k format */
87	gbeauche	1.2	static inline void FFPU set_fpsr(uae_u32 new_fpsr)
88	gbeauche	1.1	{
89			set_fpccr ( new_fpsr & FPSR_CCB );
90			set_exception_status ( new_fpsr & FPSR_EXCEPTION_STATUS );
91			set_accrued_exception ( new_fpsr & FPSR_ACCRUED_EXCEPTION );
92			FPU fpsr.quotient = new_fpsr & FPSR_QUOTIENT;
93			}
94
95			#endif
96
97			/* -------------------------------------------------------------------------- */
98			/* --- Common routines for control word --- */
99			/* -------------------------------------------------------------------------- */
100
101			/* Return the floating-point control register in m68k format */
102	gbeauche	1.2	static inline uae_u32 FFPU get_fpcr(void)
103	gbeauche	1.1	{
104			uae_u32 rounding_precision = get_rounding_precision();
105			uae_u32 rounding_mode = get_rounding_mode();
106			return (rounding_precision \| rounding_mode);
107			}
108
109			/* Set the floating-point control register from an m68k format */
110	gbeauche	1.2	static inline void FFPU set_fpcr(uae_u32 new_fpcr)
111	gbeauche	1.1	{
112			set_rounding_precision ( new_fpcr & FPCR_ROUNDING_PRECISION);
113			set_rounding_mode ( new_fpcr & FPCR_ROUNDING_MODE );
114			set_host_control_word();
115			}
116
117			/* -------------------------------------------------------------------------- */
118			/* --- Specific part to X86 assembly FPU --- */
119			/* -------------------------------------------------------------------------- */
120
121			#ifdef FPU_X86
122
123			/* Retrieve a floating-point register value and convert it to double precision */
124	gbeauche	1.2	static inline double FFPU fpu_get_register(int r)
125	gbeauche	1.1	{
126			double f;
127			__asm__ __volatile__("fldt %1\n\tfstpl %0" : "=m" (f) : "m" (FPU registers[r]));
128			return f;
129			}
130
131			#endif
132
133			/* -------------------------------------------------------------------------- */
134			/* --- Specific to original UAE or new IEEE-based FPU core --- */
135			/* -------------------------------------------------------------------------- */
136
137			#if defined(FPU_UAE) \|\| defined(FPU_IEEE)
138
139			/* Retrieve a floating-point register value and convert it to double precision */
140	gbeauche	1.2	static inline double FFPU fpu_get_register(int r)
141	gbeauche	1.1	{
142			return FPU registers[r];
143			}
144
145			#endif
146
147			#endif /* FPU_IMPL_H */