uae_cpu/fpu/fpu_uae.h

/*
 *  fpu/fpu_uae.h - Extra Definitions for the old UAE FPU core
 *
 *  Basilisk II (C) 1997-2005 Christian Bauer
 *
 *  MC68881/68040 fpu emulation
 *  
 *  Original UAE FPU, copyright 1996 Herman ten Brugge
 *  Rewrite for x86, copyright 1999-2000 Lauri Pesonen
 *  New framework, copyright 2000 Gwenole Beauchesne
 *  Adapted for JIT compilation (c) Bernd Meyer, 2000
 *  
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef FPU_UAE_H
#define FPU_UAE_H

// Only define if you have IEEE 64 bit doubles.
#define FPU_HAVE_IEEE_DOUBLE 1

/* NOTE: this file shall be included from fpu/fpu_uae.cpp */
#undef  PUBLIC
#define PUBLIC  extern

#undef  PRIVATE
#define PRIVATE static

#undef  FFPU
#define FFPU    /**/

#undef  FPU
#define FPU             fpu.

enum {
#ifdef WORDS_BIGENDIAN
        FHI             = 0,
        FLO             = 1
#else
        FHI             = 1,
        FLO             = 0
#endif
};

// Floating-point rounding support
PRIVATE inline fpu_register round_to_zero(fpu_register const & x);
PRIVATE inline fpu_register round_to_nearest(fpu_register const & x);

#if FPU_HAVE_IEEE_DOUBLE

// Lauri-- full words to avoid partial register stalls.
struct double_flags {
        uae_u32         in_range;
        uae_u32         zero;
        uae_u32         infinity;
        uae_u32         nan;
        uae_u32         negative;
};
PRIVATE double_flags fl_source;
PRIVATE double_flags fl_dest;
PRIVATE inline void FFPU get_dest_flags(fpu_register const & r);
PRIVATE inline void FFPU get_source_flags(fpu_register const & r);

PRIVATE inline bool FFPU do_isnan(fpu_register const & r);
PRIVATE inline bool FFPU do_isinf(fpu_register const & r);
PRIVATE inline bool FFPU do_isneg(fpu_register const & r);
PRIVATE inline bool FFPU do_iszero(fpu_register const & r);

PRIVATE inline void FFPU make_nan(fpu_register & r);
PRIVATE inline void FFPU make_zero_positive(fpu_register & r);
PRIVATE inline void FFPU make_zero_negative(fpu_register & r);
PRIVATE inline void FFPU make_inf_positive(fpu_register & r);
PRIVATE inline void FFPU make_inf_negative(fpu_register & r);

PRIVATE inline void FFPU fast_scale(fpu_register & r, int add);
PRIVATE inline fpu_register FFPU fast_fgetexp(fpu_register const & r);

// May be optimized for particular processors
#ifndef FPU_USE_NATIVE_FLAGS
PRIVATE inline void FFPU make_fpsr(fpu_register const & r);
#endif

// Normalize to range 1..2
PRIVATE inline void FFPU fast_remove_exponent(fpu_register & r);

// The sign of the quotient is the exclusive-OR of the sign bits
// of the source and destination operands.
PRIVATE inline uae_u32 FFPU get_quotient_sign(
        fpu_register const & ra, fpu_register const & rb
);

// Quotient Byte is loaded with the sign and least significant
// seven bits of the quotient.
PRIVATE inline void FFPU make_quotient(
        fpu_register const & quotient, uae_u32 sign
);

// to_single
PRIVATE inline fpu_register FFPU make_single(
        uae_u32 value
);

// from_single
PRIVATE inline uae_u32 FFPU extract_single(
        fpu_register const & src
);

// to_exten
PRIVATE inline fpu_register FFPU make_extended(
        uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
);

/*
        Would be so much easier with full size floats :(
        ... this is so vague.
*/
// to_exten_no_normalize
PRIVATE inline void FFPU make_extended_no_normalize(
        uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3, fpu_register & result
);

// from_exten
PRIVATE inline void FFPU extract_extended(fpu_register const & src,
        uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
);

// to_double
PRIVATE inline fpu_register FFPU make_double(
        uae_u32 wrd1, uae_u32 wrd2
);

// from_double
PRIVATE inline void FFPU extract_double(fpu_register const & src, 
        uae_u32 * wrd1, uae_u32 * wrd2
);

#else /* !FPU_HAVE_IEEE_DOUBLE */

// FIXME: may be optimized for particular processors
#ifndef FPU_USE_NATIVE_FLAGS
PRIVATE inline void FFPU make_fpsr(fpu_register const & r);
#endif

// to_single
PRIVATE inline fpu_register make_single(
        uae_u32 value
);

// from_single
PRIVATE inline uae_u32 FFPU extract_single(
        fpu_register const & src
);

// to exten
PRIVATE inline fpu_register FFPU make_extended(
        uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
);

// from_exten
PRIVATE inline void FFPU extract_extended(
        fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
);

// to_double
PRIVATE inline fpu_register FFPU make_double(
        uae_u32 wrd1, uae_u32 wrd2
);

// from_double
PRIVATE inline void FFPU extract_double(
        fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2
);

#endif /* FPU_HAVE_IEEE_DOUBLE */

PRIVATE inline fpu_register FFPU make_packed(
        uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
);

PRIVATE inline void FFPU extract_packed(
        fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
);

PRIVATE inline int FFPU get_fp_value(
        uae_u32 opcode, uae_u16 extra, fpu_register & src
);

PRIVATE inline int FFPU put_fp_value(
        uae_u32 opcode, uae_u16 extra, fpu_register const & value
);

PRIVATE inline int FFPU get_fp_ad(
        uae_u32 opcode, uae_u32 * ad
);

PRIVATE inline int FFPU fpp_cond(
        int condition
);

#endif /* FPU_UAE_H */
Revision:	1.3
Committed:	2005-01-30T21:42:16Z (19 years, 9 months ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
CVS Tags:	nigel-build-19, nigel-build-17
Changes since 1.2:	+1 -1 lines
Log Message:	Happy New Year!
#	User	Rev	Content
1	gbeauche	1.1	/*
2			* fpu/fpu_uae.h - Extra Definitions for the old UAE FPU core
3			*
4	gbeauche	1.3	* Basilisk II (C) 1997-2005 Christian Bauer
5	gbeauche	1.1	*
6			* MC68881/68040 fpu emulation
7			*
8			* Original UAE FPU, copyright 1996 Herman ten Brugge
9			* Rewrite for x86, copyright 1999-2000 Lauri Pesonen
10			* New framework, copyright 2000 Gwenole Beauchesne
11			* Adapted for JIT compilation (c) Bernd Meyer, 2000
12			*
13			* This program is free software; you can redistribute it and/or modify
14			* it under the terms of the GNU General Public License as published by
15			* the Free Software Foundation; either version 2 of the License, or
16			* (at your option) any later version.
17			*
18			* This program is distributed in the hope that it will be useful,
19			* but WITHOUT ANY WARRANTY; without even the implied warranty of
20			* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21			* GNU General Public License for more details.
22			*
23			* You should have received a copy of the GNU General Public License
24			* along with this program; if not, write to the Free Software
25			* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26			*/
27
28			#ifndef FPU_UAE_H
29			#define FPU_UAE_H
30
31			// Only define if you have IEEE 64 bit doubles.
32			#define FPU_HAVE_IEEE_DOUBLE 1
33
34			/* NOTE: this file shall be included from fpu/fpu_uae.cpp */
35			#undef PUBLIC
36			#define PUBLIC extern
37
38			#undef PRIVATE
39			#define PRIVATE static
40
41			#undef FFPU
42			#define FFPU /**/
43
44			#undef FPU
45			#define FPU fpu.
46
47			enum {
48			#ifdef WORDS_BIGENDIAN
49			FHI = 0,
50			FLO = 1
51			#else
52			FHI = 1,
53			FLO = 0
54			#endif
55			};
56
57			// Floating-point rounding support
58			PRIVATE inline fpu_register round_to_zero(fpu_register const & x);
59			PRIVATE inline fpu_register round_to_nearest(fpu_register const & x);
60
61			#if FPU_HAVE_IEEE_DOUBLE
62
63			// Lauri-- full words to avoid partial register stalls.
64			struct double_flags {
65			uae_u32 in_range;
66			uae_u32 zero;
67			uae_u32 infinity;
68			uae_u32 nan;
69			uae_u32 negative;
70			};
71			PRIVATE double_flags fl_source;
72			PRIVATE double_flags fl_dest;
73			PRIVATE inline void FFPU get_dest_flags(fpu_register const & r);
74			PRIVATE inline void FFPU get_source_flags(fpu_register const & r);
75
76			PRIVATE inline bool FFPU do_isnan(fpu_register const & r);
77			PRIVATE inline bool FFPU do_isinf(fpu_register const & r);
78			PRIVATE inline bool FFPU do_isneg(fpu_register const & r);
79			PRIVATE inline bool FFPU do_iszero(fpu_register const & r);
80
81			PRIVATE inline void FFPU make_nan(fpu_register & r);
82			PRIVATE inline void FFPU make_zero_positive(fpu_register & r);
83			PRIVATE inline void FFPU make_zero_negative(fpu_register & r);
84			PRIVATE inline void FFPU make_inf_positive(fpu_register & r);
85			PRIVATE inline void FFPU make_inf_negative(fpu_register & r);
86
87			PRIVATE inline void FFPU fast_scale(fpu_register & r, int add);
88			PRIVATE inline fpu_register FFPU fast_fgetexp(fpu_register const & r);
89
90			// May be optimized for particular processors
91			#ifndef FPU_USE_NATIVE_FLAGS
92			PRIVATE inline void FFPU make_fpsr(fpu_register const & r);
93			#endif
94
95			// Normalize to range 1..2
96			PRIVATE inline void FFPU fast_remove_exponent(fpu_register & r);
97
98			// The sign of the quotient is the exclusive-OR of the sign bits
99			// of the source and destination operands.
100			PRIVATE inline uae_u32 FFPU get_quotient_sign(
101			fpu_register const & ra, fpu_register const & rb
102			);
103
104			// Quotient Byte is loaded with the sign and least significant
105			// seven bits of the quotient.
106			PRIVATE inline void FFPU make_quotient(
107			fpu_register const & quotient, uae_u32 sign
108			);
109
110			// to_single
111			PRIVATE inline fpu_register FFPU make_single(
112			uae_u32 value
113			);
114
115			// from_single
116			PRIVATE inline uae_u32 FFPU extract_single(
117			fpu_register const & src
118			);
119
120			// to_exten
121			PRIVATE inline fpu_register FFPU make_extended(
122			uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
123			);
124
125			/*
126			Would be so much easier with full size floats :(
127			... this is so vague.
128			*/
129			// to_exten_no_normalize
130			PRIVATE inline void FFPU make_extended_no_normalize(
131			uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3, fpu_register & result
132			);
133
134			// from_exten
135			PRIVATE inline void FFPU extract_extended(fpu_register const & src,
136			uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
137			);
138
139			// to_double
140			PRIVATE inline fpu_register FFPU make_double(
141			uae_u32 wrd1, uae_u32 wrd2
142			);
143
144			// from_double
145			PRIVATE inline void FFPU extract_double(fpu_register const & src,
146			uae_u32 * wrd1, uae_u32 * wrd2
147			);
148
149			#else /* !FPU_HAVE_IEEE_DOUBLE */
150
151			// FIXME: may be optimized for particular processors
152			#ifndef FPU_USE_NATIVE_FLAGS
153			PRIVATE inline void FFPU make_fpsr(fpu_register const & r);
154			#endif
155
156			// to_single
157			PRIVATE inline fpu_register make_single(
158			uae_u32 value
159			);
160
161			// from_single
162			PRIVATE inline uae_u32 FFPU extract_single(
163			fpu_register const & src
164			);
165
166			// to exten
167			PRIVATE inline fpu_register FFPU make_extended(
168			uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
169			);
170
171			// from_exten
172			PRIVATE inline void FFPU extract_extended(
173			fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
174			);
175
176			// to_double
177			PRIVATE inline fpu_register FFPU make_double(
178			uae_u32 wrd1, uae_u32 wrd2
179			);
180
181			// from_double
182			PRIVATE inline void FFPU extract_double(
183			fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2
184			);
185
186			#endif /* FPU_HAVE_IEEE_DOUBLE */
187
188			PRIVATE inline fpu_register FFPU make_packed(
189			uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3
190			);
191
192			PRIVATE inline void FFPU extract_packed(
193			fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3
194			);
195
196			PRIVATE inline int FFPU get_fp_value(
197			uae_u32 opcode, uae_u16 extra, fpu_register & src
198			);
199
200			PRIVATE inline int FFPU put_fp_value(
201			uae_u32 opcode, uae_u16 extra, fpu_register const & value
202			);
203
204			PRIVATE inline int FFPU get_fp_ad(
205			uae_u32 opcode, uae_u32 * ad
206			);
207
208			PRIVATE inline int FFPU fpp_cond(
209			int condition
210			);
211
212			#endif /* FPU_UAE_H */