ViewVC Help
View File | Revision Log | Show Annotations | Revision Graph | Root Listing
root/cebix/BasiliskII/src/uae_cpu/fpu/exceptions.cpp
Revision: 1.2
Committed: 2004-01-12T15:29:31Z (20 years, 10 months ago) by cebix
Branch: MAIN
CVS Tags: nigel-build-16, nigel-build-15
Changes since 1.1: +1 -1 lines
Log Message:
Happy New Year! :)

File Contents

# User Rev Content
1 gbeauche 1.1 /*
2     * fpu/exceptions.cpp - system-dependant FPU exceptions management
3     *
4 cebix 1.2 * Basilisk II (C) 1997-2004 Christian Bauer
5 gbeauche 1.1 *
6     * MC68881/68040 fpu emulation
7     *
8     * Original UAE FPU, copyright 1996 Herman ten Brugge
9     * Rewrite for x86, copyright 1999-2000 Lauri Pesonen
10     * New framework, copyright 2000 Gwenole Beauchesne
11     * Adapted for JIT compilation (c) Bernd Meyer, 2000
12     *
13     * This program is free software; you can redistribute it and/or modify
14     * it under the terms of the GNU General Public License as published by
15     * the Free Software Foundation; either version 2 of the License, or
16     * (at your option) any later version.
17     *
18     * This program is distributed in the hope that it will be useful,
19     * but WITHOUT ANY WARRANTY; without even the implied warranty of
20     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21     * GNU General Public License for more details.
22     *
23     * You should have received a copy of the GNU General Public License
24     * along with this program; if not, write to the Free Software
25     * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26     */
27    
28     #undef PRIVATE
29     #define PRIVATE /**/
30    
31     #undef PUBLIC
32     #define PUBLIC /**/
33    
34     #undef FFPU
35     #define FFPU /**/
36    
37     #undef FPU
38     #define FPU fpu.
39    
40     /* -------------------------------------------------------------------------- */
41     /* --- Native X86 exceptions --- */
42     /* -------------------------------------------------------------------------- */
43    
44     #ifdef FPU_USE_X86_EXCEPTIONS
45     void FFPU fpu_init_native_exceptions(void)
46     {
47     // Mapping for "sw" -> fpsr exception byte
48     for (uae_u32 i = 0; i < 0x80; i++) {
49     exception_host2mac[i] = 0;
50    
51     if(i & SW_FAKE_BSUN) {
52     exception_host2mac[i] |= FPSR_EXCEPTION_BSUN;
53     }
54     // precision exception
55     if(i & SW_PE) {
56     exception_host2mac[i] |= FPSR_EXCEPTION_INEX2;
57     }
58     // underflow exception
59     if(i & SW_UE) {
60     exception_host2mac[i] |= FPSR_EXCEPTION_UNFL;
61     }
62     // overflow exception
63     if(i & SW_OE) {
64     exception_host2mac[i] |= FPSR_EXCEPTION_OVFL;
65     }
66     // zero divide exception
67     if(i & SW_ZE) {
68     exception_host2mac[i] |= FPSR_EXCEPTION_DZ;
69     }
70     // denormalized operand exception.
71     // wrong, but should not get here, normalization is done in elsewhere
72     if(i & SW_DE) {
73     exception_host2mac[i] |= FPSR_EXCEPTION_SNAN;
74     }
75     // invalid operation exception
76     if(i & SW_IE) {
77     exception_host2mac[i] |= FPSR_EXCEPTION_OPERR;
78     }
79     }
80    
81     // Mapping for fpsr exception byte -> "sw"
82     for (uae_u32 i = 0; i < 0x100; i++) {
83     uae_u32 fpsr = (i << 8);
84     exception_mac2host[i] = 0;
85    
86     // BSUN; make sure that you don't generate FPU stack faults.
87     if(fpsr & FPSR_EXCEPTION_BSUN) {
88     exception_mac2host[i] |= SW_FAKE_BSUN;
89     }
90     // precision exception
91     if(fpsr & FPSR_EXCEPTION_INEX2) {
92     exception_mac2host[i] |= SW_PE;
93     }
94     // underflow exception
95     if(fpsr & FPSR_EXCEPTION_UNFL) {
96     exception_mac2host[i] |= SW_UE;
97     }
98     // overflow exception
99     if(fpsr & FPSR_EXCEPTION_OVFL) {
100     exception_mac2host[i] |= SW_OE;
101     }
102     // zero divide exception
103     if(fpsr & FPSR_EXCEPTION_DZ) {
104     exception_mac2host[i] |= SW_ZE;
105     }
106     // denormalized operand exception
107     if(fpsr & FPSR_EXCEPTION_SNAN) {
108     exception_mac2host[i] |= SW_DE; //Wrong
109     }
110     // invalid operation exception
111     if(fpsr & FPSR_EXCEPTION_OPERR) {
112     exception_mac2host[i] |= SW_IE;
113     }
114     }
115     }
116     #endif
117    
118     #ifdef FPU_USE_X86_ACCRUED_EXCEPTIONS
119     void FFPU fpu_init_native_accrued_exceptions(void)
120     {
121     /*
122     68881/68040 accrued exceptions accumulate as follows:
123     Accrued.IOP |= (Exception.SNAN | Exception.OPERR)
124     Accrued.OVFL |= (Exception.OVFL)
125     Accrued.UNFL |= (Exception.UNFL | Exception.INEX2)
126     Accrued.DZ |= (Exception.DZ)
127     Accrued.INEX |= (Exception.INEX1 | Exception.INEX2 | Exception.OVFL)
128     */
129    
130     // Mapping for "fpsr.accrued_exception" -> fpsr accrued exception byte
131     for (uae_u32 i = 0; i < 0x40; i++ ) {
132     accrued_exception_host2mac[i] = 0;
133    
134     // precision exception
135     if(i & SW_PE) {
136     accrued_exception_host2mac[i] |= FPSR_ACCR_INEX;
137     }
138     // underflow exception
139     if(i & SW_UE) {
140     accrued_exception_host2mac[i] |= FPSR_ACCR_UNFL;
141     }
142     // overflow exception
143     if(i & SW_OE) {
144     accrued_exception_host2mac[i] |= FPSR_ACCR_OVFL;
145     }
146     // zero divide exception
147     if(i & SW_ZE) {
148     accrued_exception_host2mac[i] |= FPSR_ACCR_DZ;
149     }
150     // denormalized operand exception
151     if(i & SW_DE) {
152     accrued_exception_host2mac[i] |= FPSR_ACCR_IOP; //??????
153     }
154     // invalid operation exception
155     if(i & SW_IE) {
156     accrued_exception_host2mac[i] |= FPSR_ACCR_IOP;
157     }
158     }
159    
160     // Mapping for fpsr accrued exception byte -> "fpsr.accrued_exception"
161     for (uae_u32 i = 0; i < 0x20; i++) {
162     int fpsr = (i << 3);
163     accrued_exception_mac2host[i] = 0;
164    
165     // precision exception
166     if(fpsr & FPSR_ACCR_INEX) {
167     accrued_exception_mac2host[i] |= SW_PE;
168     }
169     // underflow exception
170     if(fpsr & FPSR_ACCR_UNFL) {
171     accrued_exception_mac2host[i] |= SW_UE;
172     }
173     // overflow exception
174     if(fpsr & FPSR_ACCR_OVFL) {
175     accrued_exception_mac2host[i] |= SW_OE;
176     }
177     // zero divide exception
178     if(fpsr & FPSR_ACCR_DZ) {
179     accrued_exception_mac2host[i] |= SW_ZE;
180     }
181     // What about SW_DE; //??????
182     // invalid operation exception
183     if(fpsr & FPSR_ACCR_IOP) {
184     accrued_exception_mac2host[i] |= SW_IE;
185     }
186     }
187     }
188     #endif