# | Line 2073 | Line 2073 | void fpp_opp(uae_u32 opcode, uae_u16 ext | |
---|---|---|
2073 | break; | |
2074 | case 0x23: /* FMUL */ | |
2075 | D(bug("FMUL %.04f\r\n",(float)src)); | |
2076 | + | #if HAVE_IEEE_DOUBLE |
2077 | GET_DEST_FLAGS((uae_u32 *)®s.fp[reg]); | |
2078 | GET_SOURCE_FLAGS((uae_u32 *)&src); | |
2079 | if(fl_dest.in_range && fl_source.in_range) { | |
# | Line 2099 | Line 2100 | void fpp_opp(uae_u32 opcode, uae_u16 ext | |
2100 | MAKE_INF_POSITIVE((uae_u32 *)®s.fp[reg]); | |
2101 | } | |
2102 | } | |
2103 | + | #else |
2104 | + | D(bug("FMUL %.04f\r\n",(float)src)); |
2105 | + | regs.fp[reg] *= src; |
2106 | + | #endif |
2107 | MAKE_FPSR(regs.fpsr,regs.fp[reg]); | |
2108 | break; | |
2109 | case 0x24: /* FSGLDIV */ |
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