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root/cebix/BasiliskII/src/uae_cpu/compiler/compemu.h
Revision 1.16 - (view) (annotate) - [select for diffs]
2008-01-01T09:40:35Z (16 years, 11 months ago) by gbeauche
Branch: MAIN
CVS Tags: HEAD
Changes since 1.15: +1 -1 lines
Diff to previous 1.15 , to selected 1.9
Happy New Year!

Revision 1.15 - (view) (annotate) - [select for diffs]
2007-06-29T16:53:04Z (17 years, 5 months ago) by gbeauche
Branch: MAIN
Changes since 1.14: +6 -0 lines
Diff to previous 1.14 , to selected 1.9
Fix LSL & LSR instructions so that they preserve the X flags when the
shift count is 0. Likewise for ASR + another improvement to avoid shifting
by halves (propagated bit is reset to original's when necessary).

Revision 1.14 - (view) (annotate) - [select for diffs]
2007-06-29T16:36:03Z (17 years, 5 months ago) by gbeauche
Branch: MAIN
Changes since 1.13: +2 -0 lines
Diff to previous 1.13 , to selected 1.9
Implement CMOV.B and CMOV.W translations. Only the latter has a native
x86 equivalent however.

Revision 1.13 - (view) (annotate) - [select for diffs]
2006-01-16T21:31:08Z (18 years, 10 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-19
Changes since 1.12: +0 -7 lines
Diff to previous 1.12 , to selected 1.9
JIT generated code is not guaranteed to be leaf, e.g. there could be a call
to a generic instruction handler (untranslated code). This caused problems
on MacOS X for Intel where the unaligned stack conditions turned out to be
more visible. Performance loss is really neglectable and this is the right
fix now anyway.

Revision 1.12 - (view) (annotate) - [select for diffs]
2005-01-30T21:42:16Z (19 years, 10 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-17
Changes since 1.11: +2 -2 lines
Diff to previous 1.11 , to selected 1.9
Happy New Year!

Revision 1.11 - (view) (annotate) - [select for diffs]
2004-11-08T21:10:46Z (20 years ago) by gbeauche
Branch: MAIN
Changes since 1.10: +3 -2 lines
Diff to previous 1.10 , to selected 1.9
Merge BSF simulation on P4 from Amithlon. Use 33-bit memory addressing model.

Revision 1.10 - (view) (annotate) - [select for diffs]
2004-11-01T16:01:51Z (20 years, 1 month ago) by gbeauche
Branch: MAIN
Changes since 1.9: +7 -3 lines
Diff to previous 1.9
revive and fix almost two-year old port to x86_64

Revision 1.9 - (view) (annotate) - [selected]
2004-01-12T15:29:30Z (20 years, 10 months ago) by cebix
Branch: MAIN
CVS Tags: nigel-build-15, nigel-build-16
Changes since 1.8: +2 -2 lines
Diff to previous 1.8
Happy New Year! :)

Revision 1.8 - (view) (annotate) - [select for diffs]
2003-11-21T14:20:01Z (21 years ago) by gbeauche
Branch: MAIN
Changes since 1.7: +3 -0 lines
Diff to previous 1.7 , to selected 1.9
Implement lazy icache range invalidation. Disable for now until it shows
a real benefit over only 2%

Revision 1.7 - (view) (annotate) - [select for diffs]
2003-03-21T19:12:44Z (21 years, 8 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-12, nigel-build-13
Changes since 1.6: +6 -0 lines
Diff to previous 1.6 , to selected 1.9
Remove some dead code. Start implementation of optimized calls to interpretive
fallbacks for untranslatable instruction handlers. Disabled for now since
call_m_01() is not correctly imeplemented yet.

Revision 1.6 - (view) (annotate) - [select for diffs]
2003-03-13T15:57:01Z (21 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.5: +2 -1 lines
Diff to previous 1.5 , to selected 1.9
Workaround change in flags handling for BSF instruction on Pentium 4.
i.e. currently disable translation of ADDX/SUBX/B<CHG,CLR,SET,TST> instructions
in that case. That is to say, better (much?) slower than inaccurate. :-(

Revision 1.5 - (view) (annotate) - [select for diffs]
2002-10-03T16:13:46Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.4: +25 -0 lines
Diff to previous 1.4 , to selected 1.9
JIT add copyright notices just to notify people that's real derivative
work from GPL code (UAE-JIT). Additions and improvements are from B2
developers.

Revision 1.4 - (view) (annotate) - [select for diffs]
2002-10-03T15:01:53Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.3: +8 -2 lines
Diff to previous 1.3 , to selected 1.9
Turn on block inlining so that people could test this feature and report
if they do gain something or renders JIT less stable.

Revision 1.3 - (view) (annotate) - [select for diffs]
2002-10-02T15:55:10Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.2: +5 -10 lines
Diff to previous 1.2 , to selected 1.9
- Remove dead code in readcpu.cpp concerning CONST_JUMP control flow.
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.

Revision 1.2 - (view) (annotate) - [select for diffs]
2002-10-01T16:22:36Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.1: +22 -2 lines
Diff to previous 1.1 , to selected 1.9
- Rewrite blockinfo allocator et al. Use a template class so that this
  can work with other types related to blockinfos.
- Add new method to compute checksums. This should permit code inlining
  and follow-ups of const_jumps without breaking the lazy cache invalidator.
  aka. chain infos for checksuming. TODO: Incomplete support thus disabled.

Revision 1.1 - (view) (annotate) - [select for diffs]
2002-09-17T16:04:06Z (22 years, 2 months ago) by gbeauche
Branch: MAIN
Diff to selected 1.9
Import JIT compiler

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