| 3 |
|
* |
| 4 |
|
* Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer |
| 5 |
|
* |
| 6 |
< |
* Adaptation for Basilisk II and improvements, copyright 2000-2002 |
| 6 |
> |
* Adaptation for Basilisk II and improvements, copyright 2000-2005 |
| 7 |
|
* Gwenole Beauchesne |
| 8 |
|
* |
| 9 |
< |
* Basilisk II (C) 1997-2002 Christian Bauer |
| 9 |
> |
* Basilisk II (C) 1997-2005 Christian Bauer |
| 10 |
|
* |
| 11 |
|
* This program is free software; you can redistribute it and/or modify |
| 12 |
|
* it under the terms of the GNU General Public License as published by |
| 30 |
|
|
| 31 |
|
#if USE_JIT |
| 32 |
|
|
| 33 |
+ |
#if defined __i386__ || defined __x86_64__ |
| 34 |
+ |
#include "flags_x86.h" |
| 35 |
+ |
#else |
| 36 |
+ |
#error "Unsupported JIT compiler for this architecture" |
| 37 |
+ |
#endif |
| 38 |
+ |
|
| 39 |
|
#if JIT_DEBUG |
| 40 |
|
/* dump some information (m68k block, x86 block addresses) about the compiler state */ |
| 41 |
|
extern void compiler_dumpstate(void); |
| 47 |
|
#define TAGMASK 0x0000ffff |
| 48 |
|
#define TAGSIZE (TAGMASK+1) |
| 49 |
|
#define MAXRUN 1024 |
| 50 |
< |
#define cacheline(x) (((uae_u32)x)&TAGMASK) |
| 50 |
> |
#define cacheline(x) (((uintptr)x)&TAGMASK) |
| 51 |
|
|
| 52 |
|
extern uae_u8* start_pc_p; |
| 53 |
|
extern uae_u32 start_pc; |
| 86 |
|
#define USE_CHECKSUM_INFO 1 |
| 87 |
|
#endif |
| 88 |
|
|
| 89 |
+ |
/* Does flush_icache_range() only check for blocks falling in the requested range? */ |
| 90 |
+ |
#define LAZY_FLUSH_ICACHE_RANGE 0 |
| 91 |
+ |
|
| 92 |
|
#define USE_F_ALIAS 1 |
| 93 |
|
#define USE_OFFSET 1 |
| 94 |
|
#define COMP_DEBUG 1 |
| 130 |
|
|
| 131 |
|
#define KILLTHERAT 1 /* Set to 1 to avoid some partial_rat_stalls */ |
| 132 |
|
|
| 133 |
< |
/* Whether to preserve registers across calls to JIT compiled routines */ |
| 134 |
< |
#ifdef X86_ASSEMBLY |
| 126 |
< |
#define USE_PUSH_POP 0 |
| 133 |
> |
#if defined(__x86_64__) |
| 134 |
> |
#define N_REGS 16 /* really only 15, but they are numbered 0-3,5-15 */ |
| 135 |
|
#else |
| 128 |
– |
#define USE_PUSH_POP 1 |
| 129 |
– |
#endif |
| 130 |
– |
|
| 136 |
|
#define N_REGS 8 /* really only 7, but they are numbered 0,1,2,3,5,6,7 */ |
| 137 |
+ |
#endif |
| 138 |
|
#define N_FREGS 6 /* That leaves us two positions on the stack to play with */ |
| 139 |
|
|
| 140 |
|
/* Functions exposed to newcpu, or to what was moved from newcpu.c to |
| 345 |
|
DECLARE_MIDFUNC(shra_b_ri(RW1 r, IMM i)); |
| 346 |
|
DECLARE_MIDFUNC(setcc(W1 d, IMM cc)); |
| 347 |
|
DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc)); |
| 348 |
+ |
DECLARE_MIDFUNC(cmov_b_rr(RW1 d, R1 s, IMM cc)); |
| 349 |
+ |
DECLARE_MIDFUNC(cmov_w_rr(RW2 d, R2 s, IMM cc)); |
| 350 |
|
DECLARE_MIDFUNC(cmov_l_rr(RW4 d, R4 s, IMM cc)); |
| 351 |
|
DECLARE_MIDFUNC(cmov_l_rm(RW4 d, IMM s, IMM cc)); |
| 352 |
< |
/* Set native Z flag only if register is zero */ |
| 345 |
< |
DECLARE_MIDFUNC(setzflg_l(RW4 r)); |
| 352 |
> |
DECLARE_MIDFUNC(bsf_l_rr(W4 d, R4 s)); |
| 353 |
|
DECLARE_MIDFUNC(pop_m(IMM d)); |
| 354 |
|
DECLARE_MIDFUNC(push_m(IMM d)); |
| 355 |
|
DECLARE_MIDFUNC(pop_l(W4 d)); |
| 516 |
|
extern void get_n_addr(int address, int dest, int tmp); |
| 517 |
|
extern void get_n_addr_jmp(int address, int dest, int tmp); |
| 518 |
|
extern void calc_disp_ea_020(int base, uae_u32 dp, int target, int tmp); |
| 519 |
+ |
/* Set native Z flag only if register is zero */ |
| 520 |
+ |
extern void set_zero(int r, int tmp); |
| 521 |
|
extern int kill_rodent(int r); |
| 522 |
|
extern void sync_m68k_pc(void); |
| 523 |
|
extern uae_u32 get_const(int r); |
| 531 |
|
struct blockinfo_t; |
| 532 |
|
|
| 533 |
|
typedef struct dep_t { |
| 534 |
< |
uintptr* jmp_off; |
| 534 |
> |
uae_u32* jmp_off; |
| 535 |
|
struct blockinfo_t* target; |
| 536 |
|
struct blockinfo_t* source; |
| 537 |
|
struct dep_t** prev_p; |
