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root/cebix/BasiliskII/src/uae_cpu/compiler/compemu.h
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Comparing BasiliskII/src/uae_cpu/compiler/compemu.h (file contents):
Revision 1.6 by gbeauche, 2003-03-13T15:57:01Z vs.
Revision 1.14 by gbeauche, 2007-06-29T16:36:03Z

# Line 3 | Line 3
3   *
4   *  Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
5   *
6 < *  Adaptation for Basilisk II and improvements, copyright 2000-2002
6 > *  Adaptation for Basilisk II and improvements, copyright 2000-2005
7   *    Gwenole Beauchesne
8   *
9 < *  Basilisk II (C) 1997-2002 Christian Bauer
9 > *  Basilisk II (C) 1997-2005 Christian Bauer
10   *  
11   *  This program is free software; you can redistribute it and/or modify
12   *  it under the terms of the GNU General Public License as published by
# Line 41 | Line 41 | extern void compiler_dumpstate(void);
41   #define TAGMASK 0x0000ffff
42   #define TAGSIZE (TAGMASK+1)
43   #define MAXRUN 1024
44 < #define cacheline(x) (((uae_u32)x)&TAGMASK)
44 > #define cacheline(x) (((uintptr)x)&TAGMASK)
45  
46   extern uae_u8* start_pc_p;
47   extern uae_u32 start_pc;
# Line 57 | Line 57 | union cacheline {
57          blockinfo_t * bi;
58   };
59  
60 + /* Use new spill/reload strategy when calling external functions */
61 + #define USE_OPTIMIZED_CALLS 0
62 + #if USE_OPTIMIZED_CALLS
63 + #error implementation in progress
64 + #endif
65 +
66   /* (gb) When on, this option can save save up to 30% compilation time
67   *  when many lazy flushes occur (e.g. apps in MacOS 8.x).
68   */
# Line 74 | Line 80 | union cacheline {
80   #define USE_CHECKSUM_INFO 1
81   #endif
82  
83 + /* Does flush_icache_range() only check for blocks falling in the requested range? */
84 + #define LAZY_FLUSH_ICACHE_RANGE 0
85 +
86   #define USE_F_ALIAS 1
87   #define USE_OFFSET 1
88   #define COMP_DEBUG 1
# Line 115 | Line 124 | union cacheline {
124  
125   #define KILLTHERAT 1  /* Set to 1 to avoid some partial_rat_stalls */
126  
127 < /* Whether to preserve registers across calls to JIT compiled routines */
128 < #ifdef X86_ASSEMBLY
120 < #define USE_PUSH_POP 0
127 > #if defined(__x86_64__)
128 > #define N_REGS 16 /* really only 15, but they are numbered 0-3,5-15 */
129   #else
122 #define USE_PUSH_POP 1
123 #endif
124
130   #define N_REGS 8  /* really only 7, but they are numbered 0,1,2,3,5,6,7 */
131 + #endif
132   #define N_FREGS 6 /* That leaves us two positions on the stack to play with */
133  
134   /* Functions exposed to newcpu, or to what was moved from newcpu.c to
# Line 333 | Line 339 | DECLARE_MIDFUNC(shra_w_ri(RW2 r, IMM i))
339   DECLARE_MIDFUNC(shra_b_ri(RW1 r, IMM i));
340   DECLARE_MIDFUNC(setcc(W1 d, IMM cc));
341   DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc));
342 + DECLARE_MIDFUNC(cmov_b_rr(RW1 d, R1 s, IMM cc));
343 + DECLARE_MIDFUNC(cmov_w_rr(RW2 d, R2 s, IMM cc));
344   DECLARE_MIDFUNC(cmov_l_rr(RW4 d, R4 s, IMM cc));
345   DECLARE_MIDFUNC(cmov_l_rm(RW4 d, IMM s, IMM cc));
346 < /* Set native Z flag only if register is zero */
339 < DECLARE_MIDFUNC(setzflg_l(RW4 r));
346 > DECLARE_MIDFUNC(bsf_l_rr(W4 d, R4 s));
347   DECLARE_MIDFUNC(pop_m(IMM d));
348   DECLARE_MIDFUNC(push_m(IMM d));
349   DECLARE_MIDFUNC(pop_l(W4 d));
# Line 503 | Line 510 | extern void writelong_clobber(int addres
510   extern void get_n_addr(int address, int dest, int tmp);
511   extern void get_n_addr_jmp(int address, int dest, int tmp);
512   extern void calc_disp_ea_020(int base, uae_u32 dp, int target, int tmp);
513 + /* Set native Z flag only if register is zero */
514 + extern void set_zero(int r, int tmp);
515   extern int kill_rodent(int r);
516   extern void sync_m68k_pc(void);
517   extern uae_u32 get_const(int r);
# Line 516 | Line 525 | extern void register_branch(uae_u32 not_
525   struct blockinfo_t;
526  
527   typedef struct dep_t {
528 <  uintptr*            jmp_off;
528 >  uae_u32*            jmp_off;
529    struct blockinfo_t* target;
530    struct blockinfo_t* source;
531    struct dep_t**      prev_p;

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