 ../
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compiler/
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fpu/
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basilisk_glue.cpp
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1.9
(23 years ago)
by gbeauche:
- removed old JIT compiler, its related support functions and files
(compiler.{h,cpp})
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build68k.c
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1.4
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
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cpu_emulation.h
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1.8
(23 years ago)
by cebix:
- bumped version number to 0.9
- updated copyright dates
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cpuopti.c
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1.1.1.1
(25 years ago)
by cebix:
Imported sources
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gencpu.c
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1.13
(23 years ago)
by gbeauche:
- removed old JIT compiler, its related support functions and files
(compiler.{h,cpp})
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m68k.h
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1.4
(25 years ago)
by cebix:
- removed Gwenole's patches as they didn't work on SPARC V9
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memory.cpp
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1.3
(24 years ago)
by gbeauche:
- fixed 15 and 16 bpp frame_host_* functions for big endian systems
- conditionally removed unused code for direct addressing or real addressing modes
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memory.h
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1.2
(24 years ago)
by gbeauche:
- merged DIRECT_ADDRESSING and REAL_ADDRESSING
- conditionally removed unused code for direct addressing or real addressing modes
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newcpu.cpp
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1.8
(23 years ago)
by gbeauche:
- removed old JIT compiler, its related support functions and files
(compiler.{h,cpp})
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newcpu.h
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1.5
(23 years ago)
by gbeauche:
- removed old JIT compiler, its related support functions and files
(compiler.{h,cpp})
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readcpu.cpp
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1.3
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
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readcpu.h
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1.3
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
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table68k
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1.4
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
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