 ../
|
fpu/
|
|
|
compiler/
|
|
cpu_emulation.h
|
1.10
(22 years ago)
by cebix:
- documentation updates
- 2001 -> 2002
- version 0.9 -> 1.0
|
|
basilisk_glue.cpp
|
1.12
(22 years ago)
by cebix:
- documentation updates
- 2001 -> 2002
- version 0.9 -> 1.0
|
|
gencpu.c
|
1.16
(22 years ago)
by gbeauche:
- Fix condition codes handling for BFINS instructions (uae 0.8.20)
|
|
readcpu.cpp
|
1.4
(22 years ago)
by gbeauche:
- merge 680x0 emulation core with uae 0.8.17
|
|
table68k
|
1.6
(22 years ago)
by gbeauche:
- merge 680x0 emulation core with uae 0.8.17
|
|
memory.cpp
|
1.5
(23 years ago)
by cebix:
- 1-bit mode under X11 always uses default visual
- fixed possible crash in driver_window dtor (image data would be freed twice,
once by XDestroyImage() and once in driver_base dtor)
- fixed compilation problems with banked memory
- fixed typos
|
|
memory.h
|
1.5
(23 years ago)
by cebix:
- 1-bit mode under X11 always uses default visual
- fixed possible crash in driver_window dtor (image data would be freed twice,
once by XDestroyImage() and once in driver_base dtor)
- fixed compilation problems with banked memory
- fixed typos
|
|
newcpu.h
|
1.6
(23 years ago)
by gbeauche:
- merged some code from uae-0.8.16
|
|
m68k.h
|
1.5
(23 years ago)
by gbeauche:
- merged some code from uae-0.8.16
|
|
newcpu.cpp
|
1.9
(23 years ago)
by gbeauche:
- merged some code from uae-0.8.16
|
|
cpuopti.c
|
1.2
(23 years ago)
by cebix:
video_x.cpp supports resolution switching in windowed mode: the available
resolutions are 512x384, 640x480, 800x600, 1024x768 and 1280x1024 (the prefs
editor has to be updated to reflect this). The resolution selected in the
prefs editor is used as the default, but it can be changed in the Monitors
control panel. So far only tested with direct addressing.
|
|
build68k.c
|
1.4
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
|
|
readcpu.h
|
1.3
(23 years ago)
by gbeauche:
Additions:
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)
Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
|
