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root/cebix/BasiliskII/src/rsrc_patches.cpp

Comparing BasiliskII/src/rsrc_patches.cpp (file contents):
Revision 1.8 by cebix, 2001-02-02T20:52:57Z vs.
Revision 1.9 by cebix, 2001-06-30T12:58:06Z

#	Line 37 | Line 37
37		#include "debug.h"
38
39
40	–	#if !EMULATED_68K
41	–	// Assembly functions
42	–	extern "C" void Scod060Patch1(void);
43	–	extern "C" void Scod060Patch2(void);
44	–	extern "C" void ThInitFPUPatch(void);
45	–	#endif
46	–
47	–
40		/*
41		*  Search resource for byte string, return offset (or 0)
42		*/
#	Line 90 | Line 82 | void CheckLoad(uint32 type, int16 id, ui
82		if (base) {
83		p16 = (uint16 *)(p + base);
84
85	<	#if defined(AMIGA) || defined(__NetBSD__) || defined(USE_SCRATCHMEM_SUBTERFUGE)
85	>	#if defined(USE_SCRATCHMEM_SUBTERFUGE)
86		// Set 0x0000 to scratch memory area
87		extern uint8 *ScratchMem;
88		const uint32 ScratchMemBase = Host2MacAddr(ScratchMem);
#	Line 197 | Line 189 | void CheckLoad(uint32 type, int16 id, ui
189		D(bug("  patch 2 applied\n"));
190		}
191
200	–	#if !EMULATED_68K
201	–	} else if (CPUIs68060 && (type == FOURCC('g','p','c','h') && id == 669 || type == FOURCC('l','p','c','h') && id == 63)) {
202	–	D(bug(" gpch 669/lpch 63 found\n"));
203	–
204	–	static uint16 ThPatchSpace[1024];       // Replacement routines are constructed here
205	–	uint16 *q = ThPatchSpace;
206	–	uint32 start;
207	–	int i;
208	–
209	–	// Patch Thread Manager thread switcher for 68060 FPU (7.5, 8.0)
210	–	static const uint8 dat[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x18};
211	–	base = find_rsrc_data(p, size, dat, sizeof(dat));
212	–	if (base) {     // Skip first routine (no FPU -> no FPU)
213	–
214	–	base = find_rsrc_data(p, size - base - 2, dat, sizeof(dat), base + 2);
215	–	if (base) {     // no FPU -> FPU
216	–
217	–	p16 = (uint16 *)(p + base);
218	–	start = (uint32)q;
219	–	for (i=0; i<28; i++) *q++ = *p16++;
220	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
221	–	*q++ = htons(2);
222	–	*q++ = htons(0x6712);           // beq
223	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
224	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
225	–	*q++ = htons(0x9000);
226	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
227	–	*q++ = htons(0x8800);
228	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
229	–	*q++ = htons(0x8400);
230	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
231	–	*q++ = htons(0xd0ff);
232	–	*q++ = htons(0xf35f);           // frestore (sp)+
233	–	*q++ = htons(0x4e75);           // rts
234	–
235	–	p16 = (uint16 *)(p + base);
236	–	*p16++ = htons(M68K_JMP);
237	–	*p16++ = htons(start >> 16);
238	–	*p16 = htons(start & 0xffff);
239	–	FlushCodeCache(p + base, 6);
240	–	D(bug("  patch 1 applied\n"));
241	–
242	–	static const uint8 dat2[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x28};
243	–	base = find_rsrc_data(p, size, dat2, sizeof(dat2));
244	–	if (base) {     // FPU -> FPU
245	–
246	–	p16 = (uint16 *)(p + base);
247	–	start = (uint32)q;
248	–	for (i=0; i<4; i++) *q++ = *p16++;
249	–	*q++ = htons(0x6736);           // beq
250	–	*q++ = htons(0xf327);           // fsave -(sp)                          (save FPU state frame)
251	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
252	–	*q++ = htons(2);
253	–	*q++ = htons(0x6716);           // beq
254	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
255	–	*q++ = htons(0xe0ff);
256	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
257	–	*q++ = htons(0xa400);
258	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
259	–	*q++ = htons(0xa800);
260	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
261	–	*q++ = htons(0xb000);
262	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
263	–	*q++ = htons(0xffff);
264	–	*q++ = htons(0xffff);
265	–	p16 += 9;
266	–	for (i=0; i<23; i++) *q++ = *p16++;
267	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
268	–	*q++ = htons(2);
269	–	*q++ = htons(0x6712);           // beq
270	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
271	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
272	–	*q++ = htons(0x9000);
273	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
274	–	*q++ = htons(0x8800);
275	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
276	–	*q++ = htons(0x8400);
277	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
278	–	*q++ = htons(0xd0ff);
279	–	*q++ = htons(0xf35f);           // frestore (sp)+
280	–	*q++ = htons(0x4e75);           // rts
281	–
282	–	p16 = (uint16 *)(p + base);
283	–	*p16++ = htons(M68K_JMP);
284	–	*p16++ = htons(start >> 16);
285	–	*p16 = htons(start & 0xffff);
286	–	FlushCodeCache(p + base, 6);
287	–	D(bug("  patch 2 applied\n"));
288	–
289	–	base = find_rsrc_data(p, size - base - 2, dat2, sizeof(dat2), base + 2);
290	–	if (base) {     // FPU -> no FPU
291	–
292	–	p16 = (uint16 *)(p + base);
293	–	start = (uint32)q;
294	–	for (i=0; i<4; i++) *q++ = *p16++;
295	–	*q++ = htons(0x6736);           // beq
296	–	*q++ = htons(0xf327);           // fsave -(sp)                          (save FPU state frame)
297	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
298	–	*q++ = htons(2);
299	–	*q++ = htons(0x6716);           // beq
300	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
301	–	*q++ = htons(0xe0ff);
302	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
303	–	*q++ = htons(0xa400);
304	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
305	–	*q++ = htons(0xa800);
306	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
307	–	*q++ = htons(0xb000);
308	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
309	–	*q++ = htons(0xffff);
310	–	*q++ = htons(0xffff);
311	–	p16 += 9;
312	–	for (i=0; i<24; i++) *q++ = *p16++;
313	–
314	–	p16 = (uint16 *)(p + base);
315	–	*p16++ = htons(M68K_JMP);
316	–	*p16++ = htons(start >> 16);
317	–	*p16 = htons(start & 0xffff);
318	–	FlushCodeCache(p + base, 6);
319	–	D(bug("  patch 3 applied\n"));
320	–	}
321	–	}
322	–	}
323	–	}
324	–
325	–	// Patch Thread Manager thread switcher for 68060 FPU (additional routines under 8.0 for Mixed Mode Manager)
326	–	static const uint8 dat3[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x40};
327	–	base = find_rsrc_data(p, size, dat3, sizeof(dat3));
328	–	if (base) {     // Skip first routine (no FPU -> no FPU)
329	–
330	–	base = find_rsrc_data(p, size - base - 2, dat3, sizeof(dat3), base + 2);
331	–	if (base) {     // no FPU -> FPU
332	–
333	–	p16 = (uint16 *)(p + base);
334	–	start = (uint32)q;
335	–	for (i=0; i<48; i++) *q++ = *p16++;
336	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
337	–	*q++ = htons(2);
338	–	*q++ = htons(0x6712);           // beq
339	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
340	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
341	–	*q++ = htons(0x9000);
342	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
343	–	*q++ = htons(0x8800);
344	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
345	–	*q++ = htons(0x8400);
346	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
347	–	*q++ = htons(0xd0ff);
348	–	p16 += 7;
349	–	for (i=0; i<20; i++) *q++ = *p16++;
350	–
351	–	p16 = (uint16 *)(p + base);
352	–	*p16++ = htons(M68K_JMP);
353	–	*p16++ = htons(start >> 16);
354	–	*p16 = htons(start & 0xffff);
355	–	FlushCodeCache(p + base, 6);
356	–	D(bug("  patch 4 applied\n"));
357	–
358	–	static const uint8 dat4[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x50};
359	–	base = find_rsrc_data(p, size, dat4, sizeof(dat4));
360	–	if (base) {     // FPU -> FPU
361	–
362	–	p16 = (uint16 *)(p + base);
363	–	start = (uint32)q;
364	–	for (i=0; i<4; i++) *q++ = *p16++;
365	–	*q++ = htons(0x675e);           // beq
366	–	p16++;
367	–	for (i=0; i<21; i++) *q++ = *p16++;
368	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
369	–	*q++ = htons(2);
370	–	*q++ = htons(0x6716);           // beq
371	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
372	–	*q++ = htons(0xe0ff);
373	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
374	–	*q++ = htons(0xa400);
375	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
376	–	*q++ = htons(0xa800);
377	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
378	–	*q++ = htons(0xb000);
379	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
380	–	*q++ = htons(0xffff);
381	–	*q++ = htons(0xffff);
382	–	p16 += 7;
383	–	for (i=0; i<23; i++) *q++ = *p16++;
384	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state or "FPU state saved" flag set?)
385	–	*q++ = htons(2);
386	–	*q++ = htons(0x6712);           // beq
387	–	*q++ = htons(0x588f);           // addq.l #2,sp                         (flag set, skip it)
388	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpcr           (restore FPU registers)
389	–	*q++ = htons(0x9000);
390	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpsr
391	–	*q++ = htons(0x8800);
392	–	*q++ = htons(0xf21f);           // fmove.l (sp)+,fpiar
393	–	*q++ = htons(0x8400);
394	–	*q++ = htons(0xf21f);           // fmovem.x (sp)+,fp0-fp7
395	–	*q++ = htons(0xd0ff);
396	–	p16 += 7;
397	–	for (i=0; i<20; i++) *q++ = *p16++;
398	–
399	–	p16 = (uint16 *)(p + base);
400	–	*p16++ = htons(M68K_JMP);
401	–	*p16++ = htons(start >> 16);
402	–	*p16 = htons(start & 0xffff);
403	–	FlushCodeCache(p + base, 6);
404	–	D(bug("  patch 5 applied\n"));
405	–
406	–	base = find_rsrc_data(p, size - base - 2, dat4, sizeof(dat4), base + 2);
407	–	if (base) {     // FPU -> no FPU
408	–
409	–	p16 = (uint16 *)(p + base);
410	–	start = (uint32)q;
411	–	for (i=0; i<4; i++) *q++ = *p16++;
412	–	*q++ = htons(0x675e);           // beq
413	–	p16++;
414	–	for (i=0; i<21; i++) *q++ = *p16++;
415	–	*q++ = htons(0x4a2f);           // tst.b 2(sp)                          (null FPU state?)
416	–	*q++ = htons(2);
417	–	*q++ = htons(0x6716);           // beq
418	–	*q++ = htons(0xf227);           // fmovem.x fp0-fp7,-(sp)       (no, save FPU registers)
419	–	*q++ = htons(0xe0ff);
420	–	*q++ = htons(0xf227);           // fmove.l fpiar,-(sp)
421	–	*q++ = htons(0xa400);
422	–	*q++ = htons(0xf227);           // fmove.l fpsr,-(sp)
423	–	*q++ = htons(0xa800);
424	–	*q++ = htons(0xf227);           // fmove.l fpcr,-(sp)
425	–	*q++ = htons(0xb000);
426	–	*q++ = htons(0x4879);           // pea -1                                       (push "FPU state saved" flag)
427	–	*q++ = htons(0xffff);
428	–	*q++ = htons(0xffff);
429	–	p16 += 7;
430	–	for (i=0; i<42; i++) *q++ = *p16++;
431	–
432	–	p16 = (uint16 *)(p + base);
433	–	*p16++ = htons(M68K_JMP);
434	–	*p16++ = htons(start >> 16);
435	–	*p16 = htons(start & 0xffff);
436	–	FlushCodeCache(p + base, 6);
437	–	D(bug("  patch 6 applied\n"));
438	–	}
439	–	}
440	–	}
441	–	}
442	–
443	–	FlushCodeCache(ThPatchSpace, 1024);
444	–
445	–	// Patch Thread Manager FPU init for 68060 FPU (7.5, 8.0)
446	–	static const uint8 dat5[] = {0x4a, 0x28, 0x00, 0xa4, 0x67, 0x0a, 0x4a, 0x2c, 0x00, 0x40};
447	–	base = find_rsrc_data(p, size, dat5, sizeof(dat5));
448	–	if (base) {
449	–	p16 = (uint16 *)(p + base + 6);
450	–	*p16++ = htons(M68K_JSR);
451	–	*p16++ = htons((uint32)ThInitFPUPatch >> 16);
452	–	*p16++ = htons((uint32)ThInitFPUPatch & 0xffff);
453	–	*p16++ = htons(M68K_NOP);
454	–	*p16 = htons(M68K_NOP);
455	–	FlushCodeCache(p + base + 6, 10);
456	–	D(bug("  patch 7 applied\n"));
457	–	}
458	–	#endif
459	–
192		} else if (type == FOURCC('g','p','c','h') && id == 750) {
193		D(bug(" gpch 750 found\n"));
194
#	Line 514 | Line 246 | void CheckLoad(uint32 type, int16 id, ui
246		D(bug("  patch 2 applied\n"));
247		}
248
517	–	#if !EMULATED_68K
518	–	} else if (CPUIs68060 && type == FOURCC('s','c','o','d') && (id == -16463 || id == -16464)) {
519	–	D(bug(" scod -16463/-16464 found\n"));
520	–
521	–	// Correct 68060 FP frame handling in Process Manager task switches (7.1, 7.5, 8.0)
522	–	static const uint8 dat[] = {0xf3, 0x27, 0x4a, 0x17};
523	–	base = find_rsrc_data(p, size, dat, sizeof(dat));
524	–	if (base) {
525	–	p16 = (uint16 *)(p + base);
526	–	*p16++ = htons(M68K_JMP);
527	–	*p16++ = htons((uint32)Scod060Patch1 >> 16);
528	–	*p16 = htons((uint32)Scod060Patch1 & 0xffff);
529	–	FlushCodeCache(p + base, 6);
530	–	D(bug("  patch 1 applied\n"));
531	–	}
532	–
533	–	// Even a null FP frame is 3 longwords on the 68060 (7.1, 7.5, 8.0)
534	–	static const uint8 dat2[] = {0xf3, 0x5f, 0x4e, 0x75};
535	–	base = find_rsrc_data(p, size, dat2, sizeof(dat2));
536	–	if (base) {
537	–	p16 = (uint16 *)(p + base - 2);
538	–	*p16++ = htons(M68K_JMP);
539	–	*p16++ = htons((uint32)Scod060Patch2 >> 16);
540	–	*p16 = htons((uint32)Scod060Patch2 & 0xffff);
541	–	FlushCodeCache(p + base - 2, 6);
542	–	D(bug("  patch 2 applied\n"));
543	–	}
544	–	#endif
545	–
249		} else if (type == FOURCC('t','h','n','g') && id == -16563) {
250		D(bug(" thng -16563 found\n"));
251

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